ipq40xx: convert some boards to DSA
[openwrt/staging/hauke.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4029-insect-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Device Tree Source for Meraki "Insect" series
4 *
5 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
7 *
8 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15 #include "qcom-ipq4019.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19 #include <dt-bindings/leds/common.h>
20
21 / {
22 aliases {
23 led-boot = &status_green;
24 led-failsafe = &status_red;
25 led-running = &status_green;
26 led-upgrade = &power_orange;
27 };
28
29 /* Do we really need this defined? */
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>;
33 };
34
35 soc {
36 rng@22000 {
37 status = "okay";
38 };
39
40 mdio@90000 {
41 status = "okay";
42 pinctrl-0 = <&mdio_pins>;
43 pinctrl-names = "default";
44 };
45
46 /* It is a 56-bit counter that supplies the count to the ARM arch
47 timers and without upstream driver */
48 counter@4a1000 {
49 compatible = "qcom,qca-gcnt";
50 reg = <0x4a1000 0x4>;
51 };
52
53 ess_tcsr@1953000 {
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
57 };
58
59 tcsr@1949000 {
60 compatible = "qcom,tcsr";
61 reg = <0x1949000 0x100>;
62 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
63 };
64
65 tcsr@1957000 {
66 compatible = "qcom,tcsr";
67 reg = <0x1957000 0x100>;
68 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
69 };
70
71 serial@78b0000 {
72 pinctrl-0 = <&serial_1_pins>;
73 pinctrl-names = "default";
74 status = "okay";
75
76 bluetooth {
77 compatible = "ti,cc2650";
78 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 crypto@8e3a000 {
83 status = "okay";
84 };
85
86 watchdog@b017000 {
87 status = "okay";
88 };
89 };
90
91 keys {
92 compatible = "gpio-keys";
93
94 reset {
95 label = "reset";
96 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_RESTART>;
98 };
99 };
100
101 leds {
102 compatible = "gpio-leds";
103
104 power_orange: power {
105 label = "orange:power";
106 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
107 panic-indicator;
108 };
109 };
110 };
111
112 &blsp_dma {
113 status = "okay";
114 };
115
116 &blsp1_uart1 {
117 pinctrl-0 = <&serial_0_pins>;
118 pinctrl-names = "default";
119 status = "okay";
120 };
121
122 &cryptobam {
123 status = "okay";
124 };
125
126 &blsp1_i2c3 {
127 pinctrl-0 = <&i2c_0_pins>;
128 pinctrl-names = "default";
129 status = "okay";
130 at24@50 {
131 compatible = "atmel,24c64";
132 pagesize = <32>;
133 reg = <0x50>;
134 read-only; /* This holds our MAC & Meraki board-data */
135 };
136 };
137
138 &blsp1_i2c4 {
139 pinctrl-0 = <&i2c_1_pins>;
140 pinctrl-names = "default";
141 status = "okay";
142
143 tricolor: led-controller@30 {
144 compatible = "ti,lp5562";
145 reg = <0x30>;
146 clock-mode = /bits/8 <2>;
147 #address-cells = <1>;
148 #size-cells = <0>;
149
150 /* RGB led */
151 status_red: chan@0 {
152 chan-name = "red:status";
153 led-cur = /bits/ 8 <0x20>;
154 max-cur = /bits/ 8 <0x60>;
155 reg = <0>;
156 color = <LED_COLOR_ID_RED>;
157 };
158
159 status_green: chan@1 {
160 chan-name = "green:status";
161 led-cur = /bits/ 8 <0x20>;
162 max-cur = /bits/ 8 <0x60>;
163 reg = <1>;
164 color = <LED_COLOR_ID_GREEN>;
165 };
166
167 chan@2 {
168 chan-name = "blue:status";
169 led-cur = /bits/ 8 <0x20>;
170 max-cur = /bits/ 8 <0x60>;
171 reg = <2>;
172 color = <LED_COLOR_ID_BLUE>;
173 };
174
175 chan@3 {
176 chan-name = "white:status";
177 led-cur = /bits/ 8 <0x20>;
178 max-cur = /bits/ 8 <0x60>;
179 reg = <3>;
180 color = <LED_COLOR_ID_WHITE>;
181 };
182 };
183 };
184
185 &nand {
186 pinctrl-0 = <&nand_pins>;
187 pinctrl-names = "default";
188 status = "okay";
189
190 nand@0 {
191 partitions {
192 compatible = "fixed-partitions";
193 #address-cells = <1>;
194 #size-cells = <1>;
195
196 partition@0 {
197 label = "sbl1";
198 reg = <0x00000000 0x00100000>;
199 read-only;
200 };
201 partition@100000 {
202 label = "mibib";
203 reg = <0x00100000 0x00100000>;
204 read-only;
205 };
206 partition@200000 {
207 label = "bootconfig";
208 reg = <0x00200000 0x00100000>;
209 read-only;
210 };
211 partition@300000 {
212 label = "qsee";
213 reg = <0x00300000 0x00100000>;
214 read-only;
215 };
216 partition@400000 {
217 label = "qsee_alt";
218 reg = <0x00400000 0x00100000>;
219 read-only;
220 };
221 partition@500000 {
222 label = "cdt";
223 reg = <0x00500000 0x00080000>;
224 read-only;
225 };
226 partition@580000 {
227 label = "cdt_alt";
228 reg = <0x00580000 0x00080000>;
229 read-only;
230 };
231 partition@600000 {
232 label = "ddrparams";
233 reg = <0x00600000 0x00080000>;
234 read-only;
235 };
236 partition@700000 {
237 label = "u-boot";
238 reg = <0x00700000 0x00200000>;
239 read-only;
240 };
241 partition@900000 {
242 label = "u-boot-backup";
243 reg = <0x00900000 0x00200000>;
244 read-only;
245 };
246 partition@b00000 {
247 label = "ART";
248 reg = <0x00b00000 0x00080000>;
249 read-only;
250 };
251 partition@c00000 {
252 label = "ubi";
253 reg = <0x00c00000 0x07000000>;
254 /*
255 * Do not try to allocate the remaining
256 * 4 MiB to this ubi partition. It will
257 * confuse the u-boot and it might not
258 * find the kernel partition anymore.
259 */
260 };
261 };
262 };
263 };
264
265 &pcie0 {
266 status = "okay";
267 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
268 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
269
270 bridge@0,0 {
271 reg = <0x00000000 0 0 0 0>;
272 #address-cells = <3>;
273 #size-cells = <2>;
274 ranges;
275
276 wifi2: wifi@1,0 {
277 compatible = "qcom,ath10k";
278 status = "okay";
279 reg = <0x00010000 0 0 0 0>;
280 };
281 };
282 };
283
284 &qpic_bam {
285 status = "okay";
286 };
287
288 &tlmm {
289 /*
290 * GPIO43 should be 0/1 whenever the unit is
291 * powered through PoE or AC-Adapter.
292 * That said, playing with this seems to
293 * reset the AP.
294 */
295
296 mdio_pins: mdio_pinmux {
297 mux_1 {
298 pins = "gpio6";
299 function = "mdio";
300 bias-pull-up;
301 };
302 mux_2 {
303 pins = "gpio7";
304 function = "mdc";
305 bias-pull-up;
306 };
307 };
308
309 serial_0_pins: serial_pinmux {
310 mux {
311 pins = "gpio16", "gpio17";
312 function = "blsp_uart0";
313 bias-disable;
314 };
315 };
316
317 serial_1_pins: serial1_pinmux {
318 mux {
319 /* We use the i2c-0 pins for serial_1 */
320 pins = "gpio8", "gpio9";
321 function = "blsp_uart1";
322 bias-disable;
323 };
324 };
325
326 i2c_0_pins: i2c_0_pinmux {
327 pinmux {
328 function = "blsp_i2c0";
329 pins = "gpio20", "gpio21";
330 };
331 pinconf {
332 pins = "gpio20", "gpio21";
333 drive-strength = <16>;
334 bias-disable;
335 };
336 };
337
338 i2c_1_pins: i2c_1_pinmux {
339 pinmux {
340 function = "blsp_i2c1";
341 pins = "gpio34", "gpio35";
342 };
343 pinconf {
344 pins = "gpio34", "gpio35";
345 drive-strength = <16>;
346 bias-disable;
347 };
348 };
349
350 nand_pins: nand_pins {
351 /*
352 * There are 18 pins. 15 pins are common between LCD and NAND.
353 * The QPIC controller arbitrates between LCD and NAND. Of the
354 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
355 *
356 * The meraki source hints that the bluetooth module claims
357 * pin 52 as well. But sadly, there's no data whenever this
358 * is a NAND or LCD exclusive pin or not.
359 */
360
361 pullups {
362 pins = "gpio52", "gpio53", "gpio58",
363 "gpio59";
364 function = "qpic";
365 bias-pull-up;
366 };
367
368 pulldowns {
369 pins = "gpio54", "gpio55", "gpio56",
370 "gpio57", "gpio60", "gpio61",
371 "gpio62", "gpio63", "gpio64",
372 "gpio65", "gpio66", "gpio67",
373 "gpio68", "gpio69";
374 function = "qpic";
375 bias-pull-down;
376 };
377 };
378 };
379
380 &wifi0 {
381 status = "okay";
382 qcom,ath10k-calibration-variant = "Meraki-MR33";
383 };
384
385 &wifi1 {
386 status = "okay";
387 qcom,ath10k-calibration-variant = "Meraki-MR33";
388 };
389
390 &gmac {
391 status = "okay";
392 };
393
394 &switch {
395 status = "okay";
396
397 /delete-property/ psgmii-ethphy;
398 };
399
400 &swport5 {
401 status = "okay";
402
403 label = "lan";
404 phy-handle = <&ethphy1>;
405 phy-mode = "rgmii-rxid";
406 };
407
408 &ethphy0 {
409 status = "disabled";
410 };
411
412 &ethphy2 {
413 status = "disabled";
414 };
415
416 &ethphy3 {
417 status = "disabled";
418 };
419
420 &ethphy4 {
421 status = "disabled";
422 };
423
424 &psgmiiphy {
425 status = "disabled";
426 };