ipq40xx: convert to new LED color/function format where possible
[openwrt/staging/nbd.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4029-insect-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Device Tree Source for Meraki "Insect" series
4 *
5 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
7 *
8 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15 #include "qcom-ipq4019.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19 #include <dt-bindings/leds/common.h>
20
21 / {
22 aliases {
23 led-boot = &status_green;
24 led-failsafe = &status_red;
25 led-running = &status_green;
26 led-upgrade = &power_orange;
27 };
28
29 /* Do we really need this defined? */
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>;
33 };
34
35 soc {
36 rng@22000 {
37 status = "okay";
38 };
39
40 mdio@90000 {
41 status = "okay";
42 pinctrl-0 = <&mdio_pins>;
43 pinctrl-names = "default";
44 };
45
46 /* It is a 56-bit counter that supplies the count to the ARM arch
47 timers and without upstream driver */
48 counter@4a1000 {
49 compatible = "qcom,qca-gcnt";
50 reg = <0x4a1000 0x4>;
51 };
52
53 ess_tcsr@1953000 {
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
57 };
58
59 tcsr@1949000 {
60 compatible = "qcom,tcsr";
61 reg = <0x1949000 0x100>;
62 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
63 };
64
65 tcsr@1957000 {
66 compatible = "qcom,tcsr";
67 reg = <0x1957000 0x100>;
68 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
69 };
70
71 serial@78b0000 {
72 pinctrl-0 = <&serial_1_pins>;
73 pinctrl-names = "default";
74 status = "okay";
75
76 bluetooth {
77 compatible = "ti,cc2650";
78 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 crypto@8e3a000 {
83 status = "okay";
84 };
85
86 watchdog@b017000 {
87 status = "okay";
88 };
89 };
90
91 keys {
92 compatible = "gpio-keys";
93
94 reset {
95 label = "reset";
96 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_RESTART>;
98 };
99 };
100
101 leds {
102 compatible = "gpio-leds";
103
104 power_orange: power {
105 function = LED_FUNCTION_POWER;
106 color = <LED_COLOR_ID_ORANGE>;
107 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
108 panic-indicator;
109 };
110 };
111 };
112
113 &blsp_dma {
114 status = "okay";
115 };
116
117 &blsp1_uart1 {
118 pinctrl-0 = <&serial_0_pins>;
119 pinctrl-names = "default";
120 status = "okay";
121 };
122
123 &cryptobam {
124 status = "okay";
125 };
126
127 &blsp1_i2c3 {
128 pinctrl-0 = <&i2c_0_pins>;
129 pinctrl-names = "default";
130 status = "okay";
131
132 eeprom@50 {
133 compatible = "atmel,24c64";
134 pagesize = <32>;
135 reg = <0x50>;
136 read-only; /* This holds our MAC & Meraki board-data */
137 #address-cells = <1>;
138 #size-cells = <1>;
139
140 mac_address: mac-address@66 {
141 compatible = "mac-base";
142 reg = <0x66 0x6>;
143 #nvmem-cell-cells = <1>;
144 };
145 };
146 };
147
148 &blsp1_i2c4 {
149 pinctrl-0 = <&i2c_1_pins>;
150 pinctrl-names = "default";
151 status = "okay";
152
153 tricolor: led-controller@30 {
154 compatible = "ti,lp5562";
155 reg = <0x30>;
156 clock-mode = /bits/8 <2>;
157 #address-cells = <1>;
158 #size-cells = <0>;
159
160 /* RGB led */
161 status_red: chan@0 {
162 chan-name = "red:status";
163 led-cur = /bits/ 8 <0x20>;
164 max-cur = /bits/ 8 <0x60>;
165 reg = <0>;
166 color = <LED_COLOR_ID_RED>;
167 };
168
169 status_green: chan@1 {
170 chan-name = "green:status";
171 led-cur = /bits/ 8 <0x20>;
172 max-cur = /bits/ 8 <0x60>;
173 reg = <1>;
174 color = <LED_COLOR_ID_GREEN>;
175 };
176
177 chan@2 {
178 chan-name = "blue:status";
179 led-cur = /bits/ 8 <0x20>;
180 max-cur = /bits/ 8 <0x60>;
181 reg = <2>;
182 color = <LED_COLOR_ID_BLUE>;
183 };
184
185 chan@3 {
186 chan-name = "white:status";
187 led-cur = /bits/ 8 <0x20>;
188 max-cur = /bits/ 8 <0x60>;
189 reg = <3>;
190 color = <LED_COLOR_ID_WHITE>;
191 };
192 };
193 };
194
195 &nand {
196 pinctrl-0 = <&nand_pins>;
197 pinctrl-names = "default";
198 status = "okay";
199
200 nand@0 {
201 partitions {
202 compatible = "fixed-partitions";
203 #address-cells = <1>;
204 #size-cells = <1>;
205
206 partition@0 {
207 label = "sbl1";
208 reg = <0x00000000 0x00100000>;
209 read-only;
210 };
211 partition@100000 {
212 label = "mibib";
213 reg = <0x00100000 0x00100000>;
214 read-only;
215 };
216 partition@200000 {
217 label = "bootconfig";
218 reg = <0x00200000 0x00100000>;
219 read-only;
220 };
221 partition@300000 {
222 label = "qsee";
223 reg = <0x00300000 0x00100000>;
224 read-only;
225 };
226 partition@400000 {
227 label = "qsee_alt";
228 reg = <0x00400000 0x00100000>;
229 read-only;
230 };
231 partition@500000 {
232 label = "cdt";
233 reg = <0x00500000 0x00080000>;
234 read-only;
235 };
236 partition@580000 {
237 label = "cdt_alt";
238 reg = <0x00580000 0x00080000>;
239 read-only;
240 };
241 partition@600000 {
242 label = "ddrparams";
243 reg = <0x00600000 0x00080000>;
244 read-only;
245 };
246 partition@700000 {
247 label = "u-boot";
248 reg = <0x00700000 0x00200000>;
249 read-only;
250 };
251 partition@900000 {
252 label = "u-boot-backup";
253 reg = <0x00900000 0x00200000>;
254 read-only;
255 };
256 partition@b00000 {
257 label = "ART";
258 reg = <0x00b00000 0x00080000>;
259 read-only;
260 };
261 partition@c00000 {
262 label = "ubi";
263 reg = <0x00c00000 0x07000000>;
264 /*
265 * Do not try to allocate the remaining
266 * 4 MiB to this ubi partition. It will
267 * confuse the u-boot and it might not
268 * find the kernel partition anymore.
269 */
270 };
271 };
272 };
273 };
274
275 &pcie0 {
276 status = "okay";
277 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
278 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
279
280 bridge@0,0 {
281 reg = <0x00000000 0 0 0 0>;
282 #address-cells = <3>;
283 #size-cells = <2>;
284 ranges;
285
286 wifi2: wifi@1,0 {
287 compatible = "qcom,ath10k";
288 status = "okay";
289 reg = <0x00010000 0 0 0 0>;
290 nvmem-cells = <&mac_address 1>;
291 nvmem-cell-names = "mac-address";
292 };
293 };
294 };
295
296 &qpic_bam {
297 status = "okay";
298 };
299
300 &tlmm {
301 /*
302 * GPIO43 should be 0/1 whenever the unit is
303 * powered through PoE or AC-Adapter.
304 * That said, playing with this seems to
305 * reset the AP.
306 */
307
308 mdio_pins: mdio_pinmux {
309 mux_1 {
310 pins = "gpio6";
311 function = "mdio";
312 bias-pull-up;
313 };
314 mux_2 {
315 pins = "gpio7";
316 function = "mdc";
317 bias-pull-up;
318 };
319 };
320
321 serial_0_pins: serial_pinmux {
322 mux {
323 pins = "gpio16", "gpio17";
324 function = "blsp_uart0";
325 bias-disable;
326 };
327 };
328
329 serial_1_pins: serial1_pinmux {
330 mux {
331 /* We use the i2c-0 pins for serial_1 */
332 pins = "gpio8", "gpio9";
333 function = "blsp_uart1";
334 bias-disable;
335 };
336 };
337
338 i2c_0_pins: i2c_0_pinmux {
339 pinmux {
340 function = "blsp_i2c0";
341 pins = "gpio20", "gpio21";
342 };
343 pinconf {
344 pins = "gpio20", "gpio21";
345 drive-strength = <16>;
346 bias-disable;
347 };
348 };
349
350 i2c_1_pins: i2c_1_pinmux {
351 pinmux {
352 function = "blsp_i2c1";
353 pins = "gpio34", "gpio35";
354 };
355 pinconf {
356 pins = "gpio34", "gpio35";
357 drive-strength = <16>;
358 bias-disable;
359 };
360 };
361
362 nand_pins: nand_pins {
363 /*
364 * There are 18 pins. 15 pins are common between LCD and NAND.
365 * The QPIC controller arbitrates between LCD and NAND. Of the
366 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
367 *
368 * The meraki source hints that the bluetooth module claims
369 * pin 52 as well. But sadly, there's no data whenever this
370 * is a NAND or LCD exclusive pin or not.
371 */
372
373 pullups {
374 pins = "gpio52", "gpio53", "gpio58",
375 "gpio59";
376 function = "qpic";
377 bias-pull-up;
378 };
379
380 pulldowns {
381 pins = "gpio54", "gpio55", "gpio56",
382 "gpio57", "gpio60", "gpio61",
383 "gpio62", "gpio63", "gpio64",
384 "gpio65", "gpio66", "gpio67",
385 "gpio68", "gpio69";
386 function = "qpic";
387 bias-pull-down;
388 };
389 };
390 };
391
392 &wifi0 {
393 status = "okay";
394 qcom,ath10k-calibration-variant = "Meraki-MR33";
395 nvmem-cells = <&mac_address 2>;
396 nvmem-cell-names = "mac-address";
397 };
398
399 &wifi1 {
400 status = "okay";
401 qcom,ath10k-calibration-variant = "Meraki-MR33";
402 nvmem-cells = <&mac_address 3>;
403 nvmem-cell-names = "mac-address";
404 };
405
406 &gmac {
407 status = "okay";
408 nvmem-cells = <&mac_address 0>;
409 nvmem-cell-names = "mac-address";
410 };
411
412 &switch {
413 status = "okay";
414
415 /delete-property/ psgmii-ethphy;
416 };
417
418 &swport5 {
419 status = "okay";
420
421 label = "lan";
422 phy-handle = <&ethphy1>;
423 phy-mode = "rgmii-rxid";
424 };
425
426 &ethphy0 {
427 status = "disabled";
428 };
429
430 &ethphy2 {
431 status = "disabled";
432 };
433
434 &ethphy3 {
435 status = "disabled";
436 };
437
438 &ethphy4 {
439 status = "disabled";
440 };
441
442 &psgmiiphy {
443 status = "disabled";
444 };