target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 / {
   9         model = "EnGenius EAP2200";
  10         compatible = "engenius,eap2200";
  11
  12         aliases {
  13                 led-boot = &led_power;
  14                 led-failsafe = &led_power;
  15                 led-running = &led_power;
  16                 led-upgrade = &led_power;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 wps {
  23                         label = "wps";
  24                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_WPS_BUTTON>;
  26                 };
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31
  32                 led_power: power {
  33                         function = LED_FUNCTION_POWER;
  34                         color = <LED_COLOR_ID_AMBER>;
  35                         gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 lan1 {
  39                         label = "blue:lan1";
  40                         gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 lan2 {
  44                         label = "blue:lan2";
  45                         gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 wlan2g {
  49                         label = "blue:wlan2g";
  50                         gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
  51                         linux,default-trigger = "phy0tpt";
  52                 };
  53
  54                 wlan5g {
  55                         label = "yellow:wlan5g";
  56                         gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  57                         linux,default-trigger = "phy1tpt";
  58                 };
  59
  60                 wlan5g2 {
  61                         label = "yellow:wlan5g2";
  62                         gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
  63                         linux,default-trigger = "phy2tpt";
  64                 };
  65
  66                 mode {
  67                         label = "blue:mode";
  68                         gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
  69                 };
  70         };
  71
  72         soc {
  73                 rng@22000 {
  74                         status = "okay";
  75                 };
  76
  77                 mdio@90000 {
  78                         status = "okay";
  79                 };
  80
  81                 crypto@8e3a000 {
  82                         status = "okay";
  83                 };
  84
  85                 watchdog@b017000 {
  86                         status = "okay";
  87                 };
  88         };
  89 };
  90
  91 &blsp_dma {
  92         status = "okay";
  93 };
  94
  95 &blsp1_spi1 {
  96         pinctrl-0 = <&spi_0_pins>;
  97         pinctrl-names = "default";
  98         status = "okay";
  99         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 100
 101         flash@0 {
 102                 #address-cells = <1>;
 103                 #size-cells = <1>;
 104                 compatible = "jedec,spi-nor";
 105                 reg = <0>;
 106                 spi-max-frequency = <24000000>;
 107                 partitions {
 108                         compatible = "fixed-partitions";
 109                         #address-cells = <1>;
 110                         #size-cells = <1>;
 111
 112                         partition0@0 {
 113                                 label = "0:SBL1";
 114                                 reg = <0x00000000 0x00040000>;
 115                                 read-only;
 116                         };
 117                         partition1@40000 {
 118                                 label = "0:MIBIB";
 119                                 reg = <0x00040000 0x00020000>;
 120                                 read-only;
 121                         };
 122                         partition2@60000 {
 123                                 label = "0:QSEE";
 124                                 reg = <0x00060000 0x00060000>;
 125                                 read-only;
 126                         };
 127                         partition3@c0000 {
 128                                 label = "0:CDT";
 129                                 reg = <0x000c0000 0x00010000>;
 130                                 read-only;
 131                         };
 132                         partition4@d0000 {
 133                                 label = "0:DDRPARAMS";
 134                                 reg = <0x000d0000 0x00010000>;
 135                                 read-only;
 136                         };
 137                         partition5@e0000 {
 138                                 label = "0:APPSBLENV";
 139                                 reg = <0x000e0000 0x00010000>;
 140                                 read-only;
 141                         };
 142                         partition6@f0000 {
 143                                 label = "0:APPSBL";
 144                                 reg = <0x000f0000 0x00080000>;
 145                                 read-only;
 146                         };
 147                         partition7@170000 {
 148                                 label = "0:ART";
 149                                 reg = <0x00170000 0x00010000>;
 150                                 read-only;
 151
 152                                 nvmem-layout {
 153                                         compatible = "fixed-layout";
 154                                         #address-cells = <1>;
 155                                         #size-cells = <1>;
 156
 157                                         precal_art_1000: precal@1000 {
 158                                                 reg = <0x1000 0x2f20>;
 159                                         };
 160
 161                                         precal_art_5000: precal@5000 {
 162                                                 reg = <0x5000 0x2f20>;
 163                                         };
 164
 165                                         precal_art_9000: precal@9000 {
 166                                                 reg = <0x9000 0x2f20>;
 167                                         };
 168                                 };
 169                         };
 170                 };
 171         };
 172 };
 173
 174 &blsp1_uart1 {
 175         pinctrl-0 = <&serial_0_pins>;
 176         pinctrl-names = "default";
 177         status = "okay";
 178 };
 179
 180 &cryptobam {
 181         status = "okay";
 182 };
 183
 184 &nand {
 185         pinctrl-0 = <&nand_pins>;
 186         pinctrl-names = "default";
 187         status = "okay";
 188
 189         nand@0 {
 190                 partitions {
 191                         compatible = "fixed-partitions";
 192                         #address-cells = <1>;
 193                         #size-cells = <1>;
 194
 195                         partition@0 {
 196                                 label = "rootfs1";
 197                                 reg = <0x00000000 0x04000000>;
 198                         };
 199                         partition@40000000 {
 200                                 label = "ubi";
 201                                 reg = <0x04000000 0x04000000>;
 202                         };
 203
 204                 };
 205         };
 206 };
 207
 208 &pcie0 {
 209         status = "okay";
 210         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 211         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 212
 213         bridge@0,0 {
 214                 reg = <0x00000000 0 0 0 0>;
 215                 #address-cells = <3>;
 216                 #size-cells = <2>;
 217                 ranges;
 218
 219                 wifi2: wifi@1,0 {
 220                         compatible = "qcom,ath10k";
 221                         reg = <0x00010000 0 0 0 0>;
 222                         nvmem-cell-names = "pre-calibration";
 223                         nvmem-cells = <&precal_art_9000>;
 224                         ieee80211-freq-limit = <5470000 5875000>;
 225                         qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
 226                 };
 227         };
 228 };
 229
 230 &qpic_bam {
 231         status = "okay";
 232 };
 233
 234 &tlmm {
 235         nand_pins: nand_pins {
 236                 pullups {
 237                         pins = "gpio53", "gpio58", "gpio59";
 238                         function = "qpic";
 239                         bias-pull-up;
 240                 };
 241
 242                 pulldowns {
 243                         pins = "gpio54", "gpio55", "gpio56",
 244                                 "gpio57", "gpio60", "gpio61",
 245                                 "gpio62", "gpio63", "gpio64",
 246                                 "gpio65", "gpio66", "gpio67",
 247                                 "gpio68", "gpio69";
 248                         function = "qpic";
 249                         bias-pull-down;
 250                 };
 251         };
 252
 253         serial_0_pins: serial_pinmux {
 254                 mux {
 255                         pins = "gpio16", "gpio17";
 256                         function = "blsp_uart0";
 257                         bias-disable;
 258                 };
 259         };
 260
 261         spi_0_pins: spi_0_pinmux {
 262                 pinmux {
 263                         function = "blsp_spi0";
 264                         pins = "gpio13", "gpio14", "gpio15";
 265                         drive-strength = <12>;
 266                         bias-disable;
 267                 };
 268                 pinmux_cs {
 269                         function = "gpio";
 270                         pins = "gpio12";
 271                         drive-strength = <2>;
 272                         bias-disable;
 273                         output-high;
 274                 };
 275         };
 276 };
 277
 278 &wifi0 {
 279         status = "okay";
 280         nvmem-cell-names = "pre-calibration";
 281         nvmem-cells = <&precal_art_1000>;
 282         qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
 283 };
 284
 285 &wifi1 {
 286         status = "okay";
 287         ieee80211-freq-limit = <5170000 5350000>;
 288         nvmem-cell-names = "pre-calibration";
 289         nvmem-cells = <&precal_art_5000>;
 290         qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
 291 };