ipq40xx: utilize nvmem-cells for macs & (pre-)calibration data
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-ecw5211.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 model = "Edgecore ECW5211";
10 compatible = "edgecore,ecw5211";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 label-mac-device = &gmac0;
18 };
19
20 chosen {
21 bootargs-append = " root=/dev/ubiblock0_1";
22 };
23
24 keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "reset";
29 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 led_power: power {
38 label = "yellow:power";
39 gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
40 };
41
42 wlan2g {
43 label = "green:wlan2g";
44 gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
45 linux,default-trigger = "phy0tpt";
46 };
47
48 wlan5g {
49 label = "green:wlan5g";
50 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
51 linux,default-trigger = "phy1tpt";
52 };
53 };
54
55 soc {
56 rng@22000 {
57 status = "okay";
58 };
59
60 ess-psgmii@98000 {
61 status = "okay";
62 };
63
64 counter@4a1000 {
65 compatible = "qcom,qca-gcnt";
66 reg = <0x4a1000 0x4>;
67 };
68
69 tcsr@1949000 {
70 compatible = "qcom,tcsr";
71 reg = <0x1949000 0x100>;
72 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
73 };
74
75 tcsr@194b000 {
76 compatible = "qcom,tcsr";
77 reg = <0x194b000 0x100>;
78 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
79 };
80
81 ess_tcsr@1953000 {
82 compatible = "qcom,tcsr";
83 reg = <0x1953000 0x1000>;
84 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
85 };
86
87 tcsr@1957000 {
88 compatible = "qcom,tcsr";
89 reg = <0x1957000 0x100>;
90 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
91 };
92
93 usb2@60f8800 {
94 status = "okay";
95 };
96
97 usb3@8af8800 {
98 status = "okay";
99
100 dwc3@8a00000 {
101 phys = <&usb3_hs_phy>;
102 phy-names = "usb2-phy";
103 };
104 };
105
106 crypto@8e3a000 {
107 status = "okay";
108 };
109
110 watchdog@b017000 {
111 status = "okay";
112 };
113
114 ess-switch@c000000 {
115 status = "okay";
116
117 switch_lan_bmp = <0x10>;
118 switch_wan_bmp = <0x20>;
119 };
120
121 edma@c080000 {
122 status = "okay";
123 };
124 };
125 };
126
127 &tlmm {
128 mdio_pins: mdio_pinmux {
129 mux_mdio {
130 pins = "gpio53";
131 function = "mdio";
132 bias-pull-up;
133 };
134
135 mux_mdc {
136 pins = "gpio52";
137 function = "mdc";
138 bias-pull-up;
139 };
140 };
141
142 serial_pins: serial_pinmux {
143 mux {
144 pins = "gpio60", "gpio61";
145 function = "blsp_uart0";
146 bias-disable;
147 };
148 };
149
150 spi0_pins: spi0_pinmux {
151 pin {
152 function = "blsp_spi0";
153 pins = "gpio55", "gpio56", "gpio57";
154 drive-strength = <2>;
155 bias-disable;
156 };
157
158 pin_cs {
159 function = "gpio";
160 pins = "gpio54", "gpio4";
161 drive-strength = <2>;
162 bias-disable;
163 output-high;
164 };
165 };
166
167 i2c0_pins: i2c0_pinmux {
168 mux_i2c {
169 function = "blsp_i2c0";
170 pins = "gpio58", "gpio59";
171 drive-strength = <16>;
172 bias-disable;
173 };
174 };
175 };
176
177 &blsp_dma {
178 status = "okay";
179 };
180
181 &blsp1_spi1 {
182 status = "okay";
183
184 pinctrl-0 = <&spi0_pins>;
185 pinctrl-names = "default";
186 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
187
188 flash@0 {
189 compatible = "jedec,spi-nor";
190 reg = <0>;
191 spi-max-frequency = <24000000>;
192
193 partitions {
194 compatible = "fixed-partitions";
195 #address-cells = <1>;
196 #size-cells = <1>;
197
198 partition@0 {
199 label = "0:SBL1";
200 reg = <0x00000000 0x00040000>;
201 read-only;
202 };
203
204 partition@40000 {
205 label = "0:MIBIB";
206 reg = <0x00040000 0x00020000>;
207 read-only;
208 };
209
210 partition@60000 {
211 label = "0:QSEE";
212 reg = <0x00060000 0x00060000>;
213 read-only;
214 };
215
216 partition@c0000 {
217 label = "0:CDT";
218 reg = <0x000c0000 0x00010000>;
219 read-only;
220 };
221
222 partition@d0000 {
223 label = "0:DDRPARAMS";
224 reg = <0x000d0000 0x00010000>;
225 read-only;
226 };
227
228 partition@e0000 {
229 label = "0:APPSBLENV"; /* uboot env */
230 reg = <0x000e0000 0x00010000>;
231 };
232
233 partition@f0000 {
234 label = "0:APPSBL"; /* uboot */
235 reg = <0x000f0000 0x00080000>;
236 read-only;
237 };
238
239 partition@170000 {
240 label = "0:ART";
241 reg = <0x00170000 0x00010000>;
242 read-only;
243 compatible = "nvmem-cells";
244 #address-cells = <1>;
245 #size-cells = <1>;
246
247 precal_art_1000: precal@1000 {
248 reg = <0x1000 0x2f20>;
249 };
250
251 precal_art_5000: precal@5000 {
252 reg = <0x5000 0x2f20>;
253 };
254 };
255 };
256 };
257
258 flash@1 {
259 compatible = "spi-nand";
260 reg = <1>;
261 spi-max-frequency = <24000000>;
262
263 partitions {
264 compatible = "fixed-partitions";
265 #address-cells = <1>;
266 #size-cells = <1>;
267
268 partition@0 {
269 label = "rootfs";
270 reg = <0x00000000 0x04000000>;
271 };
272 };
273 };
274 };
275
276 &blsp1_i2c3 {
277 status = "okay";
278
279 pinctrl-0 = <&i2c0_pins>;
280 pinctrl-names = "default";
281
282 tpm@29 {
283 compatible = "atmel,at97sc3204t";
284 reg = <0x29>;
285 };
286 };
287
288 &blsp1_uart1 {
289 status = "okay";
290
291 pinctrl-0 = <&serial_pins>;
292 pinctrl-names = "default";
293 };
294
295 &cryptobam {
296 status = "okay";
297 };
298
299 &mdio {
300 status = "okay";
301
302 pinctrl-0 = <&mdio_pins>;
303 pinctrl-names = "default";
304 };
305
306 &gmac0 {
307 qcom,poll_required = <1>;
308 qcom,phy_mdio_addr = <4>;
309 vlan_tag = <2 0x20>;
310 };
311
312 &gmac1 {
313 qcom,poll_required = <1>;
314 qcom,phy_mdio_addr = <3>;
315 vlan_tag = <1 0x10>;
316 };
317
318 &wifi0 {
319 status = "okay";
320 nvmem-cell-names = "pre-calibration";
321 nvmem-cells = <&precal_art_1000>;
322 };
323
324 &wifi1 {
325 status = "okay";
326 nvmem-cell-names = "pre-calibration";
327 nvmem-cells = <&precal_art_5000>;
328 qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
329 };
330
331 &usb3_hs_phy {
332 status = "okay";
333 };
334
335 &usb2_hs_phy {
336 status = "okay";
337 };