target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "ALFA Network AP120C-AC";
  10         compatible = "alfa-network,ap120c-ac";
  11
  12         aliases {
  13                 led-boot = &status;
  14                 led-failsafe = &status;
  15                 led-running = &status;
  16                 led-upgrade = &status;
  17                 ethernet1 = &swport5;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset {
  24                         label = "reset";
  25                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 status: status {
  34                         label = "blue:status";
  35                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  36                         default-state = "keep";
  37                 };
  38
  39                 wan {
  40                         label = "amber:wan";
  41                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  42                 };
  43
  44                 wlan2g {
  45                         label = "green:wlan2g";
  46                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  47                         linux,default-trigger = "phy0tpt";
  48                 };
  49
  50                 wlan5g {
  51                         label = "red:wlan5g";
  52                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  53                         linux,default-trigger = "phy1tpt";
  54                 };
  55         };
  56
  57         soc {
  58                 rng@22000 {
  59                         status = "okay";
  60                 };
  61
  62                 mdio@90000 {
  63                         status = "okay";
  64
  65                         pinctrl-0 = <&mdio_pins>;
  66                         pinctrl-names = "default";
  67                 };
  68
  69                 counter@4a1000 {
  70                         compatible = "qcom,qca-gcnt";
  71                         reg = <0x4a1000 0x4>;
  72                 };
  73
  74                 tcsr@1949000 {
  75                         compatible = "qcom,tcsr";
  76                         reg = <0x1949000 0x100>;
  77                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  78                 };
  79
  80                 tcsr@194b000 {
  81                         compatible = "qcom,tcsr";
  82                         reg = <0x194b000 0x100>;
  83                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  84                 };
  85
  86                 ess_tcsr@1953000 {
  87                         compatible = "qcom,tcsr";
  88                         reg = <0x1953000 0x1000>;
  89                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  90                 };
  91
  92                 tcsr@1957000 {
  93                         compatible = "qcom,tcsr";
  94                         reg = <0x1957000 0x100>;
  95                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  96                 };
  97
  98                 usb2@60f8800 {
  99                         status = "okay";
 100                 };
 101
 102                 usb3@8af8800 {
 103                         status = "okay";
 104
 105                         dwc3@8a00000 {
 106                                 phys = <&usb3_hs_phy>;
 107                                 phy-names = "usb2-phy";
 108                         };
 109                 };
 110
 111                 crypto@8e3a000 {
 112                         status = "okay";
 113                 };
 114
 115                 watchdog@b017000 {
 116                         status = "okay";
 117                 };
 118         };
 119 };
 120
 121 &blsp_dma {
 122         status = "okay";
 123 };
 124
 125 &blsp1_i2c3 {
 126         status = "okay";
 127
 128         pinctrl-0 = <&i2c0_pins>;
 129         pinctrl-names = "default";
 130
 131         tpm@29 {
 132                 compatible = "atmel,at97sc3204t";
 133                 reg = <0x29>;
 134         };
 135 };
 136
 137 &blsp1_spi1 {
 138         status = "okay";
 139
 140         pinctrl-0 = <&spi0_pins>;
 141         pinctrl-names = "default";
 142         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 143                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 144
 145         flash@0 {
 146                 compatible = "jedec,spi-nor";
 147                 reg = <0>;
 148                 spi-max-frequency = <24000000>;
 149
 150                 partitions {
 151                         compatible = "fixed-partitions";
 152                         #address-cells = <1>;
 153                         #size-cells = <1>;
 154
 155                         partition@0 {
 156                                 label = "SBL1";
 157                                 reg = <0x00000000 0x00040000>;
 158                                 read-only;
 159                         };
 160
 161                         partition@40000 {
 162                                 label = "MIBIB";
 163                                 reg = <0x00040000 0x00020000>;
 164                                 read-only;
 165                         };
 166
 167                         partition@60000 {
 168                                 label = "QSEE";
 169                                 reg = <0x00060000 0x00060000>;
 170                                 read-only;
 171                         };
 172
 173                         partition@c0000 {
 174                                 label = "CDT";
 175                                 reg = <0x000c0000 0x00010000>;
 176                                 read-only;
 177                         };
 178
 179                         partition@d0000 {
 180                                 label = "DDRPARAMS";
 181                                 reg = <0x000d0000 0x00010000>;
 182                                 read-only;
 183                         };
 184
 185                         partition@e0000 {
 186                                 label = "APPSBLENV";
 187                                 reg = <0x000e0000 0x00010000>;
 188                         };
 189
 190                         partition@f0000 {
 191                                 label = "APPSBL";
 192                                 reg = <0x000f0000 0x00080000>;
 193                                 read-only;
 194                         };
 195
 196                         partition@170000 {
 197                                 label = "ART";
 198                                 reg = <0x00170000 0x00010000>;
 199                                 read-only;
 200
 201                                 nvmem-layout {
 202                                         compatible = "fixed-layout";
 203                                         #address-cells = <1>;
 204                                         #size-cells = <1>;
 205
 206                                         precal_art_1000: precal@1000 {
 207                                                 reg = <0x1000 0x2f20>;
 208                                         };
 209
 210                                         precal_art_5000: precal@5000 {
 211                                                 reg = <0x5000 0x2f20>;
 212                                         };
 213                                 };
 214                         };
 215
 216                         partition@180000 {
 217                                 label = "priv_data1";
 218                                 reg = <0x00180000 0x00010000>;
 219                                 read-only;
 220                         };
 221
 222                         partition@190000 {
 223                                 label = "priv_data2";
 224                                 reg = <0x00190000 0x00010000>;
 225                                 read-only;
 226                         };
 227                 };
 228         };
 229
 230         nand@1 {
 231                 compatible = "spi-nand";
 232                 reg = <1>;
 233                 spi-max-frequency = <24000000>;
 234
 235                 partitions {
 236                         compatible = "fixed-partitions";
 237                         #address-cells = <1>;
 238                         #size-cells = <1>;
 239
 240                         partition@0 {
 241                                 label = "rootfs1";
 242                                 reg = <0x00000000 0x04000000>;
 243                         };
 244
 245                         partition@4000000 {
 246                                 label = "rootfs2";
 247                                 reg = <0x04000000 0x04000000>;
 248                         };
 249                 };
 250         };
 251 };
 252
 253 &blsp1_uart1 {
 254         status = "okay";
 255
 256         pinctrl-0 = <&serial0_pins>;
 257         pinctrl-names = "default";
 258 };
 259
 260 &cryptobam {
 261         status = "okay";
 262 };
 263
 264 &ethphy4 {
 265         gpio-controller;
 266         #gpio-cells = <2>;
 267 };
 268
 269 &tlmm {
 270         i2c0_pins: i2c0_pinmux {
 271                 mux_i2c {
 272                         function = "blsp_i2c0";
 273                         pins = "gpio58", "gpio59";
 274                         drive-strength = <16>;
 275                         bias-disable;
 276                 };
 277         };
 278
 279         mdio_pins: mdio_pinmux {
 280                 mux_mdio {
 281                         pins = "gpio53";
 282                         function = "mdio";
 283                         bias-pull-up;
 284                 };
 285
 286                 mux_mdc {
 287                         pins = "gpio52";
 288                         function = "mdc";
 289                         bias-pull-up;
 290                 };
 291         };
 292
 293         serial0_pins: serial0_pinmux {
 294                 mux_uart {
 295                         pins = "gpio60", "gpio61";
 296                         function = "blsp_uart0";
 297                         bias-disable;
 298                 };
 299         };
 300
 301         spi0_pins: spi0_pinmux {
 302                 mux_spi {
 303                         function = "blsp_spi0";
 304                         pins = "gpio55", "gpio56", "gpio57";
 305                         drive-strength = <12>;
 306                         bias-disable;
 307                 };
 308
 309                 mux_cs {
 310                         function = "gpio";
 311                         pins = "gpio54", "gpio4";
 312                         drive-strength = <2>;
 313                         bias-disable;
 314                         output-high;
 315                 };
 316         };
 317 };
 318
 319 &usb2_hs_phy {
 320         status = "okay";
 321 };
 322
 323 &usb3_hs_phy {
 324         status = "okay";
 325 };
 326
 327 &gmac {
 328         status = "okay";
 329 };
 330
 331 &switch {
 332         status = "okay";
 333 };
 334
 335 &swport4 {
 336         status = "okay";
 337
 338         label = "lan";
 339 };
 340
 341 &swport5 {
 342         status = "okay";
 343 };
 344
 345 &wifi0 {
 346         status = "okay";
 347         nvmem-cell-names = "pre-calibration";
 348         nvmem-cells = <&precal_art_1000>;
 349 };
 350
 351 &wifi1 {
 352         status = "okay";
 353         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 354         nvmem-cell-names = "pre-calibration";
 355         nvmem-cells = <&precal_art_5000>;
 356 };