ramips/mediatek: improve GRO performance, fix PPE packet parsing
[openwrt/staging/rmilecki.git] / target / linux / generic / pending-5.4 / 770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Sun, 13 Sep 2020 08:17:02 +0200
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
4
5 When using DSA, set the special tag in GDM ingress control to allow the MAC
6 to parse packets properly earlier. This affects rx DMA source port reporting.
7
8 Signed-off-by: Felix Fietkau <nbd@nbd.name>
9 ---
10
11 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
12 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
13 @@ -19,6 +19,7 @@
14 #include <linux/interrupt.h>
15 #include <linux/pinctrl/devinfo.h>
16 #include <linux/phylink.h>
17 +#include <net/dsa.h>
18
19 #include "mtk_eth_soc.h"
20
21 @@ -1240,12 +1241,14 @@ static int mtk_poll_rx(struct napi_struc
22 u8 *data, *new_data;
23 struct mtk_rx_dma *rxd, trxd;
24 int done = 0, bytes = 0;
25 + bool uses_dsa = eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]);
26
27 while (done < budget) {
28 struct net_device *netdev;
29 unsigned int pktlen;
30 dma_addr_t dma_addr;
31 int mac;
32 + u16 hash;
33
34 ring = mtk_get_rx_ring(eth);
35 if (unlikely(!ring))
36 @@ -1259,13 +1262,13 @@ static int mtk_poll_rx(struct napi_struc
37 break;
38
39 /* find out which mac the packet come from. values start at 1 */
40 - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
41 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
42 mac = 0;
43 - } else {
44 - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
45 - RX_DMA_FPORT_MASK;
46 - mac--;
47 - }
48 + else if (uses_dsa)
49 + mac = !(trxd.rxd4 >> 22);
50 + else
51 + mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
52 + RX_DMA_FPORT_MASK) - 1;
53
54 if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
55 !eth->netdev[mac]))
56 @@ -2247,6 +2250,9 @@ static void mtk_gdm_config(struct mtk_et
57
58 val |= config;
59
60 + if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
61 + val |= MTK_GDMA_SPECIAL_TAG;
62 +
63 mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
64 }
65 /* Reset and enable PSE */
66 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
67 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
68 @@ -82,6 +82,7 @@
69
70 /* GDM Exgress Control Register */
71 #define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
72 +#define MTK_GDMA_SPECIAL_TAG BIT(24)
73 #define MTK_GDMA_ICS_EN BIT(22)
74 #define MTK_GDMA_TCS_EN BIT(21)
75 #define MTK_GDMA_UCS_EN BIT(20)