target/linux/generic/pending-5.15/733-02-net-ethernet-mtk_eth_soc-fix-RX-data-corruption-issu.patch

   1 From e0eb504b1c9f973427a33d7ffef29ddecdb464b9 Mon Sep 17 00:00:00 2001
   2 From: Daniel Golle <daniel@makrotopia.org>
   3 Date: Mon, 23 Jan 2023 00:56:02 +0000
   4 Subject: [PATCH] net: ethernet: mtk_eth_soc: fix RX data corruption issue
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
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   8
   9 Also set bit 12 when setting up MAC MCR, as MediaTek SDK did the same
  10 change stating:
  11 "If without this patch, kernel might receive invalid packets that are
  12 corrupted by GMAC."[1]
  13 This fixes issues with <= 1G speed where we could previously observe
  14 about 30% packet loss while the bad packet counter was increasing.
  15 Unfortunately the meaning of bit 12 is not documented anywhere in SDK
  16 code or datasheets.
  17
  18 [1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/d8a2975939a12686c4a95c40db21efdc3f821f63
  19 Tested-by: Bjørn Mork <bjorn@mork.no>
  20 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  21 ---
  22  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +-
  23  drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
  24  2 files changed, 2 insertions(+), 1 deletion(-)
  25
  26 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  27 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  28 @@ -528,7 +528,7 @@ static int mtk_mac_finish(struct phylink
  29         /* Setup gmac */
  30         mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
  31         mcr_new = mcr_cur;
  32 -       mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
  33 +       mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_BIT_12 | MAC_MCR_FORCE_MODE |
  34                    MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
  35
  36         /* Only update control register when needed! */
  37 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  38 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  39 @@ -392,6 +392,7 @@
  40  #define MAC_MCR_FORCE_MODE     BIT(15)
  41  #define MAC_MCR_TX_EN          BIT(14)
  42  #define MAC_MCR_RX_EN          BIT(13)
  43 +#define MAC_MCR_BIT_12         BIT(12)
  44  #define MAC_MCR_BACKOFF_EN     BIT(9)
  45  #define MAC_MCR_BACKPR_EN      BIT(8)
  46  #define MAC_MCR_FORCE_RX_FC    BIT(5)