kernel: bump 5.10 to 5.10.94
[openwrt/staging/jow.git] / target / linux / generic / pending-5.10 / 850-0016-PCI-aardvark-Add-support-for-PME-interrupts.patch
1 From 7acd8ef92e8789e10b5d736d73cea3b625087f26 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
3 Date: Wed, 8 Dec 2021 06:07:44 +0100
4 Subject: [PATCH] PCI: aardvark: Add support for PME interrupts
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does
10 nothing. This is because PCIe PME driver expects to receive PCIe interrupt
11 defined in PCI_EXP_FLAGS_IRQ register, but aardvark hardware does not
12 trigger PCIe INTx/MSI interrupt for PME event, rather it triggers custom
13 aardvark interrupt which this driver is not processing yet.
14
15 Fix this issue by handling PME interrupt in advk_pcie_handle_int() and
16 chaining it to PCIe interrupt 0 with generic_handle_domain_irq() (since
17 aardvark sets PCI_EXP_FLAGS_IRQ to zero). With this change PCIe PME driver
18 finally starts receiving PME interrupt.
19
20 Signed-off-by: Pali Rohár <pali@kernel.org>
21 Signed-off-by: Marek Behún <kabel@kernel.org>
22 ---
23 drivers/pci/controller/pci-aardvark.c | 13 +++++++++++++
24 1 file changed, 13 insertions(+)
25
26 --- a/drivers/pci/controller/pci-aardvark.c
27 +++ b/drivers/pci/controller/pci-aardvark.c
28 @@ -1491,6 +1491,19 @@ static void advk_pcie_handle_int(struct
29 isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
30 isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
31
32 + /* Process PME interrupt */
33 + if (isr0_status & PCIE_MSG_PM_PME_MASK) {
34 + /*
35 + * Do not clear PME interrupt bit in ISR0, it is cleared by IRQ
36 + * receiver by writing to the PCI_EXP_RTSTA register of emulated
37 + * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ,
38 + * so use PCIe interrupt 0.
39 + */
40 + virq = irq_find_mapping(pcie->irq_domain, 0);
41 + if (generic_handle_irq(virq) == -EINVAL)
42 + dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
43 + }
44 +
45 /* Process ERR interrupt */
46 if (isr0_status & PCIE_ISR0_ERR_MASK) {
47 advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG);