target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Driver for MikroTik RouterBoot soft config.
   4  *
   5  * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  *
  11  * This driver exposes the data encoded in the "soft_config" flash segment of
  12  * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder
  13  * named "soft_config". The data is presented in a user/machine-friendly way
  14  * with just as much parsing as can be generalized across mikrotik platforms
  15  * (as inferred from reverse-engineering).
  16  *
  17  * The known soft_config tags are presented in the "soft_config" sysfs folder,
  18  * with the addition of one specific file named "commit", which is only
  19  * available if the driver supports writes to the mtd device: no modifications
  20  * made to any of the other attributes are actually written back to flash media
  21  * until a true value is input into this file (e.g. [Yy1]). This is to avoid
  22  * unnecessary flash wear, and to permit to revert all changes by issuing a
  23  * false value ([Nn0]). Reading the content of this file shows the current
  24  * status of the driver: if the data in sysfs matches the content of the
  25  * soft_config partition, the file will read "clean". Otherwise, it will read
  26  * "dirty".
  27  *
  28  * The writeable sysfs files presented by this driver will accept only inputs
  29  * which are in a valid range for the given tag. As a design choice, the driver
  30  * will not assess whether the inputs are identical to the existing data.
  31  *
  32  * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show
  33  * routines need not check for output overflow.
  34  *
  35  * Some constant defines extracted from rbcfg.h by Gabor Juhos
  36  * <juhosg@openwrt.org>
  37  */
  38
  39 #include <linux/types.h>
  40 #include <linux/init.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/errno.h>
  44 #include <linux/kobject.h>
  45 #include <linux/string.h>
  46 #include <linux/mtd/mtd.h>
  47 #include <linux/sysfs.h>
  48 #include <linux/version.h>
  49 #include <linux/capability.h>
  50 #include <linux/spinlock.h>
  51 #include <linux/crc32.h>
  52
  53 #ifdef CONFIG_ATH79
  54  #include <asm/mach-ath79/ath79.h>
  55 #endif
  56
  57 #include "routerboot.h"
  58
  59 #define RB_SOFTCONFIG_VER               "0.03"
  60 #define RB_SC_PR_PFX                    "[rb_softconfig] "
  61
  62 /*
  63  * mtd operations before 4.17 are asynchronous, not handled by this code
  64  * Also make the driver act read-only if 4K_SECTORS are not enabled, since they
  65  * are require to handle partial erasing of the small soft_config partition.
  66  */
  67 #if defined(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS)
  68  #define RB_SC_HAS_WRITE_SUPPORT        true
  69  #define RB_SC_WMODE                    S_IWUSR
  70  #define RB_SC_RMODE                    S_IRUSR
  71 #else
  72  #define RB_SC_HAS_WRITE_SUPPORT        false
  73  #define RB_SC_WMODE                    0
  74  #define RB_SC_RMODE                    S_IRUSR
  75 #endif
  76
  77 /* ID values for software settings */
  78 #define RB_SCID_UART_SPEED              0x01    // u32*1
  79 #define RB_SCID_BOOT_DELAY              0x02    // u32*1
  80 #define RB_SCID_BOOT_DEVICE             0x03    // u32*1
  81 #define RB_SCID_BOOT_KEY                0x04    // u32*1
  82 #define RB_SCID_CPU_MODE                0x05    // u32*1
  83 #define RB_SCID_BIOS_VERSION            0x06    // str
  84 #define RB_SCID_BOOT_PROTOCOL           0x09    // u32*1
  85 #define RB_SCID_CPU_FREQ_IDX            0x0C    // u32*1
  86 #define RB_SCID_BOOTER                  0x0D    // u32*1
  87 #define RB_SCID_SILENT_BOOT             0x0F    // u32*1
  88 /*
  89  * protected_routerboot seems to use tag 0x1F. It only works in combination with
  90  * RouterOS, resulting in a wiped board otherwise, so it's not implemented here.
  91  * The tag values are as follows:
  92  * - off: 0x0
  93  * - on: the lower halfword encodes the max value in s for the reset feature,
  94  *       the higher halfword encodes the min value in s for the reset feature.
  95  * Default value when on: 0x00140258: 0x14 = 20s / 0x258= 600s
  96  * See details here: https://wiki.mikrotik.com/wiki/Manual:RouterBOARD_settings#Protected_bootloader
  97  */
  98
  99 /* Tag values */
 100
 101 #define RB_UART_SPEED_115200            0
 102 #define RB_UART_SPEED_57600             1
 103 #define RB_UART_SPEED_38400             2
 104 #define RB_UART_SPEED_19200             3
 105 #define RB_UART_SPEED_9600              4
 106 #define RB_UART_SPEED_4800              5
 107 #define RB_UART_SPEED_2400              6
 108 #define RB_UART_SPEED_1200              7
 109 #define RB_UART_SPEED_OFF               8
 110
 111 /* valid boot delay: 1 - 9s in 1s increment */
 112 #define RB_BOOT_DELAY_MIN               1
 113 #define RB_BOOT_DELAY_MAX               9
 114
 115 #define RB_BOOT_DEVICE_ETHER            0       // "boot over Ethernet"
 116 #define RB_BOOT_DEVICE_NANDETH          1       // "boot from NAND, if fail then Ethernet"
 117 #define RB_BOOT_DEVICE_CFCARD           2       // (not available in rbcfg)
 118 #define RB_BOOT_DEVICE_ETHONCE          3       // "boot Ethernet once, then NAND"
 119 #define RB_BOOT_DEVICE_NANDONLY         5       // "boot from NAND only"
 120 #define RB_BOOT_DEVICE_FLASHCFG         7       // "boot in flash configuration mode"
 121 #define RB_BOOT_DEVICE_FLSHONCE         8       // "boot in flash configuration mode once, then NAND"
 122
 123 /*
 124  * ATH79 9xxx CPU frequency indices.
 125  * It is unknown if they apply to all ATH79 RBs, and some do not seem to feature
 126  * the upper levels (QCA955x), while F is presumably AR9344-only.
 127  */
 128 #define RB_CPU_FREQ_IDX_ATH79_9X_A      (0 << 3)
 129 #define RB_CPU_FREQ_IDX_ATH79_9X_B      (1 << 3)        // 0x8
 130 #define RB_CPU_FREQ_IDX_ATH79_9X_C      (2 << 3)        // 0x10 - factory freq for many devices
 131 #define RB_CPU_FREQ_IDX_ATH79_9X_D      (3 << 3)        // 0x18
 132 #define RB_CPU_FREQ_IDX_ATH79_9X_E      (4 << 3)        // 0x20
 133 #define RB_CPU_FREQ_IDX_ATH79_9X_F      (5 << 3)        // 0x28
 134
 135 #define RB_CPU_FREQ_IDX_ATH79_9X_MIN            0       // all devices support lowest setting
 136 #define RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX     5       // stops at F
 137 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX    4       // stops at E
 138 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX    2       // stops at C
 139 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX    3       // stops at D
 140
 141 /* ATH79 7xxx CPU frequency indices. */
 142 #define RB_CPU_FREQ_IDX_ATH79_7X_A      ((0 * 9) << 4)
 143 #define RB_CPU_FREQ_IDX_ATH79_7X_B      ((1 * 9) << 4)
 144 #define RB_CPU_FREQ_IDX_ATH79_7X_C      ((2 * 9) << 4)
 145 #define RB_CPU_FREQ_IDX_ATH79_7X_D      ((3 * 9) << 4)
 146 #define RB_CPU_FREQ_IDX_ATH79_7X_E      ((4 * 9) << 4)
 147 #define RB_CPU_FREQ_IDX_ATH79_7X_F      ((5 * 9) << 4)
 148 #define RB_CPU_FREQ_IDX_ATH79_7X_G      ((6 * 9) << 4)
 149 #define RB_CPU_FREQ_IDX_ATH79_7X_H      ((7 * 9) << 4)
 150
 151 #define RB_CPU_FREQ_IDX_ATH79_7X_MIN            0       // all devices support lowest setting
 152 #define RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX     3       // stops at D
 153 #define RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX     7       // stops at H - check if applies to all AR71xx devices
 154
 155 #define RB_SC_CRC32_OFFSET              4       // located right after magic
 156
 157 static struct kobject *sc_kobj;
 158 static u8 *sc_buf;
 159 static size_t sc_buflen;
 160 static rwlock_t sc_bufrwl;              // rw lock to sc_buf
 161
 162 /* MUST be used with lock held */
 163 #define RB_SC_CLRCRC()          *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = 0
 164 #define RB_SC_GETCRC()          *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET)
 165 #define RB_SC_SETCRC(_crc)      *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = (_crc)
 166
 167 struct sc_u32tvs {
 168         const u32 val;
 169         const char *str;
 170 };
 171
 172 #define RB_SC_TVS(_val, _str) {         \
 173         .val = (_val),                  \
 174         .str = (_str),                  \
 175 }
 176
 177 static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf,
 178                                   const struct sc_u32tvs tvs[], const int tvselmts)
 179 {
 180         const char *fmt;
 181         char *out = buf;
 182         u32 data;       // cpu-endian
 183         int i;
 184
 185         // fallback to raw hex output if we can't handle the input
 186         if (tvselmts < 0)
 187                 return routerboot_tag_show_u32s(pld, pld_len, buf);
 188
 189         if (sizeof(data) != pld_len)
 190                 return -EINVAL;
 191
 192         read_lock(&sc_bufrwl);
 193         data = *(u32 *)pld;             // pld aliases sc_buf
 194         read_unlock(&sc_bufrwl);
 195
 196         for (i = 0; i < tvselmts; i++) {
 197                 fmt = (tvs[i].val == data) ? "[%s] " : "%s ";
 198                 out += sprintf(out, fmt, tvs[i].str);
 199         }
 200
 201         out += sprintf(out, "\n");
 202         return out - buf;
 203 }
 204
 205 static ssize_t sc_tag_store_u32tvs(const u8 *pld, u16 pld_len, const char *buf, size_t count,
 206                                    const struct sc_u32tvs tvs[], const int tvselmts)
 207 {
 208         int i;
 209
 210         if (tvselmts < 0)
 211                 return tvselmts;
 212
 213         if (sizeof(u32) != pld_len)
 214                 return -EINVAL;
 215
 216         for (i = 0; i < tvselmts; i++) {
 217                 if (sysfs_streq(buf, tvs[i].str)) {
 218                         write_lock(&sc_bufrwl);
 219                         *(u32 *)pld = tvs[i].val;       // pld aliases sc_buf
 220                         RB_SC_CLRCRC();
 221                         write_unlock(&sc_bufrwl);
 222                         return count;
 223                 }
 224         }
 225
 226         return -EINVAL;
 227 }
 228
 229 struct sc_boolts {
 230         const char *strfalse;
 231         const char *strtrue;
 232 };
 233
 234 static ssize_t sc_tag_show_boolts(const u8 *pld, u16 pld_len, char *buf,
 235                                   const struct sc_boolts *bts)
 236 {
 237         const char *fmt;
 238         char *out = buf;
 239         u32 data;       // cpu-endian
 240
 241         if (sizeof(data) != pld_len)
 242                 return -EINVAL;
 243
 244         read_lock(&sc_bufrwl);
 245         data = *(u32 *)pld;             // pld aliases sc_buf
 246         read_unlock(&sc_bufrwl);
 247
 248         fmt = (data) ? "%s [%s]\n" : "[%s] %s\n";
 249         out += sprintf(out, fmt, bts->strfalse, bts->strtrue);
 250
 251         return out - buf;
 252 }
 253
 254 static ssize_t sc_tag_store_boolts(const u8 *pld, u16 pld_len, const char *buf, size_t count,
 255                                    const struct sc_boolts *bts)
 256 {
 257         u32 data;       // cpu-endian
 258
 259         if (sizeof(data) != pld_len)
 260                 return -EINVAL;
 261
 262         if (sysfs_streq(buf, bts->strfalse))
 263                 data = 0;
 264         else if (sysfs_streq(buf, bts->strtrue))
 265                 data = 1;
 266         else
 267                 return -EINVAL;
 268
 269         write_lock(&sc_bufrwl);
 270         *(u32 *)pld = data;             // pld aliases sc_buf
 271         RB_SC_CLRCRC();
 272         write_unlock(&sc_bufrwl);
 273
 274         return count;
 275 }
 276 static struct sc_u32tvs const sc_uartspeeds[] = {
 277         RB_SC_TVS(RB_UART_SPEED_OFF,    "off"),
 278         RB_SC_TVS(RB_UART_SPEED_1200,   "1200"),
 279         RB_SC_TVS(RB_UART_SPEED_2400,   "2400"),
 280         RB_SC_TVS(RB_UART_SPEED_4800,   "4800"),
 281         RB_SC_TVS(RB_UART_SPEED_9600,   "9600"),
 282         RB_SC_TVS(RB_UART_SPEED_19200,  "19200"),
 283         RB_SC_TVS(RB_UART_SPEED_38400,  "38400"),
 284         RB_SC_TVS(RB_UART_SPEED_57600,  "57600"),
 285         RB_SC_TVS(RB_UART_SPEED_115200, "115200"),
 286 };
 287
 288 /*
 289  * While the defines are carried over from rbcfg, use strings that more clearly
 290  * show the actual setting purpose (especially since the NAND* settings apply
 291  * to both nand- and nor-based devices). "cfcard" was disabled in rbcfg: disable
 292  * it here too.
 293  */
 294 static struct sc_u32tvs const sc_bootdevices[] = {
 295         RB_SC_TVS(RB_BOOT_DEVICE_ETHER,         "eth"),
 296         RB_SC_TVS(RB_BOOT_DEVICE_NANDETH,       "flasheth"),
 297         //RB_SC_TVS(RB_BOOT_DEVICE_CFCARD,      "cfcard"),
 298         RB_SC_TVS(RB_BOOT_DEVICE_ETHONCE,       "ethonce"),
 299         RB_SC_TVS(RB_BOOT_DEVICE_NANDONLY,      "flash"),
 300         RB_SC_TVS(RB_BOOT_DEVICE_FLASHCFG,      "cfg"),
 301         RB_SC_TVS(RB_BOOT_DEVICE_FLSHONCE,      "cfgonce"),
 302 };
 303
 304 static struct sc_boolts const sc_bootkey = {
 305         .strfalse = "any",
 306         .strtrue = "del",
 307 };
 308
 309 static struct sc_boolts const sc_cpumode = {
 310         .strfalse = "powersave",
 311         .strtrue = "regular",
 312 };
 313
 314 static struct sc_boolts const sc_bootproto = {
 315         .strfalse = "bootp",
 316         .strtrue = "dhcp",
 317 };
 318
 319 static struct sc_boolts const sc_booter = {
 320         .strfalse = "regular",
 321         .strtrue = "backup",
 322 };
 323
 324 static struct sc_boolts const sc_silent_boot = {
 325         .strfalse = "off",
 326         .strtrue = "on",
 327 };
 328
 329 #define SC_TAG_SHOW_STORE_U32TVS_FUNCS(_name)           \
 330 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)       \
 331 {                                                                               \
 332         return sc_tag_show_u32tvs(pld, pld_len, buf, sc_##_name, ARRAY_SIZE(sc_##_name));       \
 333 }                                                                               \
 334 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)  \
 335 {                                                                               \
 336         return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_##_name, ARRAY_SIZE(sc_##_name));       \
 337 }
 338
 339 #define SC_TAG_SHOW_STORE_BOOLTS_FUNCS(_name)           \
 340 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)       \
 341 {                                                                               \
 342         return sc_tag_show_boolts(pld, pld_len, buf, &sc_##_name);      \
 343 }                                                                               \
 344 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)  \
 345 {                                                                               \
 346         return sc_tag_store_boolts(pld, pld_len, buf, count, &sc_##_name);      \
 347 }
 348
 349 SC_TAG_SHOW_STORE_U32TVS_FUNCS(uartspeeds)
 350 SC_TAG_SHOW_STORE_U32TVS_FUNCS(bootdevices)
 351 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootkey)
 352 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(cpumode)
 353 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootproto)
 354 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(booter)
 355 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(silent_boot)
 356
 357 static ssize_t sc_tag_show_bootdelays(const u8 *pld, u16 pld_len, char *buf)
 358 {
 359         const char *fmt;
 360         char *out = buf;
 361         u32 data;       // cpu-endian
 362         int i;
 363
 364         if (sizeof(data) != pld_len)
 365                 return -EINVAL;
 366
 367         read_lock(&sc_bufrwl);
 368         data = *(u32 *)pld;             // pld aliases sc_buf
 369         read_unlock(&sc_bufrwl);
 370
 371         for (i = RB_BOOT_DELAY_MIN; i <= RB_BOOT_DELAY_MAX; i++) {
 372                 fmt = (i == data) ? "[%d] " : "%d ";
 373                 out += sprintf(out, fmt, i);
 374         }
 375
 376         out += sprintf(out, "\n");
 377         return out - buf;
 378 }
 379
 380 static ssize_t sc_tag_store_bootdelays(const u8 *pld, u16 pld_len, const char *buf, size_t count)
 381 {
 382         u32 data;       // cpu-endian
 383         int ret;
 384
 385         if (sizeof(data) != pld_len)
 386                 return -EINVAL;
 387
 388         ret = kstrtou32(buf, 10, &data);
 389         if (ret)
 390                 return ret;
 391
 392         if ((data < RB_BOOT_DELAY_MIN) || (RB_BOOT_DELAY_MAX < data))
 393                 return -EINVAL;
 394
 395         write_lock(&sc_bufrwl);
 396         *(u32 *)pld = data;             // pld aliases sc_buf
 397         RB_SC_CLRCRC();
 398         write_unlock(&sc_bufrwl);
 399
 400         return count;
 401 }
 402
 403 /* Support CPU frequency accessors only when the tag format has been asserted */
 404 #if defined(CONFIG_ATH79)
 405 /* Use the same letter-based nomenclature as RouterBOOT */
 406 static struct sc_u32tvs const sc_cpufreq_indexes_ath79_9x[] = {
 407         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_A,   "a"),
 408         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_B,   "b"),
 409         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_C,   "c"),
 410         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_D,   "d"),
 411         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_E,   "e"),
 412         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_F,   "f"),
 413 };
 414
 415 static struct sc_u32tvs const sc_cpufreq_indexes_ath79_7x[] = {
 416         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_A,   "a"),
 417         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_B,   "b"),
 418         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_C,   "c"),
 419         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_D,   "d"),
 420         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_E,   "e"),
 421         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_F,   "f"),
 422         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_G,   "g"),
 423         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_H,   "h"),
 424 };
 425
 426 static int sc_tag_cpufreq_ath79_arraysize(void)
 427 {
 428         int idx_max;
 429
 430         if (ATH79_SOC_AR7161 == ath79_soc)
 431                 idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX+1;
 432         else if (soc_is_ar724x())
 433                 idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX+1;
 434         else if (soc_is_ar9344())
 435                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX+1;
 436         else if (soc_is_qca953x())
 437                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX+1;
 438         else if (soc_is_qca9556())
 439                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX+1;
 440         else if (soc_is_qca9558())
 441                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX+1;
 442         else
 443                 idx_max = -EOPNOTSUPP;
 444
 445         return idx_max;
 446 }
 447
 448 static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char *buf)
 449 {
 450         const struct sc_u32tvs *tvs;
 451
 452         if (soc_is_ar71xx() || soc_is_ar724x())
 453                 tvs = sc_cpufreq_indexes_ath79_7x;
 454         else
 455                 tvs = sc_cpufreq_indexes_ath79_9x;
 456
 457         return sc_tag_show_u32tvs(pld, pld_len, buf, tvs, sc_tag_cpufreq_ath79_arraysize());
 458 }
 459
 460 static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count)
 461 {
 462         const struct sc_u32tvs *tvs;
 463
 464         if (soc_is_ar71xx() || soc_is_ar724x())
 465                 tvs = sc_cpufreq_indexes_ath79_7x;
 466         else
 467                 tvs = sc_cpufreq_indexes_ath79_9x;
 468
 469         return sc_tag_store_u32tvs(pld, pld_len, buf, count, tvs, sc_tag_cpufreq_ath79_arraysize());
 470 }
 471 #else
 472  /* By default we only show the raw value to help with reverse-engineering */
 473  #define sc_tag_show_cpufreq_indexes    routerboot_tag_show_u32s
 474  #define sc_tag_store_cpufreq_indexes   NULL
 475 #endif
 476
 477 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
 478                             char *buf);
 479 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
 480                              const char *buf, size_t count);
 481
 482 /* Array of known tags to publish in sysfs */
 483 static struct sc_attr {
 484         const u16 tag_id;
 485         /* sysfs tag show attribute. Must lock sc_buf when dereferencing pld */
 486         ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf);
 487         /* sysfs tag store attribute. Must lock sc_buf when dereferencing pld */
 488         ssize_t (* const tstore)(const u8 *pld, u16 pld_len, const char *buf, size_t count);
 489         struct kobj_attribute kattr;
 490         u16 pld_ofs;
 491         u16 pld_len;
 492 } sc_attrs[] = {
 493         {
 494                 .tag_id = RB_SCID_UART_SPEED,
 495                 .tshow = sc_tag_show_uartspeeds,
 496                 .tstore = sc_tag_store_uartspeeds,
 497                 .kattr = __ATTR(uart_speed, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 498         }, {
 499                 .tag_id = RB_SCID_BOOT_DELAY,
 500                 .tshow = sc_tag_show_bootdelays,
 501                 .tstore = sc_tag_store_bootdelays,
 502                 .kattr = __ATTR(boot_delay, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 503         }, {
 504                 .tag_id = RB_SCID_BOOT_DEVICE,
 505                 .tshow = sc_tag_show_bootdevices,
 506                 .tstore = sc_tag_store_bootdevices,
 507                 .kattr = __ATTR(boot_device, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 508         }, {
 509                 .tag_id = RB_SCID_BOOT_KEY,
 510                 .tshow = sc_tag_show_bootkey,
 511                 .tstore = sc_tag_store_bootkey,
 512                 .kattr = __ATTR(boot_key, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 513         }, {
 514                 .tag_id = RB_SCID_CPU_MODE,
 515                 .tshow = sc_tag_show_cpumode,
 516                 .tstore = sc_tag_store_cpumode,
 517                 .kattr = __ATTR(cpu_mode, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 518         }, {
 519                 .tag_id = RB_SCID_BIOS_VERSION,
 520                 .tshow = routerboot_tag_show_string,
 521                 .tstore = NULL,
 522                 .kattr = __ATTR(bios_version, RB_SC_RMODE, sc_attr_show, NULL),
 523         }, {
 524                 .tag_id = RB_SCID_BOOT_PROTOCOL,
 525                 .tshow = sc_tag_show_bootproto,
 526                 .tstore = sc_tag_store_bootproto,
 527                 .kattr = __ATTR(boot_proto, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 528         }, {
 529                 .tag_id = RB_SCID_CPU_FREQ_IDX,
 530                 .tshow = sc_tag_show_cpufreq_indexes,
 531                 .tstore = sc_tag_store_cpufreq_indexes,
 532                 .kattr = __ATTR(cpufreq_index, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 533         }, {
 534                 .tag_id = RB_SCID_BOOTER,
 535                 .tshow = sc_tag_show_booter,
 536                 .tstore = sc_tag_store_booter,
 537                 .kattr = __ATTR(booter, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 538         }, {
 539                 .tag_id = RB_SCID_SILENT_BOOT,
 540                 .tshow = sc_tag_show_silent_boot,
 541                 .tstore = sc_tag_store_silent_boot,
 542                 .kattr = __ATTR(silent_boot, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 543         },
 544 };
 545
 546 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
 547                             char *buf)
 548 {
 549         const struct sc_attr *sc_attr;
 550         const u8 *pld;
 551         u16 pld_len;
 552
 553         sc_attr = container_of(attr, typeof(*sc_attr), kattr);
 554
 555         if (!sc_attr->pld_len)
 556                 return -ENOENT;
 557
 558         pld = sc_buf + sc_attr->pld_ofs;        // pld aliases sc_buf -> lock!
 559         pld_len = sc_attr->pld_len;
 560
 561         return sc_attr->tshow(pld, pld_len, buf);
 562 }
 563
 564 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
 565                              const char *buf, size_t count)
 566 {
 567         const struct sc_attr *sc_attr;
 568         const u8 *pld;
 569         u16 pld_len;
 570
 571         if (!RB_SC_HAS_WRITE_SUPPORT)
 572                 return -EOPNOTSUPP;
 573
 574         if (!capable(CAP_SYS_ADMIN))
 575                 return -EACCES;
 576
 577         sc_attr = container_of(attr, typeof(*sc_attr), kattr);
 578
 579         if (!sc_attr->tstore)
 580                 return -EOPNOTSUPP;
 581
 582         if (!sc_attr->pld_len)
 583                 return -ENOENT;
 584
 585         pld = sc_buf + sc_attr->pld_ofs;        // pld aliases sc_buf -> lock!
 586         pld_len = sc_attr->pld_len;
 587
 588         return sc_attr->tstore(pld, pld_len, buf, count);
 589 }
 590
 591 /*
 592  * Shows the current buffer status:
 593  * "clean": the buffer is in sync with the mtd data
 594  * "dirty": the buffer is out of sync with the mtd data
 595  */
 596 static ssize_t sc_commit_show(struct kobject *kobj, struct kobj_attribute *attr,
 597                               char *buf)
 598 {
 599         const char *str;
 600         char *out = buf;
 601         u32 crc;
 602
 603         read_lock(&sc_bufrwl);
 604         crc = RB_SC_GETCRC();
 605         read_unlock(&sc_bufrwl);
 606
 607         str = (crc) ? "clean" : "dirty";
 608         out += sprintf(out, "%s\n", str);
 609
 610         return out - buf;
 611 }
 612
 613 /*
 614  * Performs buffer flushing:
 615  * This routine expects an input compatible with kstrtobool().
 616  * - a "false" input discards the current changes and reads data back from mtd.
 617  * - a "true" input commits the current changes to mtd.
 618  * If there is no pending changes, this routine is a no-op.
 619  * Handling failures is left as an exercise to userspace.
 620  */
 621 static ssize_t sc_commit_store(struct kobject *kobj, struct kobj_attribute *attr,
 622                               const char *buf, size_t count)
 623 {
 624         struct mtd_info *mtd;
 625         struct erase_info ei;
 626         size_t bytes_rw, ret = count;
 627         bool flush;
 628         u32 crc;
 629
 630         if (!RB_SC_HAS_WRITE_SUPPORT)
 631                 return -EOPNOTSUPP;
 632
 633         read_lock(&sc_bufrwl);
 634         crc = RB_SC_GETCRC();
 635         read_unlock(&sc_bufrwl);
 636
 637         if (crc)
 638                 return count;   // NO-OP
 639
 640         ret = kstrtobool(buf, &flush);
 641         if (ret)
 642                 return ret;
 643
 644         mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);    // TODO allow override
 645         if (IS_ERR(mtd))
 646                 return -ENODEV;
 647
 648         write_lock(&sc_bufrwl);
 649         if (!flush)     // reread
 650                 ret = mtd_read(mtd, 0, mtd->size, &bytes_rw, sc_buf);
 651         else {  // crc32 + commit
 652                 /*
 653                  * CRC32 is computed on the entire buffer, excluding the CRC
 654                  * value itself. CRC is already null when we reach this point,
 655                  * so we can compute the CRC32 on the buffer as is.
 656                  * The expected CRC32 is Ethernet FCS style, meaning the seed is
 657                  * ~0 and the final result is also bitflipped.
 658                  */
 659
 660                 crc = ~crc32(~0, sc_buf, sc_buflen);
 661                 RB_SC_SETCRC(crc);
 662
 663                 /*
 664                  * The soft_config partition is assumed to be entirely contained
 665                  * in a single eraseblock.
 666                  */
 667
 668                 ei.addr = 0;
 669                 ei.len = mtd->size;
 670                 ret = mtd_erase(mtd, &ei);
 671                 if (!ret)
 672                         ret = mtd_write(mtd, 0, mtd->size, &bytes_rw, sc_buf);
 673
 674                 /*
 675                  * Handling mtd_write() failure here is a tricky situation. The
 676                  * proposed approach is to let userspace deal with retrying,
 677                  * with the caveat that it must try to flush the buffer again as
 678                  * rereading the mtd contents could potentially read garbage.
 679                  * The rationale is: even if we keep a shadow buffer of the
 680                  * original content, there is no guarantee that we will ever be
 681                  * able to write it anyway.
 682                  * Regardless, it appears that RouterBOOT will ignore an invalid
 683                  * soft_config (including a completely wiped segment) and will
 684                  * write back factory defaults when it happens.
 685                  */
 686         }
 687         write_unlock(&sc_bufrwl);
 688
 689         put_mtd_device(mtd);
 690
 691         if (ret)
 692                 goto mtdfail;
 693
 694         if (bytes_rw != sc_buflen) {
 695                 ret = -EIO;
 696                 goto mtdfail;
 697         }
 698
 699         return count;
 700
 701 mtdfail:
 702         RB_SC_CLRCRC(); // mark buffer content as dirty/invalid
 703         return ret;
 704 }
 705
 706 static struct kobj_attribute sc_kattrcommit = __ATTR(commit, RB_SC_RMODE|RB_SC_WMODE, sc_commit_show, sc_commit_store);
 707
 708 int __init rb_softconfig_init(struct kobject *rb_kobj)
 709 {
 710         struct mtd_info *mtd;
 711         size_t bytes_read, buflen;
 712         const u8 *buf;
 713         int i, ret;
 714         u32 magic;
 715
 716         sc_buf = NULL;
 717         sc_kobj = NULL;
 718
 719         // TODO allow override
 720         mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);
 721         if (IS_ERR(mtd))
 722                 return -ENODEV;
 723
 724         sc_buflen = mtd->size;
 725         sc_buf = kmalloc(sc_buflen, GFP_KERNEL);
 726         if (!sc_buf) {
 727                 put_mtd_device(mtd);
 728                 return -ENOMEM;
 729         }
 730
 731         ret = mtd_read(mtd, 0, sc_buflen, &bytes_read, sc_buf);
 732         put_mtd_device(mtd);
 733
 734         if (ret)
 735                 goto fail;
 736
 737         if (bytes_read != sc_buflen) {
 738                 ret = -EIO;
 739                 goto fail;
 740         }
 741
 742         /* Check we have what we expect */
 743         magic = *(const u32 *)sc_buf;
 744         if (RB_MAGIC_SOFT != magic) {
 745                 ret = -EINVAL;
 746                 goto fail;
 747         }
 748
 749         /* Skip magic and 32bit CRC located immediately after */
 750         buf = sc_buf + (sizeof(magic) + sizeof(u32));
 751         buflen = sc_buflen - (sizeof(magic) + sizeof(u32));
 752
 753         /* Populate sysfs */
 754         ret = -ENOMEM;
 755         sc_kobj = kobject_create_and_add(RB_MTD_SOFT_CONFIG, rb_kobj);
 756         if (!sc_kobj)
 757                 goto fail;
 758
 759         rwlock_init(&sc_bufrwl);
 760
 761         /* Locate and publish all known tags */
 762         for (i = 0; i < ARRAY_SIZE(sc_attrs); i++) {
 763                 ret = routerboot_tag_find(buf, buflen, sc_attrs[i].tag_id,
 764                                           &sc_attrs[i].pld_ofs, &sc_attrs[i].pld_len);
 765                 if (ret) {
 766                         sc_attrs[i].pld_ofs = sc_attrs[i].pld_len = 0;
 767                         continue;
 768                 }
 769
 770                 /* Account for skipped magic and crc32 */
 771                 sc_attrs[i].pld_ofs += sizeof(magic) + sizeof(u32);
 772
 773                 ret = sysfs_create_file(sc_kobj, &sc_attrs[i].kattr.attr);
 774                 if (ret)
 775                         pr_warn(RB_SC_PR_PFX "Could not create %s sysfs entry (%d)\n",
 776                                sc_attrs[i].kattr.attr.name, ret);
 777         }
 778
 779         /* Finally add the 'commit' attribute */
 780         if (RB_SC_HAS_WRITE_SUPPORT) {
 781                 ret = sysfs_create_file(sc_kobj, &sc_kattrcommit.attr);
 782                 if (ret) {
 783                         pr_err(RB_SC_PR_PFX "Could not create %s sysfs entry (%d), aborting!\n",
 784                                sc_kattrcommit.attr.name, ret);
 785                         goto sysfsfail; // required attribute
 786                 }
 787         }
 788
 789         pr_info("MikroTik RouterBOARD software configuration sysfs driver v" RB_SOFTCONFIG_VER "\n");
 790
 791         return 0;
 792
 793 sysfsfail:
 794         kobject_put(sc_kobj);
 795         sc_kobj = NULL;
 796 fail:
 797         kfree(sc_buf);
 798         sc_buf = NULL;
 799         return ret;
 800 }
 801
 802 void __exit rb_softconfig_exit(void)
 803 {
 804         kobject_put(sc_kobj);
 805         kfree(sc_buf);
 806 }