generic: v6.1, v6.6: add patch to fix PHY-muxing on MT7530
[openwrt/staging/pepe2k.git] / target / linux / generic / backport-6.6 / 790-46-v6.10-net-dsa-mt7530-define-MAC-speed-capabilities-per-swi.patch
1 From 6cc2d4ccd77509df74b7b8ef46bbc6ba0a571318 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Mon, 22 Apr 2024 10:15:16 +0300
4 Subject: [PATCH 09/15] net: dsa: mt7530: define MAC speed capabilities per
5 switch model
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 With the support of the MT7988 SoC switch, the MAC speed capabilities
11 defined on mt753x_phylink_get_caps() won't apply to all switch models
12 anymore. Move them to more appropriate locations instead of overwriting
13 config->mac_capabilities.
14
15 Remove the comment on mt753x_phylink_get_caps() as it's become invalid with
16 the support of MT7531 and MT7988 SoC switch.
17
18 Add break to case 6 of mt7988_mac_port_get_caps() to be explicit.
19
20 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
21 ---
22 drivers/net/dsa/mt7530.c | 15 ++++++++++-----
23 1 file changed, 10 insertions(+), 5 deletions(-)
24
25 --- a/drivers/net/dsa/mt7530.c
26 +++ b/drivers/net/dsa/mt7530.c
27 @@ -2685,6 +2685,8 @@ mt7531_setup(struct dsa_switch *ds)
28 static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
29 struct phylink_config *config)
30 {
31 + config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
32 +
33 switch (port) {
34 /* Ports which are connected to switch PHYs. There is no MII pinout. */
35 case 0 ... 4:
36 @@ -2716,6 +2718,8 @@ static void mt7531_mac_port_get_caps(str
37 {
38 struct mt7530_priv *priv = ds->priv;
39
40 + config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
41 +
42 switch (port) {
43 /* Ports which are connected to switch PHYs. There is no MII pinout. */
44 case 0 ... 4:
45 @@ -2755,14 +2759,17 @@ static void mt7988_mac_port_get_caps(str
46 case 0 ... 3:
47 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
48 config->supported_interfaces);
49 +
50 + config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
51 break;
52
53 /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */
54 case 6:
55 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
56 config->supported_interfaces);
57 - config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
58 - MAC_10000FD;
59 +
60 + config->mac_capabilities |= MAC_10000FD;
61 + break;
62 }
63 }
64
65 @@ -2932,9 +2939,7 @@ static void mt753x_phylink_get_caps(stru
66 {
67 struct mt7530_priv *priv = ds->priv;
68
69 - /* This switch only supports full-duplex at 1Gbps */
70 - config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
71 - MAC_10 | MAC_100 | MAC_1000FD;
72 + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;
73
74 priv->info->mac_port_get_caps(ds, port, config);
75 }