target/linux/generic/backport-5.15/722-v6.0-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch

   1 From 6e1df49f330dce7c58a39d6772f1385b6887bb03 Mon Sep 17 00:00:00 2001
   2 Message-Id: <6e1df49f330dce7c58a39d6772f1385b6887bb03.1662990860.git.lorenzo@kernel.org>
   3 From: Lorenzo Bianconi <lorenzo@kernel.org>
   4 Date: Thu, 8 Sep 2022 11:26:10 +0200
   5 Subject: [PATCH net-next] net: ethernet: mtk_eth_wed: add axi bus support
   6
   7 Other than pcie bus, introduce support for axi bus to mtk wed driver.
   8 Axi bus is used to connect mt7986-wmac soc chip available on mt7986
   9 device.
  10
  11 Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
  12 Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
  13 Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
  14 Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
  15 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  16 ---
  17  drivers/net/ethernet/mediatek/mtk_wed.c      | 116 +++++++++++++------
  18  drivers/net/ethernet/mediatek/mtk_wed_regs.h |   2 +
  19  include/linux/soc/mediatek/mtk_wed.h         |  11 +-
  20  3 files changed, 91 insertions(+), 38 deletions(-)
  21
  22 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
  23 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
  24 @@ -85,11 +85,31 @@ static struct mtk_wed_hw *
  25  mtk_wed_assign(struct mtk_wed_device *dev)
  26  {
  27         struct mtk_wed_hw *hw;
  28 +       int i;
  29 +
  30 +       if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
  31 +               hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
  32 +               if (!hw)
  33 +                       return NULL;
  34 +
  35 +               if (!hw->wed_dev)
  36 +                       goto out;
  37 +
  38 +               if (hw->version == 1)
  39 +                       return NULL;
  40 +
  41 +               /* MT7986 WED devices do not have any pcie slot restrictions */
  42 +       }
  43 +       /* MT7986 PCIE or AXI */
  44 +       for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  45 +               hw = hw_list[i];
  46 +               if (hw && !hw->wed_dev)
  47 +                       goto out;
  48 +       }
  49
  50 -       hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
  51 -       if (!hw || hw->wed_dev)
  52 -               return NULL;
  53 +       return NULL;
  54
  55 +out:
  56         hw->wed_dev = dev;
  57         return hw;
  58  }
  59 @@ -322,7 +342,6 @@ mtk_wed_stop(struct mtk_wed_device *dev)
  60  static void
  61  mtk_wed_detach(struct mtk_wed_device *dev)
  62  {
  63 -       struct device_node *wlan_node = dev->wlan.pci_dev->dev.of_node;
  64         struct mtk_wed_hw *hw = dev->hw;
  65
  66         mutex_lock(&hw_lock);
  67 @@ -337,9 +356,14 @@ mtk_wed_detach(struct mtk_wed_device *de
  68         mtk_wed_free_buffer(dev);
  69         mtk_wed_free_tx_rings(dev);
  70
  71 -       if (of_dma_is_coherent(wlan_node) && hw->hifsys)
  72 -               regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
  73 -                                  BIT(hw->index), BIT(hw->index));
  74 +       if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
  75 +               struct device_node *wlan_node;
  76 +
  77 +               wlan_node = dev->wlan.pci_dev->dev.of_node;
  78 +               if (of_dma_is_coherent(wlan_node) && hw->hifsys)
  79 +                       regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
  80 +                                          BIT(hw->index), BIT(hw->index));
  81 +       }
  82
  83         if (!hw_list[!hw->index]->wed_dev &&
  84             hw->eth->dma_dev != hw->eth->dev)
  85 @@ -356,40 +380,47 @@ mtk_wed_detach(struct mtk_wed_device *de
  86  static void
  87  mtk_wed_bus_init(struct mtk_wed_device *dev)
  88  {
  89 -       struct device_node *np = dev->hw->eth->dev->of_node;
  90 -       struct regmap *regs;
  91 -       u32 val;
  92 -
  93 -       regs = syscon_regmap_lookup_by_phandle(np, "mediatek,wed-pcie");
  94 -       if (IS_ERR(regs))
  95 -               return;
  96 +       switch (dev->wlan.bus_type) {
  97 +       case MTK_WED_BUS_PCIE: {
  98 +               struct device_node *np = dev->hw->eth->dev->of_node;
  99 +               struct regmap *regs;
 100 +
 101 +               regs = syscon_regmap_lookup_by_phandle(np,
 102 +                                                      "mediatek,wed-pcie");
 103 +               if (IS_ERR(regs))
 104 +                       break;
 105
 106 -       regmap_update_bits(regs, 0, BIT(0), BIT(0));
 107 +               regmap_update_bits(regs, 0, BIT(0), BIT(0));
 108
 109 -       wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
 110 -               FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
 111 +               wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
 112 +                       FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
 113
 114 -       /* pcie interrupt control: pola/source selection */
 115 -       wed_set(dev, MTK_WED_PCIE_INT_CTRL,
 116 -               MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
 117 -               FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
 118 -       wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
 119 -
 120 -       val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
 121 -       val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
 122 -       wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
 123 -       wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
 124 -
 125 -       val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
 126 -       val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
 127 -
 128 -       /* pcie interrupt status trigger register */
 129 -       wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
 130 -       wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
 131 -
 132 -       /* pola setting */
 133 -       val = wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
 134 -       wed_set(dev, MTK_WED_PCIE_INT_CTRL, MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
 135 +               /* pcie interrupt control: pola/source selection */
 136 +               wed_set(dev, MTK_WED_PCIE_INT_CTRL,
 137 +                       MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
 138 +                       FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
 139 +               wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
 140 +
 141 +               wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
 142 +               wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
 143 +
 144 +               /* pcie interrupt status trigger register */
 145 +               wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
 146 +               wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
 147 +
 148 +               /* pola setting */
 149 +               wed_set(dev, MTK_WED_PCIE_INT_CTRL,
 150 +                       MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
 151 +               break;
 152 +       }
 153 +       case MTK_WED_BUS_AXI:
 154 +               wed_set(dev, MTK_WED_WPDMA_INT_CTRL,
 155 +                       MTK_WED_WPDMA_INT_CTRL_SIG_SRC |
 156 +                       FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_SRC_SEL, 0));
 157 +               break;
 158 +       default:
 159 +               break;
 160 +       }
 161  }
 162
 163  static void
 164 @@ -800,12 +831,14 @@ mtk_wed_attach(struct mtk_wed_device *de
 165         __releases(RCU)
 166  {
 167         struct mtk_wed_hw *hw;
 168 +       struct device *device;
 169         int ret = 0;
 170
 171         RCU_LOCKDEP_WARN(!rcu_read_lock_held(),
 172                          "mtk_wed_attach without holding the RCU read lock");
 173
 174 -       if (pci_domain_nr(dev->wlan.pci_dev->bus) > 1 ||
 175 +       if ((dev->wlan.bus_type == MTK_WED_BUS_PCIE &&
 176 +            pci_domain_nr(dev->wlan.pci_dev->bus) > 1) ||
 177             !try_module_get(THIS_MODULE))
 178                 ret = -ENODEV;
 179
 180 @@ -823,8 +856,10 @@ mtk_wed_attach(struct mtk_wed_device *de
 181                 goto out;
 182         }
 183
 184 -       dev_info(&dev->wlan.pci_dev->dev,
 185 -                "attaching wed device %d version %d\n",
 186 +       device = dev->wlan.bus_type == MTK_WED_BUS_PCIE
 187 +               ? &dev->wlan.pci_dev->dev
 188 +               : &dev->wlan.platform_dev->dev;
 189 +       dev_info(device, "attaching wed device %d version %d\n",
 190                  hw->index, hw->version);
 191
 192         dev->hw = hw;
 193 --- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
 194 +++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
 195 @@ -198,6 +198,8 @@ struct mtk_wdma_desc {
 196
 197  #define MTK_WED_WPDMA_INT_CTRL                         0x520
 198  #define MTK_WED_WPDMA_INT_CTRL_SUBRT_ADV               BIT(21)
 199 +#define MTK_WED_WPDMA_INT_CTRL_SIG_SRC                 BIT(22)
 200 +#define MTK_WED_WPDMA_INT_CTRL_SRC_SEL                 GENMASK(17, 16)
 201
 202  #define MTK_WED_WPDMA_INT_MASK                         0x524
 203
 204 --- a/include/linux/soc/mediatek/mtk_wed.h
 205 +++ b/include/linux/soc/mediatek/mtk_wed.h
 206 @@ -11,6 +11,11 @@
 207  struct mtk_wed_hw;
 208  struct mtk_wdma_desc;
 209
 210 +enum mtk_wed_bus_tye {
 211 +       MTK_WED_BUS_PCIE,
 212 +       MTK_WED_BUS_AXI,
 213 +};
 214 +
 215  struct mtk_wed_ring {
 216         struct mtk_wdma_desc *desc;
 217         dma_addr_t desc_phys;
 218 @@ -43,7 +48,11 @@ struct mtk_wed_device {
 219
 220         /* filled by driver: */
 221         struct {
 222 -               struct pci_dev *pci_dev;
 223 +               union {
 224 +                       struct platform_device *platform_dev;
 225 +                       struct pci_dev *pci_dev;
 226 +               };
 227 +               enum mtk_wed_bus_tye bus_type;
 228
 229                 u32 wpdma_phys;
 230                 u32 wpdma_int;