target/linux/generic/backport-5.15/703-19-v5.17-net-mvneta-use-phylink_generic_validate.patch

   1 From 02a0988b98930491db95966fb8086072e47dabb6 Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Mon, 15 Nov 2021 10:00:32 +0000
   4 Subject: [PATCH] net: mvneta: use phylink_generic_validate()
   5
   6 Convert mvneta to use phylink_generic_validate() for the bulk of its
   7 validate() implementation. This network adapter has a restriction
   8 that for 802.3z links, autonegotiation must be enabled.
   9
  10 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  11 Signed-off-by: David S. Miller <davem@davemloft.net>
  12 ---
  13  drivers/net/ethernet/marvell/mvneta.c | 34 ++++-----------------------
  14  1 file changed, 4 insertions(+), 30 deletions(-)
  15
  16 --- a/drivers/net/ethernet/marvell/mvneta.c
  17 +++ b/drivers/net/ethernet/marvell/mvneta.c
  18 @@ -3824,8 +3824,6 @@ static void mvneta_validate(struct phyli
  19                             unsigned long *supported,
  20                             struct phylink_link_state *state)
  21  {
  22 -       __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  23 -
  24         /* We only support QSGMII, SGMII, 802.3z and RGMII modes.
  25          * When in 802.3z mode, we must have AN enabled:
  26          * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
  27 @@ -3837,34 +3835,7 @@ static void mvneta_validate(struct phyli
  28                 return;
  29         }
  30
  31 -       /* Allow all the expected bits */
  32 -       phylink_set(mask, Autoneg);
  33 -       phylink_set_port_modes(mask);
  34 -
  35 -       /* Asymmetric pause is unsupported */
  36 -       phylink_set(mask, Pause);
  37 -
  38 -       /* Half-duplex at speeds higher than 100Mbit is unsupported */
  39 -       if (state->interface != PHY_INTERFACE_MODE_2500BASEX) {
  40 -               phylink_set(mask, 1000baseT_Full);
  41 -               phylink_set(mask, 1000baseX_Full);
  42 -       }
  43 -
  44 -       if (state->interface == PHY_INTERFACE_MODE_2500BASEX) {
  45 -               phylink_set(mask, 2500baseT_Full);
  46 -               phylink_set(mask, 2500baseX_Full);
  47 -       }
  48 -
  49 -       if (!phy_interface_mode_is_8023z(state->interface)) {
  50 -               /* 10M and 100M are only supported in non-802.3z mode */
  51 -               phylink_set(mask, 10baseT_Half);
  52 -               phylink_set(mask, 10baseT_Full);
  53 -               phylink_set(mask, 100baseT_Half);
  54 -               phylink_set(mask, 100baseT_Full);
  55 -       }
  56 -
  57 -       linkmode_and(supported, supported, mask);
  58 -       linkmode_and(state->advertising, state->advertising, mask);
  59 +       phylink_generic_validate(config, supported, state);
  60  }
  61
  62  static void mvneta_mac_pcs_get_state(struct phylink_config *config,
  63 @@ -5167,6 +5138,9 @@ static int mvneta_probe(struct platform_
  64
  65         pp->phylink_config.dev = &dev->dev;
  66         pp->phylink_config.type = PHYLINK_NETDEV;
  67 +       pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |
  68 +               MAC_100 | MAC_1000FD | MAC_2500FD;
  69 +
  70         phy_interface_set_rgmii(pp->phylink_config.supported_interfaces);
  71         __set_bit(PHY_INTERFACE_MODE_QSGMII,
  72                   pp->phylink_config.supported_interfaces);