target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch

   1 From ce81398dccb984855de606b75db25eddecdaa9e5 Mon Sep 17 00:00:00 2001
   2 From: Linus Walleij <linus.walleij@linaro.org>
   3 Date: Wed, 10 Oct 2018 20:25:39 +0200
   4 Subject: [PATCH 02/18] pinctrl: gemini: Fix up TVC clock group
   5
   6 The previous fix made the TVC clock get muxed in on the
   7 D-Link DIR-685 instead of giving nagging warnings of this
   8 not working. Not good. We didn't want that, as it breaks
   9 video.
  10
  11 Create a specific group for the TVC CLK, and break out
  12 a specific GPIO group for it on the SL3516 so we can use
  13 that line as GPIO if we don't need the TVC CLK.
  14
  15 Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly")
  16 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  17 ---
  18  drivers/pinctrl/pinctrl-gemini.c | 44 ++++++++++++++++++++++++++------
  19  1 file changed, 36 insertions(+), 8 deletions(-)
  20
  21 --- a/drivers/pinctrl/pinctrl-gemini.c
  22 +++ b/drivers/pinctrl/pinctrl-gemini.c
  23 @@ -591,13 +591,16 @@ static const unsigned int tvc_3512_pins[
  24         319, /* TVC_DATA[1] */
  25         301, /* TVC_DATA[2] */
  26         283, /* TVC_DATA[3] */
  27 -       265, /* TVC_CLK */
  28         320, /* TVC_DATA[4] */
  29         302, /* TVC_DATA[5] */
  30         284, /* TVC_DATA[6] */
  31         266, /* TVC_DATA[7] */
  32  };
  33
  34 +static const unsigned int tvc_clk_3512_pins[] = {
  35 +       265, /* TVC_CLK */
  36 +};
  37 +
  38  /* NAND flash pins */
  39  static const unsigned int nflash_3512_pins[] = {
  40         199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252,
  41 @@ -629,7 +632,7 @@ static const unsigned int pflash_3512_pi
  42  /* Serial flash pins CE0, CE1, DI, DO, CK */
  43  static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 };
  44
  45 -/* The GPIO0A (0) pin overlap with TVC and extended parallel flash */
  46 +/* The GPIO0A (0) pin overlap with TVC CLK and extended parallel flash */
  47  static const unsigned int gpio0a_3512_pins[] = { 265 };
  48
  49  /* The GPIO0B (1-4) pins overlap with TVC and ICE */
  50 @@ -823,7 +826,13 @@ static const struct gemini_pin_group gem
  51                 .num_pins = ARRAY_SIZE(tvc_3512_pins),
  52                 /* Conflict with character LCD and ICE */
  53                 .mask = LCD_PADS_ENABLE,
  54 -               .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
  55 +               .value = TVC_PADS_ENABLE,
  56 +       },
  57 +       {
  58 +               .name = "tvcclkgrp",
  59 +               .pins = tvc_clk_3512_pins,
  60 +               .num_pins = ARRAY_SIZE(tvc_clk_3512_pins),
  61 +               .value = TVC_CLK_PAD_ENABLE,
  62         },
  63         /*
  64          * The construction is done such that it is possible to use a serial
  65 @@ -860,8 +869,8 @@ static const struct gemini_pin_group gem
  66                 .name = "gpio0agrp",
  67                 .pins = gpio0a_3512_pins,
  68                 .num_pins = ARRAY_SIZE(gpio0a_3512_pins),
  69 -               /* Conflict with TVC */
  70 -               .mask = TVC_PADS_ENABLE,
  71 +               /* Conflict with TVC CLK */
  72 +               .mask = TVC_CLK_PAD_ENABLE,
  73         },
  74         {
  75                 .name = "gpio0bgrp",
  76 @@ -1531,13 +1540,16 @@ static const unsigned int tvc_3516_pins[
  77         311, /* TVC_DATA[1] */
  78         394, /* TVC_DATA[2] */
  79         374, /* TVC_DATA[3] */
  80 -       333, /* TVC_CLK */
  81         354, /* TVC_DATA[4] */
  82         395, /* TVC_DATA[5] */
  83         312, /* TVC_DATA[6] */
  84         334, /* TVC_DATA[7] */
  85  };
  86
  87 +static const unsigned int tvc_clk_3516_pins[] = {
  88 +       333, /* TVC_CLK */
  89 +};
  90 +
  91  /* NAND flash pins */
  92  static const unsigned int nflash_3516_pins[] = {
  93         243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283,
  94 @@ -1570,7 +1582,7 @@ static const unsigned int pflash_3516_pi
  95  static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 };
  96
  97  /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */
  98 -static const unsigned int gpio0a_3516_pins[] = { 333, 354, 395, 312, 334 };
  99 +static const unsigned int gpio0a_3516_pins[] = { 354, 395, 312, 334 };
 100
 101  /* The GPIO0B (5-7) pins overlap with ICE */
 102  static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 };
 103 @@ -1602,6 +1614,9 @@ static const unsigned int gpio0j_3516_pi
 104  /* The GPIO0K (30,31) pins overlap with NAND flash */
 105  static const unsigned int gpio0k_3516_pins[] = { 275, 298 };
 106
 107 +/* The GPIO0L (0) pins overlap with TVC_CLK */
 108 +static const unsigned int gpio0l_3516_pins[] = { 333 };
 109 +
 110  /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */
 111  static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 };
 112
 113 @@ -1761,7 +1776,13 @@ static const struct gemini_pin_group gem
 114                 .num_pins = ARRAY_SIZE(tvc_3516_pins),
 115                 /* Conflict with character LCD */
 116                 .mask = LCD_PADS_ENABLE,
 117 -               .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
 118 +               .value = TVC_PADS_ENABLE,
 119 +       },
 120 +       {
 121 +               .name = "tvcclkgrp",
 122 +               .pins = tvc_clk_3516_pins,
 123 +               .num_pins = ARRAY_SIZE(tvc_clk_3516_pins),
 124 +               .value = TVC_CLK_PAD_ENABLE,
 125         },
 126         /*
 127          * The construction is done such that it is possible to use a serial
 128 @@ -1873,6 +1894,13 @@ static const struct gemini_pin_group gem
 129                 .value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE,
 130         },
 131         {
 132 +               .name = "gpio0lgrp",
 133 +               .pins = gpio0l_3516_pins,
 134 +               .num_pins = ARRAY_SIZE(gpio0l_3516_pins),
 135 +               /* Conflict with TVE CLK */
 136 +               .mask = TVC_CLK_PAD_ENABLE,
 137 +       },
 138 +       {
 139                 .name = "gpio1agrp",
 140                 .pins = gpio1a_3516_pins,
 141                 .num_pins = ARRAY_SIZE(gpio1a_3516_pins),