target/linux/gemini/patches-4.14/0007-pinctrl-gemini-Fix-GMAC-groups.patch

   1 From e7759c44e0c20dd6b5a259300acdc7350ea6dd32 Mon Sep 17 00:00:00 2001
   2 From: Linus Walleij <linus.walleij@linaro.org>
   3 Date: Mon, 6 Nov 2017 21:27:34 +0100
   4 Subject: [PATCH 07/31] pinctrl: gemini: Fix GMAC groups
   5
   6 The GMII groups need to be split across GMAC0 and GMAC1 since
   7 GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7
   8 so we might want just one interface out.
   9
  10 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  11 ---
  12  drivers/pinctrl/pinctrl-gemini.c | 79 +++++++++++++++++++++++++++-------------
  13  1 file changed, 54 insertions(+), 25 deletions(-)
  14
  15 --- a/drivers/pinctrl/pinctrl-gemini.c
  16 +++ b/drivers/pinctrl/pinctrl-gemini.c
  17 @@ -96,6 +96,13 @@ struct gemini_pin_group {
  18   *   you are stuck with it.
  19   */
  20  #define GLOBAL_MISC_CTRL       0x30
  21 +#define GEMINI_GMAC_IOSEL_MASK GENMASK(28, 27)
  22 +/* Not really used */
  23 +#define GEMINI_GMAC_IOSEL_GMAC0_GMII   BIT(28)
  24 +/* Activated with GMAC1 */
  25 +#define GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII BIT(27)
  26 +/* This will be the default */
  27 +#define GEMINI_GMAC_IOSEL_GMAC0_RGMII_GMAC1_GPIO2 0
  28  #define TVC_CLK_PAD_ENABLE     BIT(20)
  29  #define PCI_CLK_PAD_ENABLE     BIT(17)
  30  #define LPC_CLK_PAD_ENABLE     BIT(16)
  31 @@ -109,8 +116,8 @@ struct gemini_pin_group {
  32  #define NAND_PADS_DISABLE      BIT(2)
  33  #define PFLASH_PADS_DISABLE    BIT(1)
  34  #define SFLASH_PADS_DISABLE    BIT(0)
  35 -#define PADS_MASK              (GENMASK(9, 0) | BIT(16) | BIT(17) | BIT(20))
  36 -#define PADS_MAXBIT            20
  37 +#define PADS_MASK              (GENMASK(9, 0) | BIT(16) | BIT(17) | BIT(20) | BIT(27))
  38 +#define PADS_MAXBIT            27
  39
  40  /* Ordered by bit index */
  41  static const char * const gemini_padgroups[] = {
  42 @@ -516,9 +523,12 @@ static const unsigned int usb_3512_pins[
  43  };
  44
  45  /* GMII, ethernet pins */
  46 -static const unsigned int gmii_3512_pins[] = {
  47 -       311, 240, 258, 276, 294, 312, 241, 259, 277, 295, 313, 242, 260, 278, 296,
  48 -       315, 297, 279, 261, 243, 316, 298, 280, 262, 244, 317, 299, 281
  49 +static const unsigned int gmii_gmac0_3512_pins[] = {
  50 +       240, 241, 242, 258, 259, 260, 276, 277, 278, 294, 295, 311, 312, 313
  51 +};
  52 +
  53 +static const unsigned int gmii_gmac1_3512_pins[] = {
  54 +       243, 244, 261, 262, 279, 280, 281, 296, 297, 298, 299, 315, 316, 317
  55  };
  56
  57  static const unsigned int pci_3512_pins[] = {
  58 @@ -668,10 +678,10 @@ static const unsigned int gpio1c_3512_pi
  59  /* The GPIO1D (28-31) pins overlap with LCD and TVC */
  60  static const unsigned int gpio1d_3512_pins[] = { 246, 319, 301, 283 };
  61
  62 -/* The GPIO2A (0-3) pins overlap with GMII and extended parallel flash */
  63 +/* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
  64  static const unsigned int gpio2a_3512_pins[] = { 315, 297, 279, 261 };
  65
  66 -/* The GPIO2B (4-7) pins overlap with GMII, extended parallel flash and LCD */
  67 +/* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
  68  static const unsigned int gpio2b_3512_pins[] = { 262, 244, 317, 299 };
  69
  70  /* The GPIO2C (8-31) pins overlap with PCI */
  71 @@ -738,9 +748,16 @@ static const struct gemini_pin_group gem
  72                 .num_pins = ARRAY_SIZE(usb_3512_pins),
  73         },
  74         {
  75 -               .name = "gmiigrp",
  76 -               .pins = gmii_3512_pins,
  77 -               .num_pins = ARRAY_SIZE(gmii_3512_pins),
  78 +               .name = "gmii_gmac0_grp",
  79 +               .pins = gmii_gmac0_3512_pins,
  80 +               .num_pins = ARRAY_SIZE(gmii_gmac0_3512_pins),
  81 +       },
  82 +       {
  83 +               .name = "gmii_gmac1_grp",
  84 +               .pins = gmii_gmac1_3512_pins,
  85 +               .num_pins = ARRAY_SIZE(gmii_gmac1_3512_pins),
  86 +               /* Bring out RGMII on the GMAC1 pins */
  87 +               .value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
  88         },
  89         {
  90                 .name = "pcigrp",
  91 @@ -954,14 +971,15 @@ static const struct gemini_pin_group gem
  92                 .name = "gpio2agrp",
  93                 .pins = gpio2a_3512_pins,
  94                 .num_pins = ARRAY_SIZE(gpio2a_3512_pins),
  95 -               /* Conflict with GMII and extended parallel flash */
  96 +               .mask = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
  97 +               /* Conflict with GMII GMAC1 and extended parallel flash */
  98         },
  99         {
 100                 .name = "gpio2bgrp",
 101                 .pins = gpio2b_3512_pins,
 102                 .num_pins = ARRAY_SIZE(gpio2b_3512_pins),
 103 -               /* Conflict with GMII, extended parallel flash and LCD */
 104 -               .mask = LCD_PADS_ENABLE,
 105 +               /* Conflict with GMII GMAC1, extended parallel flash and LCD */
 106 +               .mask = LCD_PADS_ENABLE | GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
 107         },
 108         {
 109                 .name = "gpio2cgrp",
 110 @@ -1441,9 +1459,12 @@ static const unsigned int usb_3516_pins[
 111  };
 112
 113  /* GMII, ethernet pins */
 114 -static const unsigned int gmii_3516_pins[] = {
 115 -       306, 307, 308, 309, 310, 325, 326, 327, 328, 329, 330, 345, 346, 347,
 116 -       348, 349, 350, 351, 367, 368, 369, 370, 371, 386, 387, 389, 390, 391
 117 +static const unsigned int gmii_gmac0_3516_pins[] = {
 118 +       306, 307, 325, 326, 327, 328, 345, 346, 347, 348, 367, 368, 386, 387
 119 +};
 120 +
 121 +static const unsigned int gmii_gmac1_3516_pins[] = {
 122 +       308, 309, 310, 329, 330, 349, 350, 351, 369, 370, 371, 389, 390, 391
 123  };
 124
 125  static const unsigned int pci_3516_pins[] = {
 126 @@ -1585,10 +1606,10 @@ static const unsigned int gpio1c_3516_pi
 127  /* The GPIO1D (28-31) pins overlap with TVC */
 128  static const unsigned int gpio1d_3516_pins[] = { 353, 311, 394, 374 };
 129
 130 -/* The GPIO2A (0-3) pins overlap with GMII and extended parallel flash */
 131 +/* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
 132  static const unsigned int gpio2a_3516_pins[] = { 308, 369, 389, 329 };
 133
 134 -/* The GPIO2B (4-7) pins overlap with GMII, extended parallel flash and LCD */
 135 +/* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
 136  static const unsigned int gpio2b_3516_pins[] = { 391, 351, 310, 371 };
 137
 138  /* The GPIO2C (8-31) pins overlap with PCI */
 139 @@ -1660,9 +1681,16 @@ static const struct gemini_pin_group gem
 140                 .num_pins = ARRAY_SIZE(usb_3516_pins),
 141         },
 142         {
 143 -               .name = "gmiigrp",
 144 -               .pins = gmii_3516_pins,
 145 -               .num_pins = ARRAY_SIZE(gmii_3516_pins),
 146 +               .name = "gmii_gmac0_grp",
 147 +               .pins = gmii_gmac0_3516_pins,
 148 +               .num_pins = ARRAY_SIZE(gmii_gmac0_3516_pins),
 149 +       },
 150 +       {
 151 +               .name = "gmii_gmac1_grp",
 152 +               .pins = gmii_gmac1_3516_pins,
 153 +               .num_pins = ARRAY_SIZE(gmii_gmac1_3516_pins),
 154 +               /* Bring out RGMII on the GMAC1 pins */
 155 +               .value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
 156         },
 157         {
 158                 .name = "pcigrp",
 159 @@ -1861,14 +1889,15 @@ static const struct gemini_pin_group gem
 160                 .name = "gpio2agrp",
 161                 .pins = gpio2a_3516_pins,
 162                 .num_pins = ARRAY_SIZE(gpio2a_3516_pins),
 163 -               /* Conflict with GMII and extended parallel flash */
 164 +               .mask = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
 165 +               /* Conflict with GMII GMAC1 and extended parallel flash */
 166         },
 167         {
 168                 .name = "gpio2bgrp",
 169                 .pins = gpio2b_3516_pins,
 170                 .num_pins = ARRAY_SIZE(gpio2b_3516_pins),
 171 -               /* Conflict with GMII, extended parallel flash and LCD */
 172 -               .mask = LCD_PADS_ENABLE,
 173 +               /* Conflict with GMII GMAC1, extended parallel flash and LCD */
 174 +               .mask = LCD_PADS_ENABLE | GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
 175         },
 176         {
 177                 .name = "gpio2cgrp",
 178 @@ -1971,7 +2000,7 @@ static const char * const icegrps[] = {
 179  static const char * const idegrps[] = { "idegrp" };
 180  static const char * const satagrps[] = { "satagrp" };
 181  static const char * const usbgrps[] = { "usbgrp" };
 182 -static const char * const gmiigrps[] = { "gmiigrp" };
 183 +static const char * const gmiigrps[] = { "gmii_gmac0_grp", "gmii_gmac1_grp" };
 184  static const char * const pcigrps[] = { "pcigrp" };
 185  static const char * const lpcgrps[] = { "lpcgrp" };
 186  static const char * const lcdgrps[] = { "lcdgrp" };