1 From b300b013de16109f833782d9f4e7ee8cc204780f Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Sat, 17 Jul 2021 11:19:29 -0500
4 Subject: [PATCH 077/117] spi: spi-sun6i: Dual/Quad RX Support
6 Signed-off-by: Samuel Holland <samuel@sholland.org>
8 drivers/spi/spi-sun6i.c | 17 +++++++++++++++--
9 1 file changed, 15 insertions(+), 2 deletions(-)
11 --- a/drivers/spi/spi-sun6i.c
12 +++ b/drivers/spi/spi-sun6i.c
14 #define SUN6I_XMIT_CNT_REG 0x34
16 #define SUN6I_BURST_CTL_CNT_REG 0x38
17 +#define SUN6I_BURST_CTL_CNT_QUAD_EN BIT(29)
18 +#define SUN6I_BURST_CTL_CNT_DUAL_EN BIT(28)
20 #define SUN6I_TXDATA_REG 0x200
21 #define SUN6I_RXDATA_REG 0x300
22 @@ -415,7 +417,17 @@ static int sun6i_spi_transfer_one(struct
23 /* Setup the counters */
24 sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, tfr->len);
25 sun6i_spi_write(sspi, SUN6I_XMIT_CNT_REG, tx_len);
26 - sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, tx_len);
29 + switch (tfr->rx_nbits) {
30 + case SPI_NBITS_QUAD:
31 + reg |= SUN6I_BURST_CTL_CNT_QUAD_EN;
33 + case SPI_NBITS_DUAL:
34 + reg |= SUN6I_BURST_CTL_CNT_DUAL_EN;
37 + sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, reg);
40 /* Fill the TX FIFO */
41 @@ -632,7 +644,8 @@ static int sun6i_spi_probe(struct platfo
42 master->set_cs = sun6i_spi_set_cs;
43 master->transfer_one = sun6i_spi_transfer_one;
44 master->num_chipselect = 4;
45 - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
46 + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST
47 + | SPI_RX_DUAL | SPI_RX_QUAD;
48 master->bits_per_word_mask = SPI_BPW_MASK(8);
49 master->dev.of_node = pdev->dev.of_node;
50 master->auto_runtime_pm = true;