bmips: dts: move leds dt-bindings include to SoCs
[openwrt/staging/stintel.git] / target / linux / bmips / dts / bcm6368-observa-vh4032n.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "bcm6368.dtsi"
4
5 / {
6 model = "Observa VH4032N";
7 compatible = "observa,vh4032n", "brcm,bcm6368";
8
9 aliases {
10 led-boot = &led_power_blue;
11 led-failsafe = &led_power_red;
12 led-running = &led_power_blue;
13 led-upgrade = &led_power_blue;
14 };
15
16 keys {
17 compatible = "gpio-keys-polled";
18 poll-interval = <100>;
19
20 reset {
21 label = "reset";
22 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
23 linux,code = <KEY_RESTART>;
24 debounce-interval = <60>;
25 };
26
27 rfkill {
28 label = "rfkill";
29 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RFKILL>;
31 debounce-interval = <60>;
32 };
33 };
34
35 leds {
36 compatible = "gpio-leds";
37
38 led@2 {
39 label = "blue:dsl";
40 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
41 };
42
43 led@5 {
44 label = "red:dsl";
45 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
46 };
47
48 led@11 {
49 label = "blue:hspa";
50 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
51 };
52
53 led@12 {
54 label = "red:hspa";
55 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
56 };
57
58 led_power_blue: led@22 {
59 function = LED_FUNCTION_POWER;
60 color = <LED_COLOR_ID_BLUE>;
61 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
62 };
63
64 led_power_red: led@24 {
65 function = LED_FUNCTION_POWER;
66 color = <LED_COLOR_ID_RED>;
67 gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
68 panic-indicator;
69 };
70
71 led@25 {
72 label = "blue:voice";
73 gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
74 };
75
76 led@26 {
77 label = "red:voice";
78 gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 bcm43222-sprom {
83 compatible = "brcm,ssb-sprom";
84
85 pci-bus = <0>;
86 pci-dev = <1>;
87
88 nvmem-cells = <&macaddr_cfe_6a0 1>;
89 nvmem-cell-names = "mac-address";
90
91 brcm,sprom = "brcm/bcm43222-sprom.bin";
92 brcm,sprom-fixups = <2 0x04d2>, <4 0x4350>,
93 <65 0x1300>, <68 0x0402>,
94 <70 0x0090>, <71 0x4c19>,
95 <72 0x2345>, <87 0x0315>,
96 <88 0x0315>, <96 0x2048>,
97 <97 0xfed7>, <98 0x15a6>,
98 <99 0xfaee>, <100 0x3e3a>,
99 <101 0x3a36>, <102 0xff7f>,
100 <103 0x11b9>, <104 0xfc53>,
101 <105 0xffe6>, <106 0xfdd2>,
102 <107 0xfe49>, <108 0xff6a>,
103 <109 0x136e>, <110 0xfbed>,
104 <111 0x0000>, <112 0x2048>,
105 <113 0xfee2>, <114 0x15e5>,
106 <115 0xfaed>, <116 0x3e3a>,
107 <117 0x3a36>, <118 0xffc8>,
108 <119 0x12b8>, <120 0xfca1>,
109 <121 0xff9b>, <122 0x122a>,
110 <123 0xfcc8>, <124 0xff95>,
111 <125 0x146b>, <126 0xfbba>,
112 <127 0x0000>, <161 0x0000>,
113 <162 0x0000>, <169 0x0000>,
114 <170 0x0000>, <171 0x0000>,
115 <172 0x0000>, <173 0x0000>,
116 <174 0x0000>, <175 0x0000>,
117 <176 0x0000>, <219 0x1108>;
118 };
119 };
120
121 &ehci {
122 status = "okay";
123 };
124
125 &ethernet {
126 status = "okay";
127
128 nvmem-cells = <&macaddr_cfe_6a0 0>;
129 nvmem-cell-names = "mac-address";
130 };
131
132 &gpio {
133 usb_hub_reset {
134 gpio-hog;
135 gpios = <27 GPIO_ACTIVE_HIGH>;
136 output-high;
137 line-name = "usb-hub-reset-gpio";
138 };
139 };
140
141 &ohci {
142 status = "okay";
143 };
144
145 &pci {
146 status = "okay";
147 };
148
149 &pflash {
150 status = "okay";
151
152 partitions {
153 compatible = "fixed-partitions";
154 #address-cells = <1>;
155 #size-cells = <1>;
156
157 partition@0 {
158 label = "CFE";
159 reg = <0x0000000 0x0020000>;
160 read-only;
161
162 nvmem-layout {
163 compatible = "fixed-layout";
164 #address-cells = <1>;
165 #size-cells = <1>;
166
167 macaddr_cfe_6a0: macaddr@6a0 {
168 compatible = "mac-base";
169 reg = <0x6a0 0x6>;
170 #nvmem-cell-cells = <1>;
171 };
172 };
173 };
174
175 partition@20000 {
176 compatible = "brcm,bcm963xx-imagetag";
177 label = "firmware";
178 reg = <0x0020000 0x1fc0000>;
179 };
180
181 partition@1fe0000 {
182 label = "nvram";
183 reg = <0x1fe0000 0x020000>;
184 };
185 };
186 };
187
188 &pinctrl {
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_ephy0_led &pinctrl_ephy1_led
191 &pinctrl_ephy2_led &pinctrl_ephy3_led>;
192 };
193
194 &switch0 {
195 ports {
196 port@0 {
197 reg = <0>;
198 label = "lan4";
199
200 phy-handle = <&phy1>;
201 phy-mode = "mii";
202 };
203
204 port@1 {
205 reg = <1>;
206 label = "lan3";
207
208 phy-handle = <&phy2>;
209 phy-mode = "mii";
210 };
211
212 port@2 {
213 reg = <2>;
214 label = "lan2";
215
216 phy-handle = <&phy3>;
217 phy-mode = "mii";
218 };
219
220 port@3 {
221 reg = <3>;
222 label = "lan1";
223
224 phy-handle = <&phy4>;
225 phy-mode = "mii";
226 };
227 };
228 };
229
230 &uart0 {
231 status = "okay";
232 };
233
234 &usbh {
235 status = "okay";
236 };