target/linux/bmips/dts/bcm6362.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/clock/bcm6362-clock.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10 #include <dt-bindings/leds/common.h>
  11 #include <dt-bindings/reset/bcm6362-reset.h>
  12 #include <dt-bindings/soc/bcm6362-pm.h>
  13
  14 / {
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17         compatible = "brcm,bcm6362";
  18
  19         aliases {
  20                 nflash = &nflash;
  21                 pinctrl = &pinctrl;
  22                 serial0 = &uart0;
  23                 serial1 = &uart1;
  24                 spi0 = &lsspi;
  25                 spi1 = &hsspi;
  26         };
  27
  28         chosen {
  29                 bootargs = "earlycon";
  30                 stdout-path = "serial0:115200n8";
  31         };
  32
  33         clocks {
  34                 periph_osc: periph-osc {
  35                         compatible = "fixed-clock";
  36
  37                         #clock-cells = <0>;
  38
  39                         clock-frequency = <50000000>;
  40                         clock-output-names = "periph";
  41                 };
  42
  43                 hsspi_osc: hsspi-osc {
  44                         compatible = "fixed-clock";
  45
  46                         #clock-cells = <0>;
  47
  48                         clock-frequency = <400000000>;
  49                         clock-output-names = "hsspi_osc";
  50                 };
  51         };
  52
  53         cpus {
  54                 #address-cells = <1>;
  55                 #size-cells = <0>;
  56                 mips-hpt-frequency = <200000000>;
  57
  58                 cpu@0 {
  59                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  60                         device_type = "cpu";
  61                         reg = <0>;
  62                 };
  63
  64                 cpu@1 {
  65                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  66                         device_type = "cpu";
  67                         reg = <1>;
  68                 };
  69         };
  70
  71         cpu_intc: interrupt-controller {
  72                 #address-cells = <0>;
  73                 compatible = "mti,cpu-interrupt-controller";
  74
  75                 interrupt-controller;
  76                 #interrupt-cells = <1>;
  77         };
  78
  79         memory@0 {
  80                 device_type = "memory";
  81                 reg = <0 0>;
  82         };
  83
  84         ubus {
  85                 #address-cells = <1>;
  86                 #size-cells = <1>;
  87
  88                 compatible = "simple-bus";
  89                 ranges;
  90
  91                 periph_clk: clock-controller@10000004 {
  92                         compatible = "brcm,bcm6362-clocks";
  93                         reg = <0x10000004 0x4>;
  94                         #clock-cells = <1>;
  95                 };
  96
  97                 pll_cntl: syscon@10000008 {
  98                         compatible = "syscon", "simple-mfd";
  99                         reg = <0x10000008 0x4>;
 100                         native-endian;
 101
 102                         syscon-reboot {
 103                                 compatible = "syscon-reboot";
 104                                 offset = <0x0>;
 105                                 mask = <0x1>;
 106                         };
 107                 };
 108
 109                 periph_rst: reset-controller@10000010 {
 110                         compatible = "brcm,bcm6345-reset";
 111                         reg = <0x10000010 0x4>;
 112                         #reset-cells = <1>;
 113                 };
 114
 115                 ext_intc: interrupt-controller@10000018 {
 116                         #address-cells = <1>;
 117                         compatible = "brcm,bcm6345-ext-intc";
 118                         reg = <0x10000018 0x4>;
 119
 120                         interrupt-controller;
 121                         #interrupt-cells = <2>;
 122
 123                         interrupt-parent = <&periph_intc>;
 124                         interrupts = <BCM6362_IRQ_EXT0>,
 125                                      <BCM6362_IRQ_EXT1>,
 126                                      <BCM6362_IRQ_EXT2>,
 127                                      <BCM6362_IRQ_EXT3>;
 128                 };
 129
 130                 periph_intc: interrupt-controller@10000020 {
 131                         #address-cells = <1>;
 132                         compatible = "brcm,bcm6345-l1-intc";
 133                         reg = <0x10000020 0x10>,
 134                               <0x10000030 0x10>;
 135
 136                         interrupt-controller;
 137                         #interrupt-cells = <1>;
 138
 139                         interrupt-parent = <&cpu_intc>;
 140                         interrupts = <2>, <3>;
 141                 };
 142
 143                 wdt: watchdog@1000005c {
 144                         compatible = "brcm,bcm7038-wdt";
 145                         reg = <0x1000005c 0xc>;
 146
 147                         clocks = <&periph_osc>;
 148
 149                         timeout-sec = <30>;
 150                 };
 151
 152                 gpio_cntl: syscon@10000080 {
 153                         #address-cells = <1>;
 154                         #size-cells = <1>;
 155                         compatible = "brcm,bcm6362-gpio-sysctl",
 156                                      "syscon", "simple-mfd";
 157                         reg = <0x10000080 0x80>;
 158                         ranges = <0 0x10000080 0x80>;
 159                         native-endian;
 160
 161                         gpio: gpio@0 {
 162                                 compatible = "brcm,bcm6362-gpio";
 163                                 reg-names = "dirout", "dat";
 164                                 reg = <0x0 0x8>, <0x8 0x8>;
 165
 166                                 gpio-controller;
 167                                 gpio-ranges = <&pinctrl 0 0 48>;
 168                                 #gpio-cells = <2>;
 169                         };
 170
 171                         pinctrl: pinctrl@18 {
 172                                 compatible = "brcm,bcm6362-pinctrl";
 173                                 reg = <0x18 0x10>, <0x38 0x4>;
 174
 175                                 pinctrl_usb_device_led: usb_device_led-pins {
 176                                         function = "usb_device_led";
 177                                         pins = "gpio0";
 178                                 };
 179
 180                                 pinctrl_sys_irq: sys_irq-pins {
 181                                         function = "sys_irq";
 182                                         pins = "gpio1";
 183                                 };
 184
 185                                 pinctrl_serial_led: serial_led-pins {
 186                                         pinctrl_serial_led_clk: serial_led_clk-pins {
 187                                                 function = "serial_led_clk";
 188                                                 pins = "gpio2";
 189                                         };
 190
 191                                         pinctrl_serial_led_data: serial_led_data-pins {
 192                                                 function = "serial_led_data";
 193                                                 pins = "gpio3";
 194                                         };
 195                                 };
 196
 197                                 pinctrl_robosw_led_data: robosw_led_data-pins {
 198                                         function = "robosw_led_data";
 199                                         pins = "gpio4";
 200                                 };
 201
 202                                 pinctrl_robosw_led_clk: robosw_led_clk-pins {
 203                                         function = "robosw_led_clk";
 204                                         pins = "gpio5";
 205                                 };
 206
 207                                 pinctrl_robosw_led0: robosw_led0-pins {
 208                                         function = "robosw_led0";
 209                                         pins = "gpio6";
 210                                 };
 211
 212                                 pinctrl_robosw_led1: robosw_led1-pins {
 213                                         function = "robosw_led1";
 214                                         pins = "gpio7";
 215                                 };
 216
 217                                 pinctrl_inet_led: inet_led-pins {
 218                                         function = "inet_led";
 219                                         pins = "gpio8";
 220                                 };
 221
 222                                 pinctrl_spi_cs2: spi_cs2-pins {
 223                                         function = "spi_cs2";
 224                                         pins = "gpio9";
 225                                 };
 226
 227                                 pinctrl_spi_cs3: spi_cs3-pins {
 228                                         function = "spi_cs3";
 229                                         pins = "gpio10";
 230                                 };
 231
 232                                 pinctrl_ntr_pulse: ntr_pulse-pins {
 233                                         function = "ntr_pulse";
 234                                         pins = "gpio11";
 235                                 };
 236
 237                                 pinctrl_uart1_scts: uart1_scts-pins {
 238                                         function = "uart1_scts";
 239                                         pins = "gpio12";
 240                                 };
 241
 242                                 pinctrl_uart1_srts: uart1_srts-pins {
 243                                         function = "uart1_srts";
 244                                         pins = "gpio13";
 245                                 };
 246
 247                                 pinctrl_uart1: uart1-pins {
 248                                         pinctrl_uart1_sdin: uart1_sdin-pins {
 249                                                 function = "uart1_sdin";
 250                                                 pins = "gpio14";
 251                                         };
 252
 253                                         pinctrl_uart1_sdout: uart1_sdout-pins {
 254                                                 function = "uart1_sdout";
 255                                                 pins = "gpio15";
 256                                         };
 257                                 };
 258
 259                                 pinctrl_adsl_spi: adsl_spi-pins {
 260                                         pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
 261                                                 function = "adsl_spi_miso";
 262                                                 pins = "gpio16";
 263                                         };
 264
 265                                         pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
 266                                                 function = "adsl_spi_mosi";
 267                                                 pins = "gpio17";
 268                                         };
 269
 270                                         pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
 271                                                 function = "adsl_spi_clk";
 272                                                 pins = "gpio18";
 273                                         };
 274
 275                                         pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
 276                                                 function = "adsl_spi_cs";
 277                                                 pins = "gpio19";
 278                                         };
 279                                 };
 280
 281                                 pinctrl_ephy0_led: ephy0_led-pins {
 282                                         function = "ephy0_led";
 283                                         pins = "gpio20";
 284                                 };
 285
 286                                 pinctrl_ephy1_led: ephy1_led-pins {
 287                                         function = "ephy1_led";
 288                                         pins = "gpio21";
 289                                 };
 290
 291                                 pinctrl_ephy2_led: ephy2_led-pins {
 292                                         function = "ephy2_led";
 293                                         pins = "gpio22";
 294                                 };
 295
 296                                 pinctrl_ephy3_led: ephy3_led-pins {
 297                                         function = "ephy3_led";
 298                                         pins = "gpio23";
 299                                 };
 300
 301                                 pinctrl_ext_irq0: ext_irq0-pins {
 302                                         function = "ext_irq0";
 303                                         pins = "gpio24";
 304                                 };
 305
 306                                 pinctrl_ext_irq1: ext_irq1-pins {
 307                                         function = "ext_irq1";
 308                                         pins = "gpio25";
 309                                 };
 310
 311                                 pinctrl_ext_irq2: ext_irq2-pins {
 312                                         function = "ext_irq2";
 313                                         pins = "gpio26";
 314                                 };
 315
 316                                 pinctrl_ext_irq3: ext_irq3-pins {
 317                                         function = "ext_irq3";
 318                                         pins = "gpio27";
 319                                 };
 320
 321                                 pinctrl_nand: nand-pins {
 322                                         function = "nand";
 323                                         group = "nand_grp";
 324                                 };
 325                         };
 326                 };
 327
 328                 uart0: serial@10000100 {
 329                         compatible = "brcm,bcm6345-uart";
 330                         reg = <0x10000100 0x18>;
 331
 332                         interrupt-parent = <&periph_intc>;
 333                         interrupts = <BCM6362_IRQ_UART0>;
 334
 335                         clocks = <&periph_osc>;
 336                         clock-names = "periph";
 337
 338                         status = "disabled";
 339                 };
 340
 341                 uart1: serial@10000120 {
 342                         compatible = "brcm,bcm6345-uart";
 343                         reg = <0x10000120 0x18>;
 344
 345                         interrupt-parent = <&periph_intc>;
 346                         interrupts = <BCM6362_IRQ_UART1>;
 347
 348                         clocks = <&periph_osc>;
 349                         clock-names = "periph";
 350
 351                         status = "disabled";
 352                 };
 353
 354                 nflash: nand@10000200 {
 355                         #address-cells = <1>;
 356                         #size-cells = <0>;
 357                         compatible = "brcm,nand-bcm6368",
 358                                      "brcm,brcmnand-v2.2",
 359                                      "brcm,brcmnand";
 360                         reg = <0x10000200 0x180>,
 361                               <0x10000600 0x200>,
 362                               <0x10000070 0x10>;
 363                         reg-names = "nand",
 364                                     "nand-cache",
 365                                     "nand-int-base";
 366
 367                         interrupt-parent = <&periph_intc>;
 368                         interrupts = <BCM6362_IRQ_NAND>;
 369
 370                         clocks = <&periph_clk BCM6362_CLK_NAND>;
 371                         clock-names = "nand";
 372
 373                         pinctrl-names = "default";
 374                         pinctrl-0 = <&pinctrl_nand>;
 375
 376                         status = "disabled";
 377                 };
 378
 379                 lsspi: spi@10000800 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         compatible = "brcm,bcm6358-spi";
 383                         reg = <0x10000800 0x70c>;
 384
 385                         interrupt-parent = <&periph_intc>;
 386                         interrupts = <BCM6362_IRQ_LSSPI>;
 387
 388                         clocks = <&periph_clk BCM6362_CLK_SPI>;
 389                         clock-names = "spi";
 390
 391                         resets = <&periph_rst BCM6362_RST_SPI>;
 392
 393                         status = "disabled";
 394                 };
 395
 396                 hsspi: spi@10001000 {
 397                         #address-cells = <1>;
 398                         #size-cells = <0>;
 399                         compatible = "brcm,bcm6328-hsspi";
 400                         reg = <0x10001000 0x600>;
 401
 402                         interrupt-parent = <&periph_intc>;
 403                         interrupts = <BCM6362_IRQ_HSSPI>;
 404
 405                         clocks = <&periph_clk BCM6362_CLK_HSSPI>,
 406                                  <&hsspi_osc>;
 407                         clock-names = "hsspi",
 408                                       "pll";
 409
 410                         resets = <&periph_rst BCM6362_RST_SPI>;
 411
 412                         status = "disabled";
 413                 };
 414
 415                 serdes_cntl: syscon@10001804 {
 416                         compatible = "syscon";
 417                         reg = <0x10001804 0x4>;
 418                         native-endian;
 419                 };
 420
 421                 periph_pwr: power-controller@10001848 {
 422                         compatible = "brcm,bcm6362-power-controller";
 423                         reg = <0x10001848 0x4>;
 424                         #power-domain-cells = <1>;
 425                 };
 426
 427                 leds: led-controller@10001900 {
 428                         #address-cells = <1>;
 429                         #size-cells = <0>;
 430                         compatible = "brcm,bcm6328-leds";
 431                         reg = <0x10001900 0x24>;
 432
 433                         status = "disabled";
 434                 };
 435
 436                 ehci: usb@10002500 {
 437                         compatible = "brcm,bcm6362-ehci", "generic-ehci";
 438                         reg = <0x10002500 0x100>;
 439                         big-endian;
 440                         spurious-oc;
 441
 442                         interrupt-parent = <&periph_intc>;
 443                         interrupts = <BCM6362_IRQ_EHCI>;
 444
 445                         phys = <&usbh 0>;
 446                         phy-names = "usb";
 447
 448                         status = "disabled";
 449                 };
 450
 451                 ohci: usb@10002600 {
 452                         compatible = "brcm,bcm6362-ohci", "generic-ohci";
 453                         reg = <0x10002600 0x100>;
 454                         big-endian;
 455                         no-big-frame-no;
 456
 457                         interrupt-parent = <&periph_intc>;
 458                         interrupts = <BCM6362_IRQ_OHCI>;
 459
 460                         phys = <&usbh 0>;
 461                         phy-names = "usb";
 462
 463                         status = "disabled";
 464                 };
 465
 466                 usbh: usb-phy@10002700 {
 467                         compatible = "brcm,bcm6362-usbh-phy";
 468                         reg = <0x10002700 0x38>;
 469
 470                         #phy-cells = <1>;
 471
 472                         clocks = <&periph_clk BCM6362_CLK_USBH>;
 473                         clock-names = "usbh";
 474
 475                         power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
 476                         resets = <&periph_rst BCM6362_RST_USBH>;
 477
 478                         status = "disabled";
 479                 };
 480
 481                 random: rng@10002880 {
 482                         compatible = "brcm,bcm6368-rng";
 483                         reg = <0x10002880 0x14>;
 484
 485                         clocks = <&periph_clk BCM6362_CLK_IPSEC>;
 486                         clock-names = "ipsec";
 487
 488                         resets = <&periph_rst BCM6362_RST_IPSEC>;
 489
 490                         power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_IPSEC>;
 491                 };
 492
 493                 ethernet: ethernet@1000d800 {
 494                         compatible = "brcm,bcm6362-enetsw";
 495                         reg = <0x1000d800 0x80>,
 496                               <0x1000da00 0x80>,
 497                               <0x1000dc00 0x80>;
 498                         reg-names = "dma",
 499                                     "dma-channels",
 500                                     "dma-sram";
 501
 502                         interrupt-parent = <&periph_intc>;
 503                         interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
 504                         interrupt-names = "rx";
 505
 506                         clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
 507                                  <&periph_clk BCM6362_CLK_SWPKT_SAR>,
 508                                  <&periph_clk BCM6362_CLK_ROBOSW>;
 509
 510                         resets = <&periph_rst BCM6362_RST_ENETSW>,
 511                                  <&periph_rst BCM6362_RST_EPHY>;
 512
 513                         power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
 514                                         <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
 515
 516                         dma-rx = <0>;
 517                         dma-tx = <1>;
 518
 519                         status = "disabled";
 520                 };
 521
 522                 switch0: switch@10e00000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "brcm,bcm6362-switch";
 526                         reg = <0x10e00000 0x8000>;
 527                         big-endian;
 528
 529                         ports {
 530                                 #address-cells = <1>;
 531                                 #size-cells = <0>;
 532
 533                                 port@8 {
 534                                         reg = <8>;
 535
 536                                         phy-mode = "internal";
 537                                         ethernet = <&ethernet>;
 538
 539                                         fixed-link {
 540                                                 speed = <1000>;
 541                                                 full-duplex;
 542                                         };
 543                                 };
 544                         };
 545                 };
 546
 547                 mdio: mdio@10e000b0 {
 548                         #address-cells = <1>;
 549                         #size-cells = <0>;
 550                         compatible = "brcm,bcm6368-mdio-mux";
 551                         reg = <0x10e000b0 0x8>;
 552
 553                         mdio_int: mdio@0 {
 554                                 #address-cells = <1>;
 555                                 #size-cells = <0>;
 556                                 reg = <0>;
 557
 558                                 phy1: ethernet-phy@1 {
 559                                         compatible = "ethernet-phy-ieee802.3-c22";
 560                                         reg = <1>;
 561                                 };
 562
 563                                 phy2: ethernet-phy@2 {
 564                                         compatible = "ethernet-phy-ieee802.3-c22";
 565                                         reg = <2>;
 566                                 };
 567
 568                                 phy3: ethernet-phy@3 {
 569                                         compatible = "ethernet-phy-ieee802.3-c22";
 570                                         reg = <3>;
 571                                 };
 572
 573                                 phy4: ethernet-phy@4 {
 574                                         compatible = "ethernet-phy-ieee802.3-c22";
 575                                         reg = <4>;
 576                                 };
 577                         };
 578
 579                         mdio_ext: mdio@1 {
 580                                 #address-cells = <1>;
 581                                 #size-cells = <0>;
 582                                 reg = <1>;
 583                         };
 584                 };
 585
 586                 pcie: pcie@10e40000 {
 587                         compatible = "brcm,bcm6328-pcie";
 588                         reg = <0x10e40000 0x10000>;
 589                         #address-cells = <3>;
 590                         #size-cells = <2>;
 591
 592                         device_type = "pci";
 593                         bus-range = <0x00 0x01>;
 594                         ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
 595                         linux,pci-probe-only = <1>;
 596
 597                         interrupt-parent = <&periph_intc>;
 598                         interrupts = <BCM6362_IRQ_PCIE_RC>;
 599
 600                         clocks = <&periph_clk BCM6362_CLK_PCIE>;
 601                         clock-names = "pcie";
 602
 603                         resets = <&periph_rst BCM6362_RST_PCIE>,
 604                                  <&periph_rst BCM6362_RST_PCIE_EXT>,
 605                                  <&periph_rst BCM6362_RST_PCIE_CORE>;
 606                         reset-names = "pcie",
 607                                       "pcie-ext",
 608                                       "pcie-core";
 609
 610                         power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
 611
 612                         brcm,serdes = <&serdes_cntl>;
 613
 614                         status = "disabled";
 615                 };
 616         };
 617 };