d61903e15480e196bac59b9a171f296d8220fad3
[openwrt/staging/stintel.git] / target / linux / bmips / dts / bcm6328.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6328-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6328-reset.h>
10 #include <dt-bindings/soc/bcm6328-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6328";
16
17 aliases {
18 nflash = &nflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi1 = &hsspi;
23 };
24
25 chosen {
26 bootargs = "earlycon";
27 stdout-path = "serial0:115200n8";
28 };
29
30 clocks {
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
33
34 #clock-cells = <0>;
35
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
38 };
39
40 hsspi_osc: hsspi-osc {
41 compatible = "fixed-clock";
42
43 #clock-cells = <0>;
44
45 clock-frequency = <133333333>;
46 clock-output-names = "hsspi_osc";
47 };
48 };
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53 mips-hpt-frequency = <160000000>;
54
55 cpu@0 {
56 compatible = "brcm,bmips4350", "mips,mips4Kc";
57 device_type = "cpu";
58 reg = <0>;
59 };
60
61 cpu@1 {
62 compatible = "brcm,bmips4350", "mips,mips4Kc";
63 device_type = "cpu";
64 reg = <1>;
65 };
66 };
67
68 cpu_intc: interrupt-controller {
69 #address-cells = <0>;
70 compatible = "mti,cpu-interrupt-controller";
71
72 interrupt-controller;
73 #interrupt-cells = <1>;
74 };
75
76 memory@0 {
77 device_type = "memory";
78 reg = <0 0>;
79 };
80
81 ubus {
82 #address-cells = <1>;
83 #size-cells = <1>;
84
85 compatible = "simple-bus";
86 ranges;
87
88 periph_clk: clock-controller@10000004 {
89 compatible = "brcm,bcm6328-clocks";
90 reg = <0x10000004 0x4>;
91 #clock-cells = <1>;
92 };
93
94 periph_rst: reset-controller@10000010 {
95 compatible = "brcm,bcm6345-reset";
96 reg = <0x10000010 0x4>;
97 #reset-cells = <1>;
98 };
99
100 ext_intc: interrupt-controller@10000018 {
101 #address-cells = <1>;
102 compatible = "brcm,bcm6345-ext-intc";
103 reg = <0x10000018 0x4>;
104
105 interrupt-controller;
106 #interrupt-cells = <2>;
107
108 interrupt-parent = <&periph_intc>;
109 interrupts = <BCM6328_IRQ_EXTO>,
110 <BCM6328_IRQ_EXT1>,
111 <BCM6328_IRQ_EXT2>,
112 <BCM6328_IRQ_EXT3>;
113 };
114
115 periph_intc: interrupt-controller@10000020 {
116 #address-cells = <1>;
117 compatible = "brcm,bcm6345-l1-intc";
118 reg = <0x10000020 0x10>,
119 <0x10000030 0x10>;
120
121 interrupt-controller;
122 #interrupt-cells = <1>;
123
124 interrupt-parent = <&cpu_intc>;
125 interrupts = <2>, <3>;
126 };
127
128 wdt: watchdog@1000005c {
129 compatible = "brcm,bcm7038-wdt";
130 reg = <0x1000005c 0xc>;
131
132 clocks = <&periph_osc>;
133
134 timeout-sec = <30>;
135 };
136
137 pll_cntl: syscon@10000068 {
138 compatible = "syscon", "simple-mfd";
139 reg = <0x10000068 0x4>;
140 native-endian;
141
142 syscon-reboot {
143 compatible = "syscon-reboot";
144 offset = <0>;
145 mask = <0x1>;
146 };
147 };
148
149 gpio_cntl: syscon@10000080 {
150 #address-cells = <1>;
151 #size-cells = <1>;
152 compatible = "brcm,bcm6328-gpio-sysctl",
153 "syscon", "simple-mfd";
154 reg = <0x10000080 0x80>;
155 ranges = <0 0x10000080 0x80>;
156 native-endian;
157
158 gpio: gpio@0 {
159 compatible = "brcm,bcm6328-gpio";
160 reg-names = "dirout", "dat";
161 reg = <0x0 0x8>, <0x8 0x8>;
162
163 gpio-controller;
164 gpio-ranges = <&pinctrl 0 0 32>;
165 #gpio-cells = <2>;
166 };
167
168 pinctrl: pinctrl@18 {
169 compatible = "brcm,bcm6328-pinctrl";
170 reg = <0x18 0x10>;
171
172 pinctrl_serial_led: serial_led-pins {
173 pinctrl_serial_led_data: serial_led_data-pins {
174 function = "serial_led_data";
175 pins = "gpio6";
176 };
177
178 pinctrl_serial_led_clk: serial_led_clk-pins {
179 function = "serial_led_clk";
180 pins = "gpio7";
181 };
182 };
183
184 pinctrl_inet_act_led: inet_act_led-pins {
185 function = "inet_act_led";
186 pins = "gpio11";
187 };
188
189 pinctrl_pcie_clkreq: pcie_clkreq-pins {
190 function = "pcie_clkreq";
191 pins = "gpio16";
192 };
193
194 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
195 function = "led";
196 pins = "gpio17";
197 };
198
199 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
200 function = "led";
201 pins = "gpio18";
202 };
203
204 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
205 function = "led";
206 pins = "gpio19";
207 };
208
209 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
210 function = "led";
211 pins = "gpio20";
212 };
213
214 pinctrl_ephy0_act_led: ephy0_act_led-pins {
215 function = "ephy0_act_led";
216 pins = "gpio25";
217 };
218
219 pinctrl_ephy1_act_led: ephy1_act_led-pins {
220 function = "ephy1_act_led";
221 pins = "gpio26";
222 };
223
224 pinctrl_ephy2_act_led: ephy2_act_led-pins {
225 function = "ephy2_act_led";
226 pins = "gpio27";
227 };
228
229 pinctrl_ephy3_act_led: ephy3_act_led-pins {
230 function = "ephy3_act_led";
231 pins = "gpio28";
232 };
233
234 pinctrl_hsspi_cs1: hsspi_cs1-pins {
235 function = "hsspi_cs1";
236 pins = "hsspi_cs1";
237 };
238
239 pinctrl_usb_port1_device: usb_port1_device-pins {
240 function = "usb_device_port";
241 pins = "usb_port1";
242 };
243
244 pinctrl_usb_port1_host: usb_port1_host-pins {
245 function = "usb_host_port";
246 pins = "usb_port1";
247 };
248 };
249 };
250
251 uart0: serial@10000100 {
252 compatible = "brcm,bcm6345-uart";
253 reg = <0x10000100 0x18>;
254
255 interrupt-parent = <&periph_intc>;
256 interrupts = <BCM6328_IRQ_UART0>;
257
258 clocks = <&periph_osc>;
259 clock-names = "periph";
260
261 status = "disabled";
262 };
263
264 uart1: serial@10000120 {
265 compatible = "brcm,bcm6345-uart";
266 reg = <0x10000120 0x18>;
267
268 interrupt-parent = <&periph_intc>;
269 interrupts = <BCM6328_IRQ_UART1>;
270
271 clocks = <&periph_osc>;
272 clock-names = "periph";
273
274 status = "disabled";
275 };
276
277 nflash: nand@10000200 {
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "brcm,nand-bcm6368",
281 "brcm,brcmnand-v2.2",
282 "brcm,brcmnand";
283 reg = <0x10000200 0x180>,
284 <0x10000400 0x200>,
285 <0x10000070 0x10>;
286 reg-names = "nand",
287 "nand-cache",
288 "nand-int-base";
289
290 interrupt-parent = <&periph_intc>;
291 interrupts = <BCM6328_IRQ_NAND>;
292
293 status = "disabled";
294 };
295
296 leds: led-controller@10000800 {
297 #address-cells = <1>;
298 #size-cells = <0>;
299 compatible = "brcm,bcm6328-leds";
300 reg = <0x10000800 0x24>;
301
302 status = "disabled";
303 };
304
305 hsspi: spi@10001000 {
306 #address-cells = <1>;
307 #size-cells = <0>;
308 compatible = "brcm,bcm6328-hsspi";
309 reg = <0x10001000 0x600>;
310
311 interrupt-parent = <&periph_intc>;
312 interrupts = <BCM6328_IRQ_HSSPI>;
313
314 clocks = <&periph_clk BCM6328_CLK_HSSPI>,
315 <&hsspi_osc>;
316 clock-names = "hsspi",
317 "pll";
318
319 resets = <&periph_rst BCM6328_RST_SPI>;
320
321 status = "disabled";
322 };
323
324 serdes_cntl: syscon@10001800 {
325 compatible = "syscon";
326 reg = <0x10001800 0x4>;
327 native-endian;
328 };
329
330 periph_pwr: power-controller@10001848 {
331 compatible = "brcm,bcm6328-power-controller";
332 reg = <0x10001848 0x4>;
333
334 #power-domain-cells = <1>;
335 };
336
337 ehci: usb@10002500 {
338 compatible = "brcm,bcm6328-ehci", "generic-ehci";
339 reg = <0x10002500 0x100>;
340 big-endian;
341 spurious-oc;
342
343 interrupt-parent = <&periph_intc>;
344 interrupts = <BCM6328_IRQ_EHCI>;
345
346 phys = <&usbh 0>;
347 phy-names = "usb";
348
349 status = "disabled";
350 };
351
352 ohci: usb@10002600 {
353 compatible = "brcm,bcm6328-ohci", "generic-ohci";
354 reg = <0x10002600 0x100>;
355 big-endian;
356 no-big-frame-no;
357
358 interrupt-parent = <&periph_intc>;
359 interrupts = <BCM6328_IRQ_OHCI>;
360
361 phys = <&usbh 0>;
362 phy-names = "usb";
363
364 status = "disabled";
365 };
366
367 usbh: usb-phy@10002700 {
368 compatible = "brcm,bcm6328-usbh-phy";
369 reg = <0x10002700 0x38>;
370
371 #phy-cells = <1>;
372
373 clocks = <&periph_clk BCM6328_CLK_USBH>;
374 clock-names = "usbh";
375
376 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
377 resets = <&periph_rst BCM6328_RST_USBH>;
378
379 status = "disabled";
380 };
381
382 ethernet: ethernet@1000d800 {
383 compatible = "brcm,bcm6328-enetsw";
384 reg = <0x1000d800 0x80>,
385 <0x1000da00 0x80>,
386 <0x1000dc00 0x80>;
387 reg-names = "dma",
388 "dma-channels",
389 "dma-sram";
390
391 interrupt-parent = <&periph_intc>;
392 interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
393 <BCM6328_IRQ_ENETSW_TX_DMA0>;
394 interrupt-names = "rx",
395 "tx";
396
397 clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
398
399 resets = <&periph_rst BCM6328_RST_ENETSW>,
400 <&periph_rst BCM6328_RST_EPHY>;
401
402 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
403 <&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
404
405 dma-rx = <0>;
406 dma-tx = <1>;
407
408 status = "disabled";
409 };
410
411 switch0: switch@10e00000 {
412 #address-cells = <1>;
413 #size-cells = <0>;
414 compatible = "brcm,bcm6328-switch";
415 reg = <0x10e00000 0x8000>;
416 big-endian;
417
418 ports {
419 #address-cells = <1>;
420 #size-cells = <0>;
421
422 port@8 {
423 reg = <8>;
424
425 phy-mode = "internal";
426 ethernet = <&ethernet>;
427
428 fixed-link {
429 speed = <1000>;
430 full-duplex;
431 };
432 };
433 };
434 };
435
436 mdio: mdio@10e000b0 {
437 #address-cells = <1>;
438 #size-cells = <0>;
439 compatible = "brcm,bcm6368-mdio-mux";
440 reg = <0x10e000b0 0x8>;
441
442 mdio_int: mdio@0 {
443 #address-cells = <1>;
444 #size-cells = <0>;
445 reg = <0>;
446
447 phy1: ethernet-phy@1 {
448 compatible = "ethernet-phy-ieee802.3-c22";
449 reg = <1>;
450 };
451
452 phy2: ethernet-phy@2 {
453 compatible = "ethernet-phy-ieee802.3-c22";
454 reg = <2>;
455 };
456
457 phy3: ethernet-phy@3 {
458 compatible = "ethernet-phy-ieee802.3-c22";
459 reg = <3>;
460 };
461
462 phy4: ethernet-phy@4 {
463 compatible = "ethernet-phy-ieee802.3-c22";
464 reg = <4>;
465 };
466 };
467
468 mdio_ext: mdio@1 {
469 #address-cells = <1>;
470 #size-cells = <0>;
471 reg = <1>;
472 };
473 };
474
475 pcie: pcie@10e40000 {
476 compatible = "brcm,bcm6328-pcie";
477 reg = <0x10e40000 0x10000>;
478 #address-cells = <3>;
479 #size-cells = <2>;
480
481 device_type = "pci";
482 bus-range = <0x00 0x01>;
483 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
484 linux,pci-probe-only = <1>;
485
486 interrupt-parent = <&periph_intc>;
487 interrupts = <BCM6328_IRQ_PCIE_RC>;
488
489 clocks = <&periph_clk BCM6328_CLK_PCIE>;
490 clock-names = "pcie";
491
492 resets = <&periph_rst BCM6328_RST_PCIE>,
493 <&periph_rst BCM6328_RST_PCIE_EXT>,
494 <&periph_rst BCM6328_RST_PCIE_CORE>,
495 <&periph_rst BCM6328_RST_PCIE_HARD>;
496 reset-names = "pcie",
497 "pcie-ext",
498 "pcie-core",
499 "pcie-hard";
500
501 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
502
503 brcm,serdes = <&serdes_cntl>;
504
505 status = "disabled";
506 };
507 };
508 };