bmips: dts: move leds dt-bindings include to SoCs
[openwrt/staging/stintel.git] / target / linux / bmips / dts / bcm6328-innacomm-w3400v6.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "bcm6328.dtsi"
4
5 / {
6 model = "Innacomm W3400V6";
7 compatible = "innacomm,w3400v6", "brcm,bcm6328";
8
9 aliases {
10 led-boot = &led_power_green;
11 led-failsafe = &led_power_red;
12 led-running = &led_power_green;
13 led-upgrade = &led_power_green;
14 };
15
16 keys {
17 compatible = "gpio-keys-polled";
18 poll-interval = <100>;
19
20 reset {
21 label = "reset";
22 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
23 linux,code = <KEY_RESTART>;
24 debounce-interval = <60>;
25 };
26
27 wps {
28 label = "wps";
29 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_WPS_BUTTON>;
31 debounce-interval = <60>;
32 };
33 };
34
35 bcm4318-sprom {
36 compatible = "brcm,bcma-sprom";
37
38 pci-bus = <1>;
39 pci-dev = <0>;
40
41 nvmem-cells = <&macaddr_cfe_6a0 1>;
42 nvmem-cell-names = "mac-address";
43
44 brcm,sprom = "brcm/bcm4318-sprom.bin";
45 };
46 };
47
48 &ethernet {
49 status = "okay";
50
51 nvmem-cells = <&macaddr_cfe_6a0 0>;
52 nvmem-cell-names = "mac-address";
53 };
54
55 &hsspi {
56 status = "okay";
57
58 flash@0 {
59 compatible = "jedec,spi-nor";
60 spi-max-frequency = <16666667>;
61 spi-tx-bus-width = <2>;
62 spi-rx-bus-width = <2>;
63 reg = <0>;
64
65 #address-cells = <1>;
66 #size-cells = <1>;
67
68 partitions {
69 compatible = "fixed-partitions";
70 #address-cells = <1>;
71 #size-cells = <1>;
72
73 partition@0 {
74 reg = <0x000000 0x010000>;
75 label = "cfe";
76 read-only;
77
78 nvmem-layout {
79 compatible = "fixed-layout";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 macaddr_cfe_6a0: macaddr@6a0 {
84 compatible = "mac-base";
85 reg = <0x6a0 0x6>;
86 #nvmem-cell-cells = <1>;
87 };
88 };
89 };
90
91 partition@10000 {
92 compatible = "brcm,bcm963xx-imagetag";
93 reg = <0x010000 0x7e0000>;
94 label = "firmware";
95 };
96
97 partition@7f0000 {
98 reg = <0x7f0000 0x010000>;
99 label = "nvram";
100 };
101 };
102 };
103 };
104
105 &leds {
106 status = "okay";
107
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_leds>;
110
111 led@1 {
112 reg = <1>;
113 active-low;
114 label = "green:internet";
115 };
116
117 led@2 {
118 reg = <2>;
119 active-low;
120 label = "red:internet";
121 };
122
123 led@3 {
124 reg = <3>;
125 active-low;
126 label = "green:dsl";
127 };
128
129 led_power_green: led@4 {
130 reg = <4>;
131 active-low;
132 function = LED_FUNCTION_POWER;
133 color = <LED_COLOR_ID_GREEN>;
134 default-state = "on";
135 };
136
137 led_power_red: led@5 {
138 reg = <5>;
139 active-low;
140 function = LED_FUNCTION_POWER;
141 color = <LED_COLOR_ID_RED>;
142 panic-indicator;
143 };
144
145 led@11 {
146 reg = <11>;
147 active-low;
148 function = LED_FUNCTION_WPS;
149 color = <LED_COLOR_ID_GREEN>;
150 };
151 };
152
153 &pcie {
154 status = "okay";
155 };
156
157 &pinctrl {
158 pinctrl_leds: leds {
159 function = "led";
160 pins = "gpio1", "gpio2", "gpio3",
161 "gpio4", "gpio5", "gpio11";
162 };
163 };
164
165 &switch0 {
166 ports {
167 port@0 {
168 reg = <0>;
169 label = "lan4";
170
171 phy-handle = <&phy1>;
172 phy-mode = "mii";
173 };
174
175 port@1 {
176 reg = <1>;
177 label = "lan3";
178
179 phy-handle = <&phy2>;
180 phy-mode = "mii";
181 };
182
183 port@2 {
184 reg = <2>;
185 label = "lan2";
186
187 phy-handle = <&phy3>;
188 phy-mode = "mii";
189 };
190
191 port@3 {
192 reg = <3>;
193 label = "lan1";
194
195 phy-handle = <&phy4>;
196 phy-mode = "mii";
197 };
198 };
199 };
200
201 &uart0 {
202 status = "okay";
203 };