bmips: rewrite pin controllers
[openwrt/staging/noltari.git] / target / linux / bmips / dts / bcm63268.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm63268-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm63268-reset.h>
10 #include <dt-bindings/soc/bcm63268-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm63268";
16
17 aliases {
18 nflash = &nflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 spi1 = &hsspi;
24 };
25
26 chosen {
27 bootargs = "console=ttyS0,115200n8 earlycon";
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34
35 #clock-cells = <0>;
36
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
39 };
40
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
43
44 #clock-cells = <0>;
45
46 clock-frequency = <400000000>;
47 clock-output-names = "hsspi_osc";
48 };
49 };
50
51 cpus {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 mips-hpt-frequency = <200000000>;
55
56 cpu@0 {
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
58 device_type = "cpu";
59 reg = <0>;
60 };
61
62 cpu@1 {
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
64 device_type = "cpu";
65 reg = <1>;
66 };
67 };
68
69 cpu_intc: interrupt-controller {
70 #address-cells = <0>;
71 compatible = "mti,cpu-interrupt-controller";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 };
76
77 memory@0 {
78 device_type = "memory";
79 reg = <0 0>;
80 };
81
82 ubus {
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 compatible = "simple-bus";
87 ranges;
88
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm63268-clocks";
91 reg = <0x10000004 0x4>;
92 #clock-cells = <1>;
93 };
94
95 pll_cntl: syscon@10000008 {
96 compatible = "syscon";
97 reg = <0x10000008 0x4>;
98 native-endian;
99 };
100
101 syscon-reboot {
102 compatible = "syscon-reboot";
103 regmap = <&pll_cntl>;
104 offset = <0x0>;
105 mask = <0x1>;
106 };
107
108 periph_rst: reset-controller@10000010 {
109 compatible = "brcm,bcm6345-reset";
110 reg = <0x10000010 0x4>;
111 #reset-cells = <1>;
112 };
113
114 ext_intc: interrupt-controller@10000018 {
115 #address-cells = <1>;
116 compatible = "brcm,bcm6345-ext-intc";
117 reg = <0x10000018 0x4>;
118
119 interrupt-controller;
120 #interrupt-cells = <2>;
121
122 interrupts = <BCM63268_IRQ_EXT0>,
123 <BCM63268_IRQ_EXT1>,
124 <BCM63268_IRQ_EXT2>,
125 <BCM63268_IRQ_EXT3>;
126 };
127
128 periph_intc: interrupt-controller@10000020 {
129 #address-cells = <1>;
130 compatible = "brcm,bcm6345-l1-intc";
131 reg = <0x10000020 0x20>,
132 <0x10000040 0x20>;
133
134 interrupt-controller;
135 #interrupt-cells = <1>;
136
137 interrupt-parent = <&cpu_intc>;
138 interrupts = <2>, <3>;
139 };
140
141 wdt: watchdog@1000009c {
142 compatible = "brcm,bcm7038-wdt";
143 reg = <0x1000009c 0xc>;
144
145 clocks = <&periph_osc>;
146
147 timeout-sec = <30>;
148 };
149
150 gpio: syscon@100000c0 {
151 compatible = "syscon", "simple-mfd";
152 reg = <0x100000c0 0x80>;
153 native-endian;
154
155 pinctrl: pin-controller {
156 compatible = "brcm,bcm63268-pinctrl";
157
158 gpio-controller;
159 #gpio-cells = <2>;
160
161 interrupts-extended = <&ext_intc 0 0>,
162 <&ext_intc 1 0>,
163 <&ext_intc 2 0>,
164 <&ext_intc 3 0>;
165 interrupt-names = "gpio32",
166 "gpio33",
167 "gpio34",
168 "gpio35";
169
170 pinctrl_serial_led: serial_led {
171 pinctrl_serial_led_clk: serial_led_clk {
172 function = "serial_led_clk";
173 pins = "gpio0";
174 };
175
176 pinctrl_serial_led_data: serial_led_data {
177 function = "serial_led_data";
178 pins = "gpio1";
179 };
180 };
181
182 pinctrl_hsspi_cs4: hsspi_cs4 {
183 function = "hsspi_cs4";
184 pins = "gpio16";
185 };
186
187 pinctrl_hsspi_cs5: hsspi_cs5 {
188 function = "hsspi_cs5";
189 pins = "gpio17";
190 };
191
192 pinctrl_hsspi_cs6: hsspi_cs6 {
193 function = "hsspi_cs6";
194 pins = "gpio8";
195 };
196
197 pinctrl_hsspi_cs7: hsspi_cs7 {
198 function = "hsspi_cs7";
199 pins = "gpio9";
200 };
201
202 pinctrl_adsl_spi: adsl_spi {
203 pinctrl_adsl_spi_miso: adsl_spi_miso {
204 function = "adsl_spi_miso";
205 pins = "gpio18";
206 };
207
208 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
209 function = "adsl_spi_mosi";
210 pins = "gpio19";
211 };
212 };
213
214 pinctrl_vreq_clk: vreq_clk {
215 function = "vreq_clk";
216 pins = "gpio22";
217 };
218
219 pinctrl_pcie_clkreq_b: pcie_clkreq_b {
220 function = "pcie_clkreq_b";
221 pins = "gpio23";
222 };
223
224 pinctrl_robosw_led_clk: robosw_led_clk {
225 function = "robosw_led_clk";
226 pins = "gpio30";
227 };
228
229 pinctrl_robosw_led_data: robosw_led_data {
230 function = "robosw_led_data";
231 pins = "gpio31";
232 };
233
234 pinctrl_nand: nand {
235 function = "nand";
236 group = "nand_grp";
237 };
238
239 pinctrl_gpio35_alt: gpio35_alt {
240 function = "gpio35_alt";
241 pin = "gpio35";
242 };
243
244 pinctrl_dectpd: dectpd {
245 function = "dectpd";
246 group = "dectpd_grp";
247 };
248
249 pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
250 function = "vdsl_phy_override_0";
251 group = "vdsl_phy_override_0_grp";
252 };
253
254 pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
255 function = "vdsl_phy_override_1";
256 group = "vdsl_phy_override_1_grp";
257 };
258
259 pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
260 function = "vdsl_phy_override_2";
261 group = "vdsl_phy_override_2_grp";
262 };
263
264 pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
265 function = "vdsl_phy_override_3";
266 group = "vdsl_phy_override_3_grp";
267 };
268
269 pinctrl_dsl_gpio8: dsl_gpio8 {
270 function = "dsl_gpio8";
271 group = "dsl_gpio8";
272 };
273
274 pinctrl_dsl_gpio9: dsl_gpio9 {
275 function = "dsl_gpio9";
276 group = "dsl_gpio9";
277 };
278 };
279 };
280
281 uart0: serial@10000180 {
282 compatible = "brcm,bcm6345-uart";
283 reg = <0x10000180 0x18>;
284
285 interrupt-parent = <&periph_intc>;
286 interrupts = <BCM63268_IRQ_UART0>;
287
288 clocks = <&periph_osc>;
289 clock-names = "periph";
290
291 status = "disabled";
292 };
293
294 uart1: serial@100001a0 {
295 compatible = "brcm,bcm6345-uart";
296 reg = <0x100001a0 0x18>;
297
298 interrupt-parent = <&periph_intc>;
299 interrupts = <BCM63268_IRQ_UART1>;
300
301 clocks = <&periph_osc>;
302 clock-names = "periph";
303
304 status = "disabled";
305 };
306
307 nflash: nand@10000200 {
308 compatible = "brcm,nand-bcm6368",
309 "brcm,brcmnand-v4.0",
310 "brcm,brcmnand";
311 #address-cells = <1>;
312 #size-cells = <0>;
313 reg = <0x10000200 0x180>,
314 <0x10000600 0x200>,
315 <0x100000b0 0x10>;
316 reg-names = "nand",
317 "nand-cache",
318 "nand-int-base";
319
320 interrupt-parent = <&periph_intc>;
321 interrupts = <BCM63268_IRQ_NAND>;
322
323 clocks = <&periph_clk BCM63268_CLK_NAND>;
324 clock-names = "nand";
325
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_nand>;
328
329 status = "disabled";
330 };
331
332 lsspi: spi@10000800 {
333 compatible = "brcm,bcm6358-spi";
334 reg = <0x10000800 0x70c>;
335 #address-cells = <1>;
336 #size-cells = <0>;
337
338 interrupt-parent = <&periph_intc>;
339 interrupts = <BCM63268_IRQ_LSSPI>;
340
341 clocks = <&periph_clk BCM63268_CLK_SPI>;
342 clock-names = "spi";
343
344 resets = <&periph_rst BCM63268_RST_SPI>;
345
346 status = "disabled";
347 };
348
349 hsspi: spi@10001000 {
350 compatible = "brcm,bcm6328-hsspi";
351 reg = <0x10001000 0x600>;
352 #address-cells = <1>;
353 #size-cells = <0>;
354
355 interrupt-parent = <&periph_intc>;
356 interrupts = <BCM63268_IRQ_HSSPI>;
357
358 clocks = <&periph_clk BCM63268_CLK_HSSPI>,
359 <&hsspi_osc>;
360 clock-names = "hsspi",
361 "pll";
362
363 resets = <&periph_rst BCM63268_RST_SPI>;
364
365 status = "disabled";
366 };
367
368 periph_pwr: power-controller@1000184c {
369 compatible = "brcm,bcm63268-power-controller";
370 reg = <0x1000184c 0x4>;
371 #power-domain-cells = <1>;
372 };
373
374 leds: led-controller@10001900 {
375 #address-cells = <1>;
376 #size-cells = <0>;
377 compatible = "brcm,bcm6328-leds";
378 reg = <0x10001900 0x24>;
379
380 status = "disabled";
381 };
382
383 ehci: usb@10002500 {
384 compatible = "brcm,bcm63268-ehci", "generic-ehci";
385 reg = <0x10002500 0x100>;
386 big-endian;
387 ignore-oc;
388
389 interrupt-parent = <&periph_intc>;
390 interrupts = <BCM63268_IRQ_EHCI>;
391
392 phys = <&usbh 0>;
393 phy-names = "usb";
394
395 status = "disabled";
396 };
397
398 ohci: usb@10002600 {
399 compatible = "brcm,bcm63268-ohci", "generic-ohci";
400 reg = <0x10002600 0x100>;
401 big-endian;
402 no-big-frame-no;
403
404 interrupt-parent = <&periph_intc>;
405 interrupts = <BCM63268_IRQ_OHCI>;
406
407 phys = <&usbh 0>;
408 phy-names = "usb";
409
410 status = "disabled";
411 };
412
413 usbh: usb-phy@10002700 {
414 compatible = "brcm,bcm63268-usbh-phy";
415 reg = <0x10002700 0x38>;
416
417 #phy-cells = <1>;
418
419 clocks = <&periph_clk BCM63268_CLK_USBH>;
420 /* FIXME! <&timer_clk BCM63268_TCLK_USB_REF> */
421 clock-names = "usbh";
422 /* FIXME! usb_ref */
423
424 power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
425 resets = <&periph_rst BCM63268_RST_USBH>;
426
427 status = "disabled";
428 };
429 };
430 };