target/linux/bcm63xx/dts/bcm63268.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm63268";
   5
   6         aliases {
   7                 nflash = &nflash;
   8                 pinctrl = &pinctrl;
   9                 serial0 = &uart0;
  10                 serial1 = &uart1;
  11                 spi0 = &lsspi;
  12                 spi1 = &hsspi;
  13         };
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  21                         device_type = "cpu";
  22                         reg = <0>;
  23                 };
  24
  25                 cpu@1 {
  26                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  27                         device_type = "cpu";
  28                         reg = <1>;
  29                 };
  30         };
  31
  32         cpu_intc: interrupt-controller {
  33                 #address-cells = <0>;
  34                 compatible = "mti,cpu-interrupt-controller";
  35
  36                 interrupt-controller;
  37                 #interrupt-cells = <1>;
  38         };
  39
  40         memory { device_type = "memory"; reg = <0 0>; };
  41
  42         ubus@10000000 {
  43                 #address-cells = <1>;
  44                 #size-cells = <1>;
  45                 ranges;
  46                 compatible = "simple-bus";
  47                 interrupt-parent = <&periph_intc>;
  48
  49                 ext_intc: interrupt-controller@10000018 {
  50                         compatible = "brcm,bcm6345-ext-intc";
  51                         reg = <0x10000018 0x4>;
  52
  53                         interrupt-controller;
  54                         #interrupt-cells = <2>;
  55
  56                         interrupts = <44>, <45>, <46>, <47>;
  57                 };
  58
  59                 periph_intc: interrupt-controller@10000020 {
  60                         compatible = "brcm,bcm6345-l1-intc";
  61                         reg = <0x10000020 0x20>,
  62                               <0x10000040 0x20>;
  63
  64                         interrupt-controller;
  65                         #interrupt-cells = <1>;
  66
  67                         interrupt-parent = <&cpu_intc>;
  68                         interrupts = <2>, <3>;
  69                 };
  70
  71                 pinctrl: pin-controller@100000c0 {
  72                         compatible = "brcm,bcm63268-pinctrl";
  73                         reg = <0x100000c0 0x8>,
  74                               <0x100000c8 0x8>,
  75                               <0x100000d0 0x4>,
  76                               <0x100000d8 0x4>,
  77                               <0x100000dc 0x4>,
  78                               <0x100000f8 0x4>;
  79                         reg-names = "dirout", "dat", "led", "mode",
  80                                     "ctrl", "basemode";
  81
  82                         gpio-controller;
  83                         #gpio-cells = <2>;
  84
  85                         interrupt-parent = <&periph_intc>;
  86                         interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
  87                         interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
  88
  89                         pinctrl_serial_led: serial_led {
  90                                 pinctrl_serial_led_clk: serial_led_clk {
  91                                         function = "serial_led_clk";
  92                                         pins = "gpio0";
  93                                 };
  94
  95                                 pinctrl_serial_led_data: serial_led_data {
  96                                         function = "serial_led_data";
  97                                         pins = "gpio1";
  98                                 };
  99                         };
 100
 101                         pinctrl_hsspi_cs4: hsspi_cs4 {
 102                                 function = "hsspi_cs4";
 103                                 pins = "gpio16";
 104                         };
 105
 106                         pinctrl_hsspi_cs5: hsspi_cs5 {
 107                                 function = "hsspi_cs5";
 108                                 pins = "gpio17";
 109                         };
 110
 111                         pinctrl_hsspi_cs6: hsspi_cs6 {
 112                                 function = "hsspi_cs6";
 113                                 pins = "gpio8";
 114                         };
 115
 116                         pinctrl_hsspi_cs7: hsspi_cs7 {
 117                                 function = "hsspi_cs7";
 118                                 pins = "gpio9";
 119                         };
 120
 121                         pinctrl_adsl_spi: adsl_spi {
 122                                 pinctrl_adsl_spi_miso: adsl_spi_miso {
 123                                         function = "adsl_spi_miso";
 124                                         pins = "gpio18";
 125                                 };
 126
 127                                 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
 128                                         function = "adsl_spi_mosi";
 129                                         pins = "gpio19";
 130                                 };
 131                         };
 132
 133                         pinctrl_vreq_clk: vreq_clk {
 134                                 function = "vreq_clk";
 135                                 pins = "gpio22";
 136                         };
 137
 138                         pinctrl_pcie_clkreq_b: pcie_clkreq_b {
 139                                 function = "pcie_clkreq_b";
 140                                 pins = "gpio23";
 141                         };
 142
 143                         pinctrl_robosw_led_clk: robosw_led_clk {
 144                                 function = "robosw_led_clk";
 145                                 pins = "gpio30";
 146                         };
 147
 148                         pinctrl_robosw_led_data: robosw_led_data {
 149                                 function = "robosw_led_data";
 150                                 pins = "gpio31";
 151                         };
 152
 153                         pinctrl_nand: nand {
 154                                 function = "nand";
 155                                 group = "nand_grp";
 156                         };
 157
 158                         pinctrl_gpio35_alt: gpio35_alt {
 159                                 function = "gpio35_alt";
 160                                 pin = "gpio35";
 161                         };
 162
 163                         pinctrl_dectpd: dectpd {
 164                                 function = "dectpd";
 165                                 group = "dectpd_grp";
 166                         };
 167
 168                         pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
 169                                 function = "vdsl_phy_override_0";
 170                                 group = "vdsl_phy_override_0_grp";
 171                         };
 172
 173                         pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
 174                                 function = "vdsl_phy_override_1";
 175                                 group = "vdsl_phy_override_1_grp";
 176                         };
 177
 178                         pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
 179                                 function = "vdsl_phy_override_2";
 180                                 group = "vdsl_phy_override_2_grp";
 181                         };
 182
 183                         pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
 184                                 function = "vdsl_phy_override_3";
 185                                 group = "vdsl_phy_override_3_grp";
 186                         };
 187
 188                         pinctrl_dsl_gpio8: dsl_gpio8 {
 189                                 function = "dsl_gpio8";
 190                                 group = "dsl_gpio8";
 191                         };
 192
 193                         pinctrl_dsl_gpio9: dsl_gpio9 {
 194                                 function = "dsl_gpio9";
 195                                 group = "dsl_gpio9";
 196                         };
 197                 };
 198
 199                 uart0: serial@10000180 {
 200                         compatible = "brcm,bcm6345-uart";
 201                         reg = <0x10000180 0x18>;
 202
 203                         interrupt-parent = <&periph_intc>;
 204                         interrupts = <5>;
 205
 206                         /* clocks = <&periph_clk>; */
 207                         /* clock-names = "refclk"; */
 208
 209                         status = "disabled";
 210                 };
 211
 212                 uart1: serial@100001a0 {
 213                         compatible = "brcm,bcm6345-uart";
 214                         reg = <0x100001a0 0x18>;
 215
 216                         interrupt-parent = <&periph_intc>;
 217                         interrupts = <34>;
 218
 219                         /* clocks = <&periph_clk>; */
 220                         /* clock-names = "refclk"; */
 221
 222                         status = "disabled";
 223                 };
 224
 225                 lsspi: spi@10000800 {
 226                         #address-cells = <1>;
 227                         #size-cells = <0>;
 228                         compatible = "brcm,bcm6358-spi";
 229                         reg = <0x10000800 0x70c>;
 230                         interrupts = <80>;
 231                         /* clocks = <&clkctl 15>; */
 232                 };
 233
 234                 hsspi: spi@10001000 {
 235                         #address-cells = <1>;
 236                         #size-cells = <0>;
 237                         compatible = "brcm,bcm6328-hsspi";
 238                         reg = <0x10001000 0x600>;
 239                         interrupts = <6>;
 240                         /* clocks = <&clkctl 16>; */
 241                 };
 242
 243                 nflash: nand@10000200 {
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         compatible = "brcm,nand-bcm6368",
 247                                      "brcm,brcmnand-v4.0",
 248                                      "brcm,brcmnand";
 249                         reg = <0x10000200 0x180>,
 250                               <0x10000600 0x200>,
 251                               <0x100000b0 0x10>;
 252                         reg-names = "nand",
 253                                     "nand-cache",
 254                                     "nand-int-base";
 255
 256                         interrupt-parent = <&periph_intc>;
 257                         interrupts = <50>;
 258
 259                         /* clocks = <&clkctl 20>; */
 260
 261                         pinctrl-names = "default";
 262                         pinctrl-0 = <&pinctrl_nand>;
 263
 264                         status = "disabled";
 265                 };
 266
 267                 leds: led-controller@10001900 {
 268                         #address-cells = <1>;
 269                         #size-cells = <0>;
 270                         compatible = "brcm,bcm6328-leds";
 271                         reg = <0x10001900 0x24>;
 272                         status = "disabled";
 273                 };
 274         };
 275 };