target/linux/bcm63xx/dts/bcm63268.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "brcm,bcm63268";
   7
   8         aliases {
   9                 nflash = &nflash;
  10                 pinctrl = &pinctrl;
  11                 serial0 = &uart0;
  12                 serial1 = &uart1;
  13                 spi0 = &lsspi;
  14                 spi1 = &hsspi;
  15         };
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 cpu@0 {
  22                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                 };
  26
  27                 cpu@1 {
  28                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  29                         device_type = "cpu";
  30                         reg = <1>;
  31                 };
  32         };
  33
  34         cpu_intc: interrupt-controller {
  35                 #address-cells = <0>;
  36                 compatible = "mti,cpu-interrupt-controller";
  37
  38                 interrupt-controller;
  39                 #interrupt-cells = <1>;
  40         };
  41
  42         memory { device_type = "memory"; reg = <0 0>; };
  43
  44         ubus@10000000 {
  45                 #address-cells = <1>;
  46                 #size-cells = <1>;
  47                 ranges;
  48                 compatible = "simple-bus";
  49                 interrupt-parent = <&periph_intc>;
  50
  51                 ext_intc: interrupt-controller@10000018 {
  52                         compatible = "brcm,bcm6345-ext-intc";
  53                         reg = <0x10000018 0x4>;
  54
  55                         interrupt-controller;
  56                         #interrupt-cells = <2>;
  57
  58                         interrupts = <44>, <45>, <46>, <47>;
  59                 };
  60
  61                 periph_intc: interrupt-controller@10000020 {
  62                         compatible = "brcm,bcm6345-l1-intc";
  63                         reg = <0x10000020 0x20>,
  64                               <0x10000040 0x20>;
  65
  66                         interrupt-controller;
  67                         #interrupt-cells = <1>;
  68
  69                         interrupt-parent = <&cpu_intc>;
  70                         interrupts = <2>, <3>;
  71                 };
  72
  73                 pinctrl: pin-controller@100000c0 {
  74                         compatible = "brcm,bcm63268-pinctrl";
  75                         reg = <0x100000c0 0x8>,
  76                               <0x100000c8 0x8>,
  77                               <0x100000d0 0x4>,
  78                               <0x100000d8 0x4>,
  79                               <0x100000dc 0x4>,
  80                               <0x100000f8 0x4>;
  81                         reg-names = "dirout", "dat", "led", "mode",
  82                                     "ctrl", "basemode";
  83
  84                         gpio-controller;
  85                         #gpio-cells = <2>;
  86
  87                         interrupt-parent = <&ext_intc>;
  88                         interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
  89                         interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
  90
  91                         pinctrl_serial_led: serial_led {
  92                                 pinctrl_serial_led_clk: serial_led_clk {
  93                                         function = "serial_led_clk";
  94                                         pins = "gpio0";
  95                                 };
  96
  97                                 pinctrl_serial_led_data: serial_led_data {
  98                                         function = "serial_led_data";
  99                                         pins = "gpio1";
 100                                 };
 101                         };
 102
 103                         pinctrl_hsspi_cs4: hsspi_cs4 {
 104                                 function = "hsspi_cs4";
 105                                 pins = "gpio16";
 106                         };
 107
 108                         pinctrl_hsspi_cs5: hsspi_cs5 {
 109                                 function = "hsspi_cs5";
 110                                 pins = "gpio17";
 111                         };
 112
 113                         pinctrl_hsspi_cs6: hsspi_cs6 {
 114                                 function = "hsspi_cs6";
 115                                 pins = "gpio8";
 116                         };
 117
 118                         pinctrl_hsspi_cs7: hsspi_cs7 {
 119                                 function = "hsspi_cs7";
 120                                 pins = "gpio9";
 121                         };
 122
 123                         pinctrl_adsl_spi: adsl_spi {
 124                                 pinctrl_adsl_spi_miso: adsl_spi_miso {
 125                                         function = "adsl_spi_miso";
 126                                         pins = "gpio18";
 127                                 };
 128
 129                                 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
 130                                         function = "adsl_spi_mosi";
 131                                         pins = "gpio19";
 132                                 };
 133                         };
 134
 135                         pinctrl_vreq_clk: vreq_clk {
 136                                 function = "vreq_clk";
 137                                 pins = "gpio22";
 138                         };
 139
 140                         pinctrl_pcie_clkreq_b: pcie_clkreq_b {
 141                                 function = "pcie_clkreq_b";
 142                                 pins = "gpio23";
 143                         };
 144
 145                         pinctrl_robosw_led_clk: robosw_led_clk {
 146                                 function = "robosw_led_clk";
 147                                 pins = "gpio30";
 148                         };
 149
 150                         pinctrl_robosw_led_data: robosw_led_data {
 151                                 function = "robosw_led_data";
 152                                 pins = "gpio31";
 153                         };
 154
 155                         pinctrl_nand: nand {
 156                                 function = "nand";
 157                                 group = "nand_grp";
 158                         };
 159
 160                         pinctrl_gpio35_alt: gpio35_alt {
 161                                 function = "gpio35_alt";
 162                                 pin = "gpio35";
 163                         };
 164
 165                         pinctrl_dectpd: dectpd {
 166                                 function = "dectpd";
 167                                 group = "dectpd_grp";
 168                         };
 169
 170                         pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
 171                                 function = "vdsl_phy_override_0";
 172                                 group = "vdsl_phy_override_0_grp";
 173                         };
 174
 175                         pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
 176                                 function = "vdsl_phy_override_1";
 177                                 group = "vdsl_phy_override_1_grp";
 178                         };
 179
 180                         pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
 181                                 function = "vdsl_phy_override_2";
 182                                 group = "vdsl_phy_override_2_grp";
 183                         };
 184
 185                         pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
 186                                 function = "vdsl_phy_override_3";
 187                                 group = "vdsl_phy_override_3_grp";
 188                         };
 189
 190                         pinctrl_dsl_gpio8: dsl_gpio8 {
 191                                 function = "dsl_gpio8";
 192                                 group = "dsl_gpio8";
 193                         };
 194
 195                         pinctrl_dsl_gpio9: dsl_gpio9 {
 196                                 function = "dsl_gpio9";
 197                                 group = "dsl_gpio9";
 198                         };
 199                 };
 200
 201                 uart0: serial@10000180 {
 202                         compatible = "brcm,bcm6345-uart";
 203                         reg = <0x10000180 0x18>;
 204
 205                         interrupt-parent = <&periph_intc>;
 206                         interrupts = <5>;
 207
 208                         /* clocks = <&periph_clk>; */
 209                         /* clock-names = "refclk"; */
 210
 211                         status = "disabled";
 212                 };
 213
 214                 uart1: serial@100001a0 {
 215                         compatible = "brcm,bcm6345-uart";
 216                         reg = <0x100001a0 0x18>;
 217
 218                         interrupt-parent = <&periph_intc>;
 219                         interrupts = <34>;
 220
 221                         /* clocks = <&periph_clk>; */
 222                         /* clock-names = "refclk"; */
 223
 224                         status = "disabled";
 225                 };
 226
 227                 lsspi: spi@10000800 {
 228                         #address-cells = <1>;
 229                         #size-cells = <0>;
 230                         compatible = "brcm,bcm6358-spi";
 231                         reg = <0x10000800 0x70c>;
 232                         interrupts = <80>;
 233                         /* clocks = <&clkctl 15>; */
 234                 };
 235
 236                 hsspi: spi@10001000 {
 237                         #address-cells = <1>;
 238                         #size-cells = <0>;
 239                         compatible = "brcm,bcm6328-hsspi";
 240                         reg = <0x10001000 0x600>;
 241                         interrupts = <6>;
 242                         /* clocks = <&clkctl 16>; */
 243                 };
 244
 245                 nflash: nand@10000200 {
 246                         #address-cells = <1>;
 247                         #size-cells = <0>;
 248                         compatible = "brcm,nand-bcm6368",
 249                                      "brcm,brcmnand-v4.0",
 250                                      "brcm,brcmnand";
 251                         reg = <0x10000200 0x180>,
 252                               <0x10000600 0x200>,
 253                               <0x100000b0 0x10>;
 254                         reg-names = "nand",
 255                                     "nand-cache",
 256                                     "nand-int-base";
 257
 258                         interrupt-parent = <&periph_intc>;
 259                         interrupts = <50>;
 260
 261                         /* clocks = <&clkctl 20>; */
 262
 263                         pinctrl-names = "default";
 264                         pinctrl-0 = <&pinctrl_nand>;
 265
 266                         status = "disabled";
 267                 };
 268
 269                 leds: led-controller@10001900 {
 270                         #address-cells = <1>;
 271                         #size-cells = <0>;
 272                         compatible = "brcm,bcm6328-leds";
 273                         reg = <0x10001900 0x24>;
 274                         status = "disabled";
 275                 };
 276         };
 277 };