bcm4908: use DTS patches sent upstream
[openwrt/staging/rmilecki.git] / target / linux / bcm4908 / patches-5.4 / 130-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch
1 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
2 Date: Mon, 15 Feb 2021 19:46:54 +0100
3 Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY
4 MIME-Version: 1.0
5 Content-Type: text/plain; charset=UTF-8
6 Content-Transfer-Encoding: 8bit
7
8 BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI
9 and XHCI. It requires powering up using the PMB.
10
11 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
12 ---
13 .../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++
14 .../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++
15 .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 25 ++++++++++++++++---
16 3 files changed, 55 insertions(+), 4 deletions(-)
17
18 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
19 +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
20 @@ -26,6 +26,23 @@
21 };
22 };
23
24 +&usb_phy {
25 + brcm,ioc = <1>;
26 + status = "okay";
27 +};
28 +
29 +&ehci {
30 + status = "okay";
31 +};
32 +
33 +&ohci {
34 + status = "okay";
35 +};
36 +
37 +&xhci {
38 + status = "okay";
39 +};
40 +
41 &nandcs {
42 nand-ecc-strength = <4>;
43 nand-ecc-step-size = <512>;
44 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
45 +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
46 @@ -44,6 +44,23 @@
47 };
48 };
49
50 +&usb_phy {
51 + brcm,ioc = <1>;
52 + status = "okay";
53 +};
54 +
55 +&ehci {
56 + status = "okay";
57 +};
58 +
59 +&ohci {
60 + status = "okay";
61 +};
62 +
63 +&xhci {
64 + status = "okay";
65 +};
66 +
67 &ports {
68 port@0 {
69 label = "lan2";
70 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
71 +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
72 @@ -2,6 +2,8 @@
73
74 #include <dt-bindings/interrupt-controller/irq.h>
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 +#include <dt-bindings/phy/phy.h>
77 +#include <dt-bindings/soc/bcm-pmb.h>
78
79 /dts-v1/;
80
81 @@ -110,24 +112,39 @@
82 #size-cells = <1>;
83 ranges = <0x00 0x00 0x80000000 0x281000>;
84
85 - usb@c300 {
86 + usb_phy: usb-phy@c200 {
87 + compatible = "brcm,bcm4908-usb-phy";
88 + reg = <0xc200 0x100>;
89 + reg-names = "crtl";
90 + power-domains = <&pmb BCM_PMB_HOST_USB>;
91 + dr_mode = "host";
92 + brcm,has-xhci;
93 + brcm,has-eohci;
94 + #phy-cells = <1>;
95 + status = "disabled";
96 + };
97 +
98 + ehci: usb@c300 {
99 compatible = "generic-ehci";
100 reg = <0xc300 0x100>;
101 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
102 + phys = <&usb_phy PHY_TYPE_USB2>;
103 status = "disabled";
104 };
105
106 - usb@c400 {
107 + ohci: usb@c400 {
108 compatible = "generic-ohci";
109 reg = <0xc400 0x100>;
110 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
111 + phys = <&usb_phy PHY_TYPE_USB2>;
112 status = "disabled";
113 };
114
115 - usb@d000 {
116 + xhci: usb@d000 {
117 compatible = "generic-xhci";
118 reg = <0xd000 0x8c8>;
119 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
120 + phys = <&usb_phy PHY_TYPE_USB3>;
121 status = "disabled";
122 };
123
124 @@ -222,7 +239,7 @@
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 - power-controller@2800c0 {
129 + pmb: power-controller@2800c0 {
130 compatible = "brcm,bcm4908-pmb";
131 reg = <0x2800c0 0x40>;
132 #power-domain-cells = <1>;