target/linux/bcm27xx/patches-6.1/950-0728-bcm2835-dma-Support-dma-flags-for-multi-beat-burst.patch

   1 From 8c5a3ead40c1778595be768db284c66c03546e2d Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Fri, 21 Apr 2023 20:24:54 +0100
   4 Subject: [PATCH] bcm2835-dma: Support dma flags for multi-beat burst
   5
   6 Add a control bit to enable a multi-beat burst on a DMA.
   7 This improves DMA performance and is required for HDMI audio.
   8
   9 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
  10 ---
  11  drivers/dma/bcm2835-dma.c | 28 ++++++++++++++++++++--------
  12  1 file changed, 20 insertions(+), 8 deletions(-)
  13
  14 --- a/drivers/dma/bcm2835-dma.c
  15 +++ b/drivers/dma/bcm2835-dma.c
  16 @@ -158,7 +158,8 @@ struct bcm2835_desc {
  17  #define BCM2835_DMA_S_WIDTH    BIT(9) /* 128bit writes if set */
  18  #define BCM2835_DMA_S_DREQ     BIT(10) /* enable SREQ for source */
  19  #define BCM2835_DMA_S_IGNORE   BIT(11) /* ignore source reads - read 0 */
  20 -#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
  21 +#define BCM2835_DMA_BURST_LENGTH(x) (((x) & 15) << 12)
  22 +#define BCM2835_DMA_GET_BURST_LENGTH(x) (((x) >> 12) & 15)
  23  #define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \
  24                                       BCM2835_DMA_PANIC_PRIORITY(15) | \
  25                                       BCM2835_DMA_WAIT_FOR_WRITES | \
  26 @@ -182,6 +183,11 @@ struct bcm2835_desc {
  27  #define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \
  28                       BCM2835_DMA_D_WIDTH : 0)
  29
  30 +/* A fake bit to request that the driver requires multi-beat burst */
  31 +#define BCM2835_DMA_BURST BIT(30)
  32 +#define BURST_LENGTH(x) ((x & BCM2835_DMA_BURST) ? \
  33 +                     BCM2835_DMA_BURST_LENGTH(3) : 0)
  34 +
  35
  36  /* debug register bits */
  37  #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR     BIT(0)
  38 @@ -285,7 +291,7 @@ struct bcm2835_desc {
  39  /* the max dma length for different channels */
  40  #define MAX_DMA40_LEN SZ_1G
  41
  42 -#define BCM2711_DMA40_BURST_LEN(x)     ((min(x,16) - 1) << 8)
  43 +#define BCM2711_DMA40_BURST_LEN(x)     (((x) & 15) << 8)
  44  #define BCM2711_DMA40_INC              BIT(12)
  45  #define BCM2711_DMA40_SIZE_32          (0 << 13)
  46  #define BCM2711_DMA40_SIZE_64          (1 << 13)
  47 @@ -362,12 +368,16 @@ static inline uint32_t to_bcm2711_ti(uin
  48
  49  static inline uint32_t to_bcm2711_srci(uint32_t info)
  50  {
  51 -       return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0);
  52 +       return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0) |
  53 +              ((info & BCM2835_DMA_S_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
  54 +              BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
  55  }
  56
  57  static inline uint32_t to_bcm2711_dsti(uint32_t info)
  58  {
  59 -       return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0);
  60 +       return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0) |
  61 +              ((info & BCM2835_DMA_D_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
  62 +              BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
  63  }
  64
  65  static inline uint32_t to_bcm2711_cbaddr(dma_addr_t addr)
  66 @@ -936,7 +946,8 @@ static struct dma_async_tx_descriptor *b
  67         struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
  68         struct bcm2835_desc *d;
  69         u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
  70 -                  WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
  71 +                  WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
  72 +                  WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
  73         u32 extra = BCM2835_DMA_INT_EN;
  74         size_t max_len = bcm2835_dma_max_frame_length(c);
  75         size_t frames;
  76 @@ -967,8 +978,8 @@ static struct dma_async_tx_descriptor *b
  77         struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
  78         struct bcm2835_desc *d;
  79         dma_addr_t src = 0, dst = 0;
  80 -       u32 info = WAIT_RESP(c->dreq) |
  81 -                  WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
  82 +       u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
  83 +                  WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
  84         u32 extra = BCM2835_DMA_INT_EN;
  85         size_t frames;
  86
  87 @@ -1020,7 +1031,8 @@ static struct dma_async_tx_descriptor *b
  88         struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
  89         struct bcm2835_desc *d;
  90         dma_addr_t src, dst;
  91 -       u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
  92 +       u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
  93 +                  WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
  94         u32 extra = 0;
  95         size_t max_len = bcm2835_dma_max_frame_length(c);
  96         size_t frames;