bcm27xx: 6.1: add kernel patches
[openwrt/staging/nbd.git] / target / linux / bcm27xx / patches-6.1 / 950-0619-media-i2c-imx290-Correct-register-sizes.patch
1 From babb7bfc9e6eb5b0484912f72636a81cd38db3d1 Mon Sep 17 00:00:00 2001
2 From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
3 Date: Sun, 16 Oct 2022 09:15:12 +0300
4 Subject: [PATCH] media: i2c: imx290: Correct register sizes
5
6 Upstream commit 454a86f33dd0.
7
8 Define registers with the appropriate size, using the variable-size
9 register access mechanism that has just been introduced. This simplifies
10 the code.
11
12 Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
14 ---
15 drivers/media/i2c/imx290.c | 39 +++++++++-----------------------------
16 1 file changed, 9 insertions(+), 30 deletions(-)
17
18 --- a/drivers/media/i2c/imx290.c
19 +++ b/drivers/media/i2c/imx290.c
20 @@ -32,12 +32,11 @@
21 #define IMX290_REGHOLD IMX290_REG_8BIT(0x3001)
22 #define IMX290_XMSTA IMX290_REG_8BIT(0x3002)
23 #define IMX290_FR_FDG_SEL IMX290_REG_8BIT(0x3009)
24 -#define IMX290_BLKLEVEL_LOW IMX290_REG_8BIT(0x300a)
25 -#define IMX290_BLKLEVEL_HIGH IMX290_REG_8BIT(0x300b)
26 +#define IMX290_BLKLEVEL IMX290_REG_16BIT(0x300a)
27 #define IMX290_GAIN IMX290_REG_8BIT(0x3014)
28 -#define IMX290_HMAX_LOW IMX290_REG_8BIT(0x301c)
29 -#define IMX290_HMAX_HIGH IMX290_REG_8BIT(0x301d)
30 +#define IMX290_HMAX IMX290_REG_16BIT(0x301c)
31 #define IMX290_PGCTRL IMX290_REG_8BIT(0x308c)
32 +#define IMX290_CHIP_ID IMX290_REG_16BIT(0x319a)
33 #define IMX290_PHY_LANE_NUM IMX290_REG_8BIT(0x3407)
34 #define IMX290_CSI_LANE_MODE IMX290_REG_8BIT(0x3443)
35
36 @@ -461,8 +460,7 @@ static int imx290_set_ctrl(struct v4l2_c
37 break;
38 case V4L2_CID_TEST_PATTERN:
39 if (ctrl->val) {
40 - imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00);
41 - imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
42 + imx290_write_reg(imx290, IMX290_BLKLEVEL, 0);
43 usleep_range(10000, 11000);
44 imx290_write_reg(imx290, IMX290_PGCTRL,
45 (u8)(IMX290_PGCTRL_REGEN |
46 @@ -472,12 +470,11 @@ static int imx290_set_ctrl(struct v4l2_c
47 imx290_write_reg(imx290, IMX290_PGCTRL, 0x00);
48 usleep_range(10000, 11000);
49 if (imx290->bpp == 10)
50 - imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
51 + imx290_write_reg(imx290, IMX290_BLKLEVEL,
52 0x3c);
53 else /* 12 bits per pixel */
54 - imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
55 + imx290_write_reg(imx290, IMX290_BLKLEVEL,
56 0xf0);
57 - imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
58 }
59 break;
60 default:
61 @@ -669,25 +666,6 @@ static int imx290_write_current_format(s
62 return 0;
63 }
64
65 -static int imx290_set_hmax(struct imx290 *imx290, u32 val)
66 -{
67 - int ret;
68 -
69 - ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff));
70 - if (ret) {
71 - dev_err(imx290->dev, "Error setting HMAX register\n");
72 - return ret;
73 - }
74 -
75 - ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff));
76 - if (ret) {
77 - dev_err(imx290->dev, "Error setting HMAX register\n");
78 - return ret;
79 - }
80 -
81 - return 0;
82 -}
83 -
84 /* Start streaming */
85 static int imx290_start_streaming(struct imx290 *imx290)
86 {
87 @@ -716,8 +694,9 @@ static int imx290_start_streaming(struct
88 dev_err(imx290->dev, "Could not set current mode\n");
89 return ret;
90 }
91 - ret = imx290_set_hmax(imx290, imx290->current_mode->hmax);
92 - if (ret < 0)
93 +
94 + ret = imx290_write_reg(imx290, IMX290_HMAX, imx290->current_mode->hmax);
95 + if (ret)
96 return ret;
97
98 /* Apply customized values from user */