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bcm27xx: 6.1: add kernel patches
[openwrt/staging/nbd.git] / target / linux / bcm27xx / patches-6.1 / 950-0611-media-i2c-imx290-Reset-to-upstream.patch
1 From da0ac2bb7f9ce7ab8657ccd20d704a16a9cc61c0 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Thu, 24 Nov 2022 18:09:07 +0000
4 Subject: [PATCH] media: i2c: imx290: Reset to upstream.
5
6 For backporting a load of upstream commits, reset to upstream first.
7 Downstream patches then need to be regenerated and applied.
8
9 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
10 ---
11 drivers/media/i2c/imx290.c | 621 ++++++++-----------------------------
12 1 file changed, 133 insertions(+), 488 deletions(-)
13
14 --- a/drivers/media/i2c/imx290.c
15 +++ b/drivers/media/i2c/imx290.c
16 @@ -1,16 +1,6 @@
17 // SPDX-License-Identifier: GPL-2.0
18 /*
19 - * Sony IMX462 / IMX290 / IMX327 CMOS Image Sensor Driver
20 - *
21 - * The IMX462, IMX290,and IMX327 are very similar 1920x1080 1/2.8 CMOS image
22 - * sensors.
23 - * IMX327 can support up to 60fps with 10 or 12bit readout.
24 - * IMX290 adds support for 120fps, but only 10bit and when connected over 4
25 - * CSI-2 lanes.
26 - * IMX462 adds support for 120fps in both 10 and 12bit readout modes.
27 - *
28 - * The modules don't appear to have a mechanism to identify whether the mono or
29 - * colour variant is connected, therefore it is done via compatible string.
30 + * Sony IMX290 CMOS Image Sensor Driver
31 *
32 * Copyright (C) 2019 FRAMOS GmbH.
33 *
34 @@ -23,7 +13,6 @@
35 #include <linux/gpio/consumer.h>
36 #include <linux/i2c.h>
37 #include <linux/module.h>
38 -#include <linux/of_device.h>
39 #include <linux/pm_runtime.h>
40 #include <linux/regmap.h>
41 #include <linux/regulator/consumer.h>
42 @@ -33,28 +22,15 @@
43 #include <media/v4l2-fwnode.h>
44 #include <media/v4l2-subdev.h>
45
46 -enum imx290_clk_index {
47 - CLK_37_125,
48 - CLK_74_25,
49 -};
50 -
51 #define IMX290_STANDBY 0x3000
52 #define IMX290_REGHOLD 0x3001
53 #define IMX290_XMSTA 0x3002
54 -#define IMX290_FLIP_WINMODE 0x3007
55 #define IMX290_FR_FDG_SEL 0x3009
56 #define IMX290_BLKLEVEL_LOW 0x300a
57 #define IMX290_BLKLEVEL_HIGH 0x300b
58 #define IMX290_GAIN 0x3014
59 -#define IMX290_VMAX_LOW 0x3018
60 -#define IMX290_VMAX_MAX 0x3fff
61 #define IMX290_HMAX_LOW 0x301c
62 #define IMX290_HMAX_HIGH 0x301d
63 -#define IMX290_HMAX_MAX 0xffff
64 -
65 -#define IMX290_EXPOSURE_MIN 1
66 -#define IMX290_EXPOSURE_STEP 1
67 -#define IMX290_EXPOSURE_LOW 0x3020
68 #define IMX290_PGCTRL 0x308c
69 #define IMX290_PHY_LANE_NUM 0x3407
70 #define IMX290_CSI_LANE_MODE 0x3443
71 @@ -63,13 +39,6 @@ enum imx290_clk_index {
72 #define IMX290_PGCTRL_THRU BIT(1)
73 #define IMX290_PGCTRL_MODE(n) ((n) << 4)
74
75 -#define IMX290_NATIVE_WIDTH 1945U
76 -#define IMX290_NATIVE_HEIGHT 1109U
77 -#define IMX290_PIXEL_ARRAY_LEFT 4U
78 -#define IMX290_PIXEL_ARRAY_TOP 12U
79 -#define IMX290_PIXEL_ARRAY_WIDTH 1937U
80 -#define IMX290_PIXEL_ARRAY_HEIGHT 1097U
81 -
82 static const char * const imx290_supply_name[] = {
83 "vdda",
84 "vddd",
85 @@ -87,31 +56,19 @@ struct imx290_mode {
86 u32 width;
87 u32 height;
88 u32 hmax;
89 - u32 vmax;
90 u8 link_freq_index;
91 - struct v4l2_rect crop;
92 -
93 - const struct imx290_regval *mode_data;
94 - u32 mode_data_size;
95 - const struct imx290_regval *lane_data;
96 - u32 lane_data_size;
97
98 -
99 - /* Clock setup can vary. Index as enum imx290_clk_index */
100 - const struct imx290_regval *clk_data[2];
101 - u32 clk_size;
102 + const struct imx290_regval *data;
103 + u32 data_size;
104 };
105
106 struct imx290 {
107 struct device *dev;
108 struct clk *xclk;
109 - u32 xclk_freq;
110 struct regmap *regmap;
111 u8 nlanes;
112 u8 bpp;
113
114 - const struct imx290_pixfmt *formats;
115 -
116 struct v4l2_subdev sd;
117 struct media_pad pad;
118 struct v4l2_mbus_framefmt current_format;
119 @@ -123,11 +80,6 @@ struct imx290 {
120 struct v4l2_ctrl_handler ctrls;
121 struct v4l2_ctrl *link_freq;
122 struct v4l2_ctrl *pixel_rate;
123 - struct v4l2_ctrl *hblank;
124 - struct v4l2_ctrl *vblank;
125 - struct v4l2_ctrl *hflip;
126 - struct v4l2_ctrl *vflip;
127 - struct v4l2_ctrl *exposure;
128
129 struct mutex lock;
130 };
131 @@ -137,18 +89,11 @@ struct imx290_pixfmt {
132 u8 bpp;
133 };
134
135 -#define IMX290_NUM_FORMATS 2
136 -
137 -static const struct imx290_pixfmt imx290_colour_formats[IMX290_NUM_FORMATS] = {
138 +static const struct imx290_pixfmt imx290_formats[] = {
139 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
140 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
141 };
142
143 -static const struct imx290_pixfmt imx290_mono_formats[IMX290_NUM_FORMATS] = {
144 - { MEDIA_BUS_FMT_Y10_1X10, 10 },
145 - { MEDIA_BUS_FMT_Y12_1X12, 12 },
146 -};
147 -
148 static const struct regmap_config imx290_regmap_config = {
149 .reg_bits = 16,
150 .val_bits = 8,
151 @@ -168,7 +113,11 @@ static const char * const imx290_test_pa
152
153 static const struct imx290_regval imx290_global_init_settings[] = {
154 { 0x3007, 0x00 },
155 + { 0x3018, 0x65 },
156 + { 0x3019, 0x04 },
157 { 0x301a, 0x00 },
158 + { 0x3444, 0x20 },
159 + { 0x3445, 0x25 },
160 { 0x303a, 0x0c },
161 { 0x3040, 0x00 },
162 { 0x3041, 0x00 },
163 @@ -222,33 +171,8 @@ static const struct imx290_regval imx290
164 { 0x33b3, 0x04 },
165 };
166
167 -static const struct imx290_regval imx290_37_125mhz_clock_1080p[] = {
168 - { 0x305c, 0x18 },
169 - { 0x305d, 0x03 },
170 - { 0x305e, 0x20 },
171 - { 0x305f, 0x01 },
172 - { 0x315e, 0x1a },
173 - { 0x3164, 0x1a },
174 - { 0x3444, 0x20 },
175 - { 0x3445, 0x25 },
176 - { 0x3480, 0x49 },
177 -};
178 -
179 -static const struct imx290_regval imx290_74_250mhz_clock_1080p[] = {
180 - { 0x305c, 0x0c },
181 - { 0x305d, 0x03 },
182 - { 0x305e, 0x10 },
183 - { 0x305f, 0x01 },
184 - { 0x315e, 0x1b },
185 - { 0x3164, 0x1b },
186 - { 0x3444, 0x40 },
187 - { 0x3445, 0x4a },
188 - { 0x3480, 0x92 },
189 -};
190 -
191 -static const struct imx290_regval imx290_1080p_common_settings[] = {
192 +static const struct imx290_regval imx290_1080p_settings[] = {
193 /* mode settings */
194 - { IMX290_FR_FDG_SEL, 0x01 },
195 { 0x3007, 0x00 },
196 { 0x303a, 0x0c },
197 { 0x3414, 0x0a },
198 @@ -258,36 +182,15 @@ static const struct imx290_regval imx290
199 { 0x3419, 0x04 },
200 { 0x3012, 0x64 },
201 { 0x3013, 0x00 },
202 -};
203 -
204 -static const struct imx290_regval imx290_1080p_2lane_settings[] = {
205 - { 0x3405, 0x00 },
206 + { 0x305c, 0x18 },
207 + { 0x305d, 0x03 },
208 + { 0x305e, 0x20 },
209 + { 0x305f, 0x01 },
210 + { 0x315e, 0x1a },
211 + { 0x3164, 0x1a },
212 + { 0x3480, 0x49 },
213 /* data rate settings */
214 - { IMX290_PHY_LANE_NUM, 0x01 },
215 - { IMX290_CSI_LANE_MODE, 0x01 },
216 - { 0x3446, 0x77 },
217 - { 0x3447, 0x00 },
218 - { 0x3448, 0x67 },
219 - { 0x3449, 0x00 },
220 - { 0x344a, 0x47 },
221 - { 0x344b, 0x00 },
222 - { 0x344c, 0x37 },
223 - { 0x344d, 0x00 },
224 - { 0x344e, 0x3f },
225 - { 0x344f, 0x00 },
226 - { 0x3450, 0xff },
227 - { 0x3451, 0x00 },
228 - { 0x3452, 0x3f },
229 - { 0x3453, 0x00 },
230 - { 0x3454, 0x37 },
231 - { 0x3455, 0x00 },
232 -};
233 -
234 -static const struct imx290_regval imx290_1080p_4lane_settings[] = {
235 { 0x3405, 0x10 },
236 - /* data rate settings */
237 - { IMX290_PHY_LANE_NUM, 0x03 },
238 - { IMX290_CSI_LANE_MODE, 0x03 },
239 { 0x3446, 0x57 },
240 { 0x3447, 0x00 },
241 { 0x3448, 0x37 },
242 @@ -306,33 +209,8 @@ static const struct imx290_regval imx290
243 { 0x3455, 0x00 },
244 };
245
246 -static const struct imx290_regval imx290_37_125mhz_clock_720p[] = {
247 - { 0x305c, 0x20 },
248 - { 0x305d, 0x00 },
249 - { 0x305e, 0x20 },
250 - { 0x305f, 0x01 },
251 - { 0x315e, 0x1a },
252 - { 0x3164, 0x1a },
253 - { 0x3444, 0x20 },
254 - { 0x3445, 0x25 },
255 - { 0x3480, 0x49 },
256 -};
257 -
258 -static const struct imx290_regval imx290_74_250mhz_clock_720p[] = {
259 - { 0x305c, 0x10 },
260 - { 0x305d, 0x00 },
261 - { 0x305e, 0x10 },
262 - { 0x305f, 0x01 },
263 - { 0x315e, 0x1b },
264 - { 0x3164, 0x1b },
265 - { 0x3444, 0x40 },
266 - { 0x3445, 0x4a },
267 - { 0x3480, 0x92 },
268 -};
269 -
270 -static const struct imx290_regval imx290_720p_common_settings[] = {
271 +static const struct imx290_regval imx290_720p_settings[] = {
272 /* mode settings */
273 - { IMX290_FR_FDG_SEL, 0x01 },
274 { 0x3007, 0x10 },
275 { 0x303a, 0x06 },
276 { 0x3414, 0x04 },
277 @@ -342,36 +220,15 @@ static const struct imx290_regval imx290
278 { 0x3419, 0x02 },
279 { 0x3012, 0x64 },
280 { 0x3013, 0x00 },
281 -};
282 -
283 -static const struct imx290_regval imx290_720p_2lane_settings[] = {
284 - { 0x3405, 0x00 },
285 - { IMX290_PHY_LANE_NUM, 0x01 },
286 - { IMX290_CSI_LANE_MODE, 0x01 },
287 + { 0x305c, 0x20 },
288 + { 0x305d, 0x00 },
289 + { 0x305e, 0x20 },
290 + { 0x305f, 0x01 },
291 + { 0x315e, 0x1a },
292 + { 0x3164, 0x1a },
293 + { 0x3480, 0x49 },
294 /* data rate settings */
295 - { 0x3446, 0x67 },
296 - { 0x3447, 0x00 },
297 - { 0x3448, 0x57 },
298 - { 0x3449, 0x00 },
299 - { 0x344a, 0x2f },
300 - { 0x344b, 0x00 },
301 - { 0x344c, 0x27 },
302 - { 0x344d, 0x00 },
303 - { 0x344e, 0x2f },
304 - { 0x344f, 0x00 },
305 - { 0x3450, 0xbf },
306 - { 0x3451, 0x00 },
307 - { 0x3452, 0x2f },
308 - { 0x3453, 0x00 },
309 - { 0x3454, 0x27 },
310 - { 0x3455, 0x00 },
311 -};
312 -
313 -static const struct imx290_regval imx290_720p_4lane_settings[] = {
314 { 0x3405, 0x10 },
315 - { IMX290_PHY_LANE_NUM, 0x03 },
316 - { IMX290_CSI_LANE_MODE, 0x03 },
317 - /* data rate settings */
318 { 0x3446, 0x4f },
319 { 0x3447, 0x00 },
320 { 0x3448, 0x2f },
321 @@ -451,46 +308,18 @@ static const struct imx290_mode imx290_m
322 {
323 .width = 1920,
324 .height = 1080,
325 - .hmax = 0x0898,
326 - .vmax = 0x0465,
327 + .hmax = 0x1130,
328 .link_freq_index = FREQ_INDEX_1080P,
329 - .crop = {
330 - .left = 4 + 8,
331 - .top = 12 + 8,
332 - .width = 1920,
333 - .height = 1080,
334 - },
335 - .mode_data = imx290_1080p_common_settings,
336 - .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
337 - .lane_data = imx290_1080p_2lane_settings,
338 - .lane_data_size = ARRAY_SIZE(imx290_1080p_2lane_settings),
339 - .clk_data = {
340 - [CLK_37_125] = imx290_37_125mhz_clock_1080p,
341 - [CLK_74_25] = imx290_74_250mhz_clock_1080p,
342 - },
343 - .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
344 + .data = imx290_1080p_settings,
345 + .data_size = ARRAY_SIZE(imx290_1080p_settings),
346 },
347 {
348 .width = 1280,
349 .height = 720,
350 - .hmax = 0x0ce4,
351 - .vmax = 0x02ee,
352 + .hmax = 0x19c8,
353 .link_freq_index = FREQ_INDEX_720P,
354 - .crop = {
355 - .left = 4 + 8 + 320,
356 - .top = 12 + 8 + 180,
357 - .width = 1280,
358 - .height = 720,
359 - },
360 - .mode_data = imx290_720p_common_settings,
361 - .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
362 - .lane_data = imx290_720p_2lane_settings,
363 - .lane_data_size = ARRAY_SIZE(imx290_720p_2lane_settings),
364 - .clk_data = {
365 - [CLK_37_125] = imx290_37_125mhz_clock_720p,
366 - [CLK_74_25] = imx290_74_250mhz_clock_720p,
367 - },
368 - .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
369 + .data = imx290_720p_settings,
370 + .data_size = ARRAY_SIZE(imx290_720p_settings),
371 },
372 };
373
374 @@ -499,45 +328,17 @@ static const struct imx290_mode imx290_m
375 .width = 1920,
376 .height = 1080,
377 .hmax = 0x0898,
378 - .vmax = 0x0465,
379 .link_freq_index = FREQ_INDEX_1080P,
380 - .crop = {
381 - .left = 4 + 8,
382 - .top = 12 + 8,
383 - .width = 1920,
384 - .height = 1080,
385 - },
386 - .mode_data = imx290_1080p_common_settings,
387 - .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
388 - .lane_data = imx290_1080p_4lane_settings,
389 - .lane_data_size = ARRAY_SIZE(imx290_1080p_4lane_settings),
390 - .clk_data = {
391 - [CLK_37_125] = imx290_37_125mhz_clock_1080p,
392 - [CLK_74_25] = imx290_74_250mhz_clock_1080p,
393 - },
394 - .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
395 + .data = imx290_1080p_settings,
396 + .data_size = ARRAY_SIZE(imx290_1080p_settings),
397 },
398 {
399 .width = 1280,
400 .height = 720,
401 .hmax = 0x0ce4,
402 - .vmax = 0x02ee,
403 .link_freq_index = FREQ_INDEX_720P,
404 - .crop = {
405 - .left = 4 + 8 + 320,
406 - .top = 12 + 8 + 180,
407 - .width = 1280,
408 - .height = 720,
409 - },
410 - .mode_data = imx290_720p_common_settings,
411 - .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
412 - .lane_data = imx290_720p_4lane_settings,
413 - .lane_data_size = ARRAY_SIZE(imx290_720p_4lane_settings),
414 - .clk_data = {
415 - [CLK_37_125] = imx290_37_125mhz_clock_720p,
416 - [CLK_74_25] = imx290_74_250mhz_clock_720p,
417 - },
418 - .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
419 + .data = imx290_720p_settings,
420 + .data_size = ARRAY_SIZE(imx290_720p_settings),
421 },
422 };
423
424 @@ -651,53 +452,6 @@ static int imx290_set_gain(struct imx290
425 return ret;
426 }
427
428 -static int imx290_set_exposure(struct imx290 *imx290, u32 value)
429 -{
430 - u32 exposure = (imx290->current_mode->height + imx290->vblank->val) -
431 - value - 1;
432 - int ret;
433 -
434 - ret = imx290_write_buffered_reg(imx290, IMX290_EXPOSURE_LOW, 3,
435 - exposure);
436 - if (ret)
437 - dev_err(imx290->dev, "Unable to write exposure\n");
438 -
439 - return ret;
440 -}
441 -
442 -static int imx290_set_hmax(struct imx290 *imx290, u32 val)
443 -{
444 - u32 hmax = val + imx290->current_mode->width;
445 - int ret;
446 -
447 - ret = imx290_write_buffered_reg(imx290, IMX290_HMAX_LOW, 2,
448 - hmax);
449 - if (ret)
450 - dev_err(imx290->dev, "Error setting HMAX register\n");
451 -
452 - return ret;
453 -}
454 -
455 -static int imx290_set_vmax(struct imx290 *imx290, u32 val)
456 -{
457 - u32 vmax = val + imx290->current_mode->height;
458 - int ret;
459 -
460 - ret = imx290_write_buffered_reg(imx290, IMX290_VMAX_LOW, 3,
461 - vmax);
462 - if (ret)
463 - dev_err(imx290->dev, "Unable to write vmax\n");
464 -
465 - /*
466 - * Becuse of the way exposure works for this sensor, updating
467 - * vblank causes the effective exposure to change, so we must
468 - * set it back to the "new" correct value.
469 - */
470 - imx290_set_exposure(imx290, imx290->exposure->val);
471 -
472 - return ret;
473 -}
474 -
475 /* Stop streaming */
476 static int imx290_stop_streaming(struct imx290 *imx290)
477 {
478 @@ -717,50 +471,15 @@ static int imx290_set_ctrl(struct v4l2_c
479 struct imx290 *imx290 = container_of(ctrl->handler,
480 struct imx290, ctrls);
481 int ret = 0;
482 - u8 val;
483 -
484 - if (ctrl->id == V4L2_CID_VBLANK) {
485 - u32 vmax = ctrl->val + imx290->current_mode->height;
486 -
487 - /*
488 - * Changing vblank changes the allowed range for exposure.
489 - * We don't supply the current exposure as default here as it
490 - * may lie outside the new range. We will reset it just below.
491 - */
492 - __v4l2_ctrl_modify_range(imx290->exposure,
493 - IMX290_EXPOSURE_MIN,
494 - vmax - 2,
495 - IMX290_EXPOSURE_STEP,
496 - vmax - 2);
497 - }
498
499 /* V4L2 controls values will be applied only when power is already up */
500 if (!pm_runtime_get_if_in_use(imx290->dev))
501 return 0;
502
503 switch (ctrl->id) {
504 - case V4L2_CID_ANALOGUE_GAIN:
505 + case V4L2_CID_GAIN:
506 ret = imx290_set_gain(imx290, ctrl->val);
507 break;
508 - case V4L2_CID_EXPOSURE:
509 - ret = imx290_set_exposure(imx290, ctrl->val);
510 - break;
511 - case V4L2_CID_HBLANK:
512 - ret = imx290_set_hmax(imx290, ctrl->val);
513 - break;
514 - case V4L2_CID_VBLANK:
515 - ret = imx290_set_vmax(imx290, ctrl->val);
516 - break;
517 - case V4L2_CID_HFLIP:
518 - case V4L2_CID_VFLIP:
519 - /* WINMODE is in bits [6:4], so need to read-modify-write */
520 - ret = imx290_read_reg(imx290, IMX290_FLIP_WINMODE, &val);
521 - if (ret)
522 - break;
523 - val &= ~0x03;
524 - val |= imx290->vflip->val | (imx290->hflip->val << 1);
525 - ret = imx290_write_reg(imx290, IMX290_FLIP_WINMODE, val);
526 - break;
527 case V4L2_CID_TEST_PATTERN:
528 if (ctrl->val) {
529 imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00);
530 @@ -800,12 +519,10 @@ static int imx290_enum_mbus_code(struct
531 struct v4l2_subdev_state *sd_state,
532 struct v4l2_subdev_mbus_code_enum *code)
533 {
534 - const struct imx290 *imx290 = to_imx290(sd);
535 -
536 - if (code->index >= IMX290_NUM_FORMATS)
537 + if (code->index >= ARRAY_SIZE(imx290_formats))
538 return -EINVAL;
539
540 - code->code = imx290->formats[code->index].code;
541 + code->code = imx290_formats[code->index].code;
542
543 return 0;
544 }
545 @@ -817,8 +534,8 @@ static int imx290_enum_frame_size(struct
546 const struct imx290 *imx290 = to_imx290(sd);
547 const struct imx290_mode *imx290_modes = imx290_modes_ptr(imx290);
548
549 - if (fse->code != imx290->formats[0].code &&
550 - fse->code != imx290->formats[1].code)
551 + if ((fse->code != imx290_formats[0].code) &&
552 + (fse->code != imx290_formats[1].code))
553 return -EINVAL;
554
555 if (fse->index >= imx290_modes_num(imx290))
556 @@ -859,9 +576,23 @@ static inline u8 imx290_get_link_freq_in
557 return imx290->current_mode->link_freq_index;
558 }
559
560 +static s64 imx290_get_link_freq(struct imx290 *imx290)
561 +{
562 + u8 index = imx290_get_link_freq_index(imx290);
563 +
564 + return *(imx290_link_freqs_ptr(imx290) + index);
565 +}
566 +
567 static u64 imx290_calc_pixel_rate(struct imx290 *imx290)
568 {
569 - return 148500000;
570 + s64 link_freq = imx290_get_link_freq(imx290);
571 + u8 nlanes = imx290->nlanes;
572 + u64 pixel_rate;
573 +
574 + /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
575 + pixel_rate = link_freq * 2 * nlanes;
576 + do_div(pixel_rate, imx290->bpp);
577 + return pixel_rate;
578 }
579
580 static int imx290_set_fmt(struct v4l2_subdev *sd,
581 @@ -882,30 +613,22 @@ static int imx290_set_fmt(struct v4l2_su
582 fmt->format.width = mode->width;
583 fmt->format.height = mode->height;
584
585 - for (i = 0; i < IMX290_NUM_FORMATS; i++)
586 - if (imx290->formats[i].code == fmt->format.code)
587 + for (i = 0; i < ARRAY_SIZE(imx290_formats); i++)
588 + if (imx290_formats[i].code == fmt->format.code)
589 break;
590
591 - if (i >= IMX290_NUM_FORMATS)
592 + if (i >= ARRAY_SIZE(imx290_formats))
593 i = 0;
594
595 - fmt->format.code = imx290->formats[i].code;
596 + fmt->format.code = imx290_formats[i].code;
597 fmt->format.field = V4L2_FIELD_NONE;
598 - fmt->format.colorspace = V4L2_COLORSPACE_RAW;
599 - fmt->format.ycbcr_enc =
600 - V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
601 - fmt->format.quantization =
602 - V4L2_MAP_QUANTIZATION_DEFAULT(true, fmt->format.colorspace,
603 - fmt->format.ycbcr_enc);
604 - fmt->format.xfer_func =
605 - V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
606
607 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
608 format = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
609 } else {
610 format = &imx290->current_format;
611 imx290->current_mode = mode;
612 - imx290->bpp = imx290->formats[i].bpp;
613 + imx290->bpp = imx290_formats[i].bpp;
614
615 if (imx290->link_freq)
616 __v4l2_ctrl_s_ctrl(imx290->link_freq,
617 @@ -913,18 +636,6 @@ static int imx290_set_fmt(struct v4l2_su
618 if (imx290->pixel_rate)
619 __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate,
620 imx290_calc_pixel_rate(imx290));
621 -
622 - if (imx290->hblank)
623 - __v4l2_ctrl_modify_range(imx290->hblank,
624 - mode->hmax - mode->width,
625 - IMX290_HMAX_MAX - mode->width,
626 - 1, mode->hmax - mode->width);
627 - if (imx290->vblank)
628 - __v4l2_ctrl_modify_range(imx290->vblank,
629 - mode->vmax - mode->height,
630 - IMX290_VMAX_MAX - mode->height,
631 - 1,
632 - mode->vmax - mode->height);
633 }
634
635 *format = fmt->format;
636 @@ -954,7 +665,6 @@ static int imx290_write_current_format(s
637
638 switch (imx290->current_format.code) {
639 case MEDIA_BUS_FMT_SRGGB10_1X10:
640 - case MEDIA_BUS_FMT_Y10_1X10:
641 ret = imx290_set_register_array(imx290, imx290_10bit_settings,
642 ARRAY_SIZE(
643 imx290_10bit_settings));
644 @@ -964,7 +674,6 @@ static int imx290_write_current_format(s
645 }
646 break;
647 case MEDIA_BUS_FMT_SRGGB12_1X12:
648 - case MEDIA_BUS_FMT_Y12_1X12:
649 ret = imx290_set_register_array(imx290, imx290_12bit_settings,
650 ARRAY_SIZE(
651 imx290_12bit_settings));
652 @@ -981,63 +690,28 @@ static int imx290_write_current_format(s
653 return 0;
654 }
655
656 -static const struct v4l2_rect *
657 -__imx290_get_pad_crop(struct imx290 *imx290,
658 - struct v4l2_subdev_state *sd_state,
659 - unsigned int pad, enum v4l2_subdev_format_whence which)
660 -{
661 - switch (which) {
662 - case V4L2_SUBDEV_FORMAT_TRY:
663 - return v4l2_subdev_get_try_crop(&imx290->sd, sd_state, pad);
664 - case V4L2_SUBDEV_FORMAT_ACTIVE:
665 - return &imx290->current_mode->crop;
666 - }
667 -
668 - return NULL;
669 -}
670 -
671 -static int imx290_get_selection(struct v4l2_subdev *sd,
672 - struct v4l2_subdev_state *sd_state,
673 - struct v4l2_subdev_selection *sel)
674 +static int imx290_set_hmax(struct imx290 *imx290, u32 val)
675 {
676 - switch (sel->target) {
677 - case V4L2_SEL_TGT_CROP: {
678 - struct imx290 *imx290 = to_imx290(sd);
679 -
680 - mutex_lock(&imx290->lock);
681 - sel->r = *__imx290_get_pad_crop(imx290, sd_state, sel->pad,
682 - sel->which);
683 - mutex_unlock(&imx290->lock);
684 + int ret;
685
686 - return 0;
687 + ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff));
688 + if (ret) {
689 + dev_err(imx290->dev, "Error setting HMAX register\n");
690 + return ret;
691 }
692
693 - case V4L2_SEL_TGT_NATIVE_SIZE:
694 - sel->r.top = 0;
695 - sel->r.left = 0;
696 - sel->r.width = IMX290_NATIVE_WIDTH;
697 - sel->r.height = IMX290_NATIVE_HEIGHT;
698 -
699 - return 0;
700 -
701 - case V4L2_SEL_TGT_CROP_DEFAULT:
702 - case V4L2_SEL_TGT_CROP_BOUNDS:
703 - sel->r.top = IMX290_PIXEL_ARRAY_TOP;
704 - sel->r.left = IMX290_PIXEL_ARRAY_LEFT;
705 - sel->r.width = IMX290_PIXEL_ARRAY_WIDTH;
706 - sel->r.height = IMX290_PIXEL_ARRAY_HEIGHT;
707 -
708 - return 0;
709 + ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff));
710 + if (ret) {
711 + dev_err(imx290->dev, "Error setting HMAX register\n");
712 + return ret;
713 }
714
715 - return -EINVAL;
716 + return 0;
717 }
718
719 /* Start streaming */
720 static int imx290_start_streaming(struct imx290 *imx290)
721 {
722 - enum imx290_clk_index clk_idx = imx290->xclk_freq == 37125000 ?
723 - CLK_37_125 : CLK_74_25;
724 int ret;
725
726 /* Set init register settings */
727 @@ -1049,14 +723,6 @@ static int imx290_start_streaming(struct
728 return ret;
729 }
730
731 - ret = imx290_set_register_array(imx290,
732 - imx290->current_mode->clk_data[clk_idx],
733 - imx290->current_mode->clk_size);
734 - if (ret < 0) {
735 - dev_err(imx290->dev, "Could not set clock registers\n");
736 - return ret;
737 - }
738 -
739 /* Apply the register values related to current frame format */
740 ret = imx290_write_current_format(imx290);
741 if (ret < 0) {
742 @@ -1065,22 +731,15 @@ static int imx290_start_streaming(struct
743 }
744
745 /* Apply default values of current mode */
746 - ret = imx290_set_register_array(imx290,
747 - imx290->current_mode->mode_data,
748 - imx290->current_mode->mode_data_size);
749 + ret = imx290_set_register_array(imx290, imx290->current_mode->data,
750 + imx290->current_mode->data_size);
751 if (ret < 0) {
752 dev_err(imx290->dev, "Could not set current mode\n");
753 return ret;
754 }
755 -
756 - /* Apply lane config registers of current mode */
757 - ret = imx290_set_register_array(imx290,
758 - imx290->current_mode->lane_data,
759 - imx290->current_mode->lane_data_size);
760 - if (ret < 0) {
761 - dev_err(imx290->dev, "Could not set current mode\n");
762 + ret = imx290_set_hmax(imx290, imx290->current_mode->hmax);
763 + if (ret < 0)
764 return ret;
765 - }
766
767 /* Apply customized values from user */
768 ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler);
769 @@ -1119,9 +778,6 @@ static int imx290_set_stream(struct v4l2
770 imx290_stop_streaming(imx290);
771 pm_runtime_put(imx290->dev);
772 }
773 - /* vflip and hflip cannot change during streaming */
774 - __v4l2_ctrl_grab(imx290->vflip, enable);
775 - __v4l2_ctrl_grab(imx290->hflip, enable);
776
777 unlock_and_return:
778
779 @@ -1139,6 +795,49 @@ static int imx290_get_regulators(struct
780 imx290->supplies);
781 }
782
783 +static int imx290_set_data_lanes(struct imx290 *imx290)
784 +{
785 + int ret = 0, laneval, frsel;
786 +
787 + switch (imx290->nlanes) {
788 + case 2:
789 + laneval = 0x01;
790 + frsel = 0x02;
791 + break;
792 + case 4:
793 + laneval = 0x03;
794 + frsel = 0x01;
795 + break;
796 + default:
797 + /*
798 + * We should never hit this since the data lane count is
799 + * validated in probe itself
800 + */
801 + dev_err(imx290->dev, "Lane configuration not supported\n");
802 + ret = -EINVAL;
803 + goto exit;
804 + }
805 +
806 + ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval);
807 + if (ret) {
808 + dev_err(imx290->dev, "Error setting Physical Lane number register\n");
809 + goto exit;
810 + }
811 +
812 + ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval);
813 + if (ret) {
814 + dev_err(imx290->dev, "Error setting CSI Lane mode register\n");
815 + goto exit;
816 + }
817 +
818 + ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel);
819 + if (ret)
820 + dev_err(imx290->dev, "Error setting FR/FDG SEL register\n");
821 +
822 +exit:
823 + return ret;
824 +}
825 +
826 static int imx290_power_on(struct device *dev)
827 {
828 struct v4l2_subdev *sd = dev_get_drvdata(dev);
829 @@ -1162,6 +861,9 @@ static int imx290_power_on(struct device
830 gpiod_set_value_cansleep(imx290->rst_gpio, 0);
831 usleep_range(30000, 31000);
832
833 + /* Set data lane count */
834 + imx290_set_data_lanes(imx290);
835 +
836 return 0;
837 }
838
839 @@ -1191,7 +893,6 @@ static const struct v4l2_subdev_pad_ops
840 .enum_frame_size = imx290_enum_frame_size,
841 .get_fmt = imx290_get_fmt,
842 .set_fmt = imx290_set_fmt,
843 - .get_selection = imx290_get_selection,
844 };
845
846 static const struct v4l2_subdev_ops imx290_subdev_ops = {
847 @@ -1225,35 +926,16 @@ static s64 imx290_check_link_freqs(const
848 return 0;
849 }
850
851 -static const struct of_device_id imx290_of_match[] = {
852 - /*
853 - * imx327 supports 1080p60 at 10 and 12bit.
854 - * imx290 adds 10bit 1080p120.
855 - * imx462 adds 10 and 12bit 1080p120.
856 - * This driver currently maxes out at 1080p60, which is supported by all
857 - * of them, but add the compatible strings for future implementation.
858 - */
859 - { .compatible = "sony,imx327", .data = imx290_colour_formats },
860 - { .compatible = "sony,imx327-mono", .data = imx290_mono_formats },
861 - { .compatible = "sony,imx290", .data = imx290_colour_formats },
862 - { .compatible = "sony,imx290-mono", .data = imx290_mono_formats },
863 - { .compatible = "sony,imx462", .data = imx290_colour_formats },
864 - { .compatible = "sony,imx462-mono", .data = imx290_mono_formats },
865 - { /* sentinel */ }
866 -};
867 -
868 static int imx290_probe(struct i2c_client *client)
869 {
870 - struct v4l2_fwnode_device_properties props;
871 struct device *dev = &client->dev;
872 struct fwnode_handle *endpoint;
873 /* Only CSI2 is supported for now: */
874 struct v4l2_fwnode_endpoint ep = {
875 .bus_type = V4L2_MBUS_CSI2_DPHY
876 };
877 - const struct of_device_id *match;
878 - const struct imx290_mode *mode;
879 struct imx290 *imx290;
880 + u32 xclk_freq;
881 s64 fq;
882 int ret;
883
884 @@ -1268,11 +950,6 @@ static int imx290_probe(struct i2c_clien
885 return -ENODEV;
886 }
887
888 - match = of_match_device(imx290_of_match, dev);
889 - if (!match)
890 - return -ENODEV;
891 - imx290->formats = (const struct imx290_pixfmt *)match->data;
892 -
893 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
894 if (!endpoint) {
895 dev_err(dev, "Endpoint node not found\n");
896 @@ -1322,21 +999,21 @@ static int imx290_probe(struct i2c_clien
897 }
898
899 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
900 - &imx290->xclk_freq);
901 + &xclk_freq);
902 if (ret) {
903 dev_err(dev, "Could not get xclk frequency\n");
904 goto free_err;
905 }
906
907 /* external clock must be 37.125 MHz */
908 - if (imx290->xclk_freq != 37125000 && imx290->xclk_freq != 74250000) {
909 + if (xclk_freq != 37125000) {
910 dev_err(dev, "External clock frequency %u is not supported\n",
911 - imx290->xclk_freq);
912 + xclk_freq);
913 ret = -EINVAL;
914 goto free_err;
915 }
916
917 - ret = clk_set_rate(imx290->xclk, imx290->xclk_freq);
918 + ret = clk_set_rate(imx290->xclk, xclk_freq);
919 if (ret) {
920 dev_err(dev, "Could not set xclk frequency\n");
921 goto free_err;
922 @@ -1360,39 +1037,15 @@ static int imx290_probe(struct i2c_clien
923
924 /*
925 * Initialize the frame format. In particular, imx290->current_mode
926 - * and imx290->bpp are set to defaults.
927 + * and imx290->bpp are set to defaults: imx290_calc_pixel_rate() call
928 + * below relies on these fields.
929 */
930 imx290_entity_init_cfg(&imx290->sd, NULL);
931
932 - v4l2_ctrl_handler_init(&imx290->ctrls, 11);
933 + v4l2_ctrl_handler_init(&imx290->ctrls, 4);
934
935 v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
936 - V4L2_CID_ANALOGUE_GAIN, 0, 100, 1, 0);
937 -
938 - mode = imx290->current_mode;
939 - imx290->hblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
940 - V4L2_CID_HBLANK,
941 - mode->hmax - mode->width,
942 - IMX290_HMAX_MAX - mode->width, 1,
943 - mode->hmax - mode->width);
944 -
945 - imx290->vblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
946 - V4L2_CID_VBLANK,
947 - mode->vmax - mode->height,
948 - IMX290_VMAX_MAX - mode->height, 1,
949 - mode->vmax - mode->height);
950 -
951 - imx290->exposure = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
952 - V4L2_CID_EXPOSURE,
953 - IMX290_EXPOSURE_MIN,
954 - mode->vmax - 2,
955 - IMX290_EXPOSURE_STEP,
956 - mode->vmax - 2);
957 -
958 - imx290->hflip = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
959 - V4L2_CID_HFLIP, 0, 1, 1, 0);
960 - imx290->vflip = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
961 - V4L2_CID_VFLIP, 0, 1, 1, 0);
962 + V4L2_CID_GAIN, 0, 72, 1, 0);
963
964 imx290->link_freq =
965 v4l2_ctrl_new_int_menu(&imx290->ctrls, &imx290_ctrl_ops,
966 @@ -1412,15 +1065,6 @@ static int imx290_probe(struct i2c_clien
967 ARRAY_SIZE(imx290_test_pattern_menu) - 1,
968 0, 0, imx290_test_pattern_menu);
969
970 - ret = v4l2_fwnode_device_parse(&client->dev, &props);
971 - if (ret)
972 - goto free_ctrl;
973 -
974 - ret = v4l2_ctrl_new_fwnode_properties(&imx290->ctrls, &imx290_ctrl_ops,
975 - &props);
976 - if (ret)
977 - goto free_ctrl;
978 -
979 imx290->sd.ctrl_handler = &imx290->ctrls;
980
981 if (imx290->ctrls.error) {
982 @@ -1443,9 +1087,6 @@ static int imx290_probe(struct i2c_clien
983 goto free_ctrl;
984 }
985
986 - /* Initialize the frame format (this also sets imx290->current_mode) */
987 - imx290_entity_init_cfg(&imx290->sd, NULL);
988 -
989 ret = v4l2_async_register_subdev(&imx290->sd);
990 if (ret < 0) {
991 dev_err(dev, "Could not register v4l2 device\n");
992 @@ -1495,6 +1136,10 @@ static void imx290_remove(struct i2c_cli
993 pm_runtime_set_suspended(imx290->dev);
994 }
995
996 +static const struct of_device_id imx290_of_match[] = {
997 + { .compatible = "sony,imx290" },
998 + { /* sentinel */ }
999 +};
1000 MODULE_DEVICE_TABLE(of, imx290_of_match);
1001
1002 static struct i2c_driver imx290_i2c_driver = {
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