target/linux/bcm27xx/patches-5.4/950-0785-ARM-dts-Add-bcm2711-rpi-cm4.dts.patch

   1 From 104dcc1aff0ae5509ad9875c11e3e0d8c290709d Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.com>
   3 Date: Tue, 2 Jun 2020 17:19:51 +0100
   4 Subject: [PATCH] ARM: dts: Add bcm2711-rpi-cm4.dts
   5
   6 Add initial DTS file for Compute Module 4.
   7
   8 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
   9 ---
  10  arch/arm/boot/dts/Makefile            |   3 +-
  11  arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 586 ++++++++++++++++++++++++++
  12  arch/arm/boot/dts/overlays/README     |   6 +
  13  3 files changed, 594 insertions(+), 1 deletion(-)
  14  create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
  15
  16 --- a/arch/arm/boot/dts/Makefile
  17 +++ b/arch/arm/boot/dts/Makefile
  18 @@ -12,7 +12,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
  19         bcm2710-rpi-3-b.dtb \
  20         bcm2711-rpi-4-b.dtb \
  21         bcm2710-rpi-3-b-plus.dtb \
  22 -       bcm2710-rpi-cm3.dtb
  23 +       bcm2710-rpi-cm3.dtb \
  24 +       bcm2711-rpi-cm4.dtb
  25
  26  dtb-$(CONFIG_ARCH_ALPINE) += \
  27         alpine-db.dtb
  28 --- /dev/null
  29 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
  30 @@ -0,0 +1,586 @@
  31 +// SPDX-License-Identifier: GPL-2.0
  32 +/dts-v1/;
  33 +#include "bcm2711.dtsi"
  34 +#include "bcm2835-rpi.dtsi"
  35 +
  36 +/ {
  37 +       compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
  38 +       model = "Raspberry Pi Compute Module 4";
  39 +
  40 +       chosen {
  41 +               /* 8250 auxiliary UART instead of pl011 */
  42 +               stdout-path = "serial1:115200n8";
  43 +       };
  44 +
  45 +       /* Will be filled by the bootloader */
  46 +       memory@0 {
  47 +               device_type = "memory";
  48 +               reg = <0 0 0>;
  49 +       };
  50 +
  51 +       aliases {
  52 +               ethernet0 = &genet;
  53 +       };
  54 +
  55 +       leds {
  56 +               act {
  57 +                       gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
  58 +               };
  59 +
  60 +               pwr {
  61 +                       label = "PWR";
  62 +                       gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
  63 +               };
  64 +       };
  65 +
  66 +       wifi_pwrseq: wifi-pwrseq {
  67 +               compatible = "mmc-pwrseq-simple";
  68 +               reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
  69 +       };
  70 +
  71 +       sd_io_1v8_reg: sd_io_1v8_reg {
  72 +               compatible = "regulator-gpio";
  73 +               regulator-name = "vdd-sd-io";
  74 +               regulator-min-microvolt = <1800000>;
  75 +               regulator-max-microvolt = <3300000>;
  76 +               regulator-boot-on;
  77 +               regulator-always-on;
  78 +               regulator-settling-time-us = <5000>;
  79 +               gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
  80 +               states = <1800000 0x1
  81 +                         3300000 0x0>;
  82 +               status = "okay";
  83 +       };
  84 +};
  85 +
  86 +&firmware {
  87 +       expgpio: gpio {
  88 +               compatible = "raspberrypi,firmware-gpio";
  89 +               gpio-controller;
  90 +               #gpio-cells = <2>;
  91 +               gpio-line-names = "BT_ON",
  92 +                                 "WL_ON",
  93 +                                 "PWR_LED_OFF",
  94 +                                 "ANT1",
  95 +                                 "VDD_SD_IO_SEL",
  96 +                                 "CAM_GPIO",
  97 +                                 "SD_PWR_ON",
  98 +                                 "ANT2";
  99 +               status = "okay";
 100 +
 101 +               ant1: ant1 {
 102 +                       gpio-hog;
 103 +                       gpios = <3 GPIO_ACTIVE_HIGH>;
 104 +                       output-high;
 105 +               };
 106 +
 107 +               ant2: ant2 {
 108 +                       gpio-hog;
 109 +                       gpios = <7 GPIO_ACTIVE_HIGH>;
 110 +                       output-low;
 111 +               };
 112 +       };
 113 +};
 114 +
 115 +&pwm1 {
 116 +       pinctrl-names = "default";
 117 +       pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
 118 +       status = "okay";
 119 +};
 120 +
 121 +/* SDHCI is used to control the SDIO for wireless */
 122 +&sdhci {
 123 +       #address-cells = <1>;
 124 +       #size-cells = <0>;
 125 +       pinctrl-names = "default";
 126 +       pinctrl-0 = <&emmc_gpio34>;
 127 +       bus-width = <4>;
 128 +       non-removable;
 129 +       mmc-pwrseq = <&wifi_pwrseq>;
 130 +       status = "okay";
 131 +
 132 +       brcmf: wifi@1 {
 133 +               reg = <1>;
 134 +               compatible = "brcm,bcm4329-fmac";
 135 +       };
 136 +};
 137 +
 138 +/* EMMC2 is used to drive the SD card */
 139 +&emmc2 {
 140 +       vqmmc-supply = <&sd_io_1v8_reg>;
 141 +       broken-cd;
 142 +       status = "okay";
 143 +};
 144 +
 145 +&genet {
 146 +       phy-handle = <&phy1>;
 147 +       phy-mode = "rgmii-rxid";
 148 +       status = "okay";
 149 +};
 150 +
 151 +&genet_mdio {
 152 +       phy1: ethernet-phy@1 {
 153 +               /* No PHY interrupt */
 154 +               reg = <0x1>;
 155 +       };
 156 +};
 157 +
 158 +/* uart0 communicates with the BT module */
 159 +&uart0 {
 160 +       pinctrl-names = "default";
 161 +       pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
 162 +       uart-has-rtscts;
 163 +       status = "okay";
 164 +
 165 +       bluetooth {
 166 +               compatible = "brcm,bcm43438-bt";
 167 +               max-speed = <2000000>;
 168 +               shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
 169 +       };
 170 +};
 171 +
 172 +/* uart1 is mapped to the pin header */
 173 +&uart1 {
 174 +       pinctrl-names = "default";
 175 +       pinctrl-0 = <&uart1_gpio14>;
 176 +       status = "okay";
 177 +};
 178 +
 179 +&vchiq {
 180 +       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 181 +};
 182 +
 183 +&vc4 {
 184 +       status = "okay";
 185 +};
 186 +
 187 +&pixelvalve0 {
 188 +       status = "okay";
 189 +};
 190 +
 191 +&pixelvalve1 {
 192 +       status = "okay";
 193 +};
 194 +
 195 +&pixelvalve2 {
 196 +       status = "okay";
 197 +};
 198 +
 199 +&pixelvalve3 {
 200 +       status = "okay";
 201 +};
 202 +
 203 +&pixelvalve4 {
 204 +       status = "okay";
 205 +};
 206 +
 207 +&hdmi0 {
 208 +       status = "okay";
 209 +};
 210 +
 211 +&ddc0 {
 212 +       status = "okay";
 213 +};
 214 +
 215 +&hdmi1 {
 216 +       status = "okay";
 217 +};
 218 +
 219 +&ddc1 {
 220 +       status = "okay";
 221 +};
 222 +
 223 +// =============================================
 224 +// Downstream rpi- changes
 225 +
 226 +#include "bcm270x.dtsi"
 227 +
 228 +/ {
 229 +       soc {
 230 +               /delete-node/ pixelvalve@7e807000;
 231 +               /delete-node/ hdmi@7e902000;
 232 +       };
 233 +};
 234 +
 235 +#include "bcm2711-rpi.dtsi"
 236 +#include "bcm283x-rpi-csi1-2lane.dtsi"
 237 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
 238 +
 239 +/delete-node/ &emmc2;
 240 +
 241 +/ {
 242 +       chosen {
 243 +               bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
 244 +       };
 245 +
 246 +       aliases {
 247 +               serial0 = &uart1;
 248 +               serial1 = &uart0;
 249 +               mmc0 = &emmc2;
 250 +               mmc1 = &mmcnr;
 251 +               mmc2 = &sdhost;
 252 +               /delete-property/ i2c2;
 253 +               i2c3 = &i2c3;
 254 +               i2c4 = &i2c4;
 255 +               i2c5 = &i2c5;
 256 +               i2c6 = &i2c6;
 257 +               /delete-property/ ethernet;
 258 +               /delete-property/ intc;
 259 +               pcie0 = &pcie0;
 260 +               emmc2bus = &emmc2bus;
 261 +       };
 262 +
 263 +       emmc2bus: emmc2bus {
 264 +               compatible = "simple-bus";
 265 +               #address-cells = <2>;
 266 +               #size-cells = <1>;
 267 +
 268 +               ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
 269 +               dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
 270 +
 271 +               emmc2: emmc2@7e340000 {
 272 +                       compatible = "brcm,bcm2711-emmc2";
 273 +                       status = "okay";
 274 +                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 275 +                       clocks = <&clocks BCM2711_CLOCK_EMMC2>;
 276 +                       reg = <0x0 0x7e340000 0x100>;
 277 +                       vqmmc-supply = <&sd_io_1v8_reg>;
 278 +                       broken-cd;
 279 +               };
 280 +       };
 281 +
 282 +       /delete-node/ wifi-pwrseq;
 283 +};
 284 +
 285 +&mmcnr {
 286 +       pinctrl-names = "default";
 287 +       pinctrl-0 = <&sdio_pins>;
 288 +       bus-width = <4>;
 289 +       status = "okay";
 290 +};
 291 +
 292 +&uart0 {
 293 +       pinctrl-0 = <&uart0_pins &bt_pins>;
 294 +       status = "okay";
 295 +
 296 +       /delete-node/ bluetooth;
 297 +};
 298 +
 299 +&uart1 {
 300 +       pinctrl-0 = <&uart1_pins>;
 301 +};
 302 +
 303 +&spi0 {
 304 +       pinctrl-names = "default";
 305 +       pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
 306 +       cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
 307 +
 308 +       spidev0: spidev@0{
 309 +               compatible = "spidev";
 310 +               reg = <0>;      /* CE0 */
 311 +               #address-cells = <1>;
 312 +               #size-cells = <0>;
 313 +               spi-max-frequency = <125000000>;
 314 +       };
 315 +
 316 +       spidev1: spidev@1{
 317 +               compatible = "spidev";
 318 +               reg = <1>;      /* CE1 */
 319 +               #address-cells = <1>;
 320 +               #size-cells = <0>;
 321 +               spi-max-frequency = <125000000>;
 322 +       };
 323 +};
 324 +
 325 +&gpio {
 326 +       spi0_pins: spi0_pins {
 327 +               brcm,pins = <9 10 11>;
 328 +               brcm,function = <BCM2835_FSEL_ALT0>;
 329 +       };
 330 +
 331 +       spi0_cs_pins: spi0_cs_pins {
 332 +               brcm,pins = <8 7>;
 333 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 334 +       };
 335 +
 336 +       spi3_pins: spi3_pins {
 337 +               brcm,pins = <1 2 3>;
 338 +               brcm,function = <BCM2835_FSEL_ALT3>;
 339 +       };
 340 +
 341 +       spi3_cs_pins: spi3_cs_pins {
 342 +               brcm,pins = <0 24>;
 343 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 344 +       };
 345 +
 346 +       spi4_pins: spi4_pins {
 347 +               brcm,pins = <5 6 7>;
 348 +               brcm,function = <BCM2835_FSEL_ALT3>;
 349 +       };
 350 +
 351 +       spi4_cs_pins: spi4_cs_pins {
 352 +               brcm,pins = <4 25>;
 353 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 354 +       };
 355 +
 356 +       spi5_pins: spi5_pins {
 357 +               brcm,pins = <13 14 15>;
 358 +               brcm,function = <BCM2835_FSEL_ALT3>;
 359 +       };
 360 +
 361 +       spi5_cs_pins: spi5_cs_pins {
 362 +               brcm,pins = <12 26>;
 363 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 364 +       };
 365 +
 366 +       spi6_pins: spi6_pins {
 367 +               brcm,pins = <19 20 21>;
 368 +               brcm,function = <BCM2835_FSEL_ALT3>;
 369 +       };
 370 +
 371 +       spi6_cs_pins: spi6_cs_pins {
 372 +               brcm,pins = <18 27>;
 373 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 374 +       };
 375 +
 376 +       i2c0_pins: i2c0 {
 377 +               brcm,pins = <0 1>;
 378 +               brcm,function = <BCM2835_FSEL_ALT0>;
 379 +               brcm,pull = <BCM2835_PUD_UP>;
 380 +       };
 381 +
 382 +       i2c1_pins: i2c1 {
 383 +               brcm,pins = <2 3>;
 384 +               brcm,function = <BCM2835_FSEL_ALT0>;
 385 +               brcm,pull = <BCM2835_PUD_UP>;
 386 +       };
 387 +
 388 +       i2c3_pins: i2c3 {
 389 +               brcm,pins = <4 5>;
 390 +               brcm,function = <BCM2835_FSEL_ALT5>;
 391 +               brcm,pull = <BCM2835_PUD_UP>;
 392 +       };
 393 +
 394 +       i2c4_pins: i2c4 {
 395 +               brcm,pins = <8 9>;
 396 +               brcm,function = <BCM2835_FSEL_ALT5>;
 397 +               brcm,pull = <BCM2835_PUD_UP>;
 398 +       };
 399 +
 400 +       i2c5_pins: i2c5 {
 401 +               brcm,pins = <12 13>;
 402 +               brcm,function = <BCM2835_FSEL_ALT5>;
 403 +               brcm,pull = <BCM2835_PUD_UP>;
 404 +       };
 405 +
 406 +       i2c6_pins: i2c6 {
 407 +               brcm,pins = <22 23>;
 408 +               brcm,function = <BCM2835_FSEL_ALT5>;
 409 +               brcm,pull = <BCM2835_PUD_UP>;
 410 +       };
 411 +
 412 +       i2s_pins: i2s {
 413 +               brcm,pins = <18 19 20 21>;
 414 +               brcm,function = <BCM2835_FSEL_ALT0>;
 415 +       };
 416 +
 417 +       sdio_pins: sdio_pins {
 418 +               brcm,pins =     <34 35 36 37 38 39>;
 419 +               brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
 420 +               brcm,pull =     <0 2 2 2 2 2>;
 421 +       };
 422 +
 423 +       bt_pins: bt_pins {
 424 +               brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
 425 +                                // to fool pinctrl
 426 +               brcm,function = <0>;
 427 +               brcm,pull = <2>;
 428 +       };
 429 +
 430 +       uart0_pins: uart0_pins {
 431 +               brcm,pins = <32 33>;
 432 +               brcm,function = <BCM2835_FSEL_ALT3>;
 433 +               brcm,pull = <0 2>;
 434 +       };
 435 +
 436 +       uart1_pins: uart1_pins {
 437 +               brcm,pins;
 438 +               brcm,function;
 439 +               brcm,pull;
 440 +       };
 441 +
 442 +       uart2_pins: uart2_pins {
 443 +               brcm,pins = <0 1>;
 444 +               brcm,function = <BCM2835_FSEL_ALT4>;
 445 +               brcm,pull = <0 2>;
 446 +       };
 447 +
 448 +       uart3_pins: uart3_pins {
 449 +               brcm,pins = <4 5>;
 450 +               brcm,function = <BCM2835_FSEL_ALT4>;
 451 +               brcm,pull = <0 2>;
 452 +       };
 453 +
 454 +       uart4_pins: uart4_pins {
 455 +               brcm,pins = <8 9>;
 456 +               brcm,function = <BCM2835_FSEL_ALT4>;
 457 +               brcm,pull = <0 2>;
 458 +       };
 459 +
 460 +       uart5_pins: uart5_pins {
 461 +               brcm,pins = <12 13>;
 462 +               brcm,function = <BCM2835_FSEL_ALT4>;
 463 +               brcm,pull = <0 2>;
 464 +       };
 465 +};
 466 +
 467 +&i2c0if {
 468 +       clock-frequency = <100000>;
 469 +};
 470 +
 471 +&i2c1 {
 472 +       pinctrl-names = "default";
 473 +       pinctrl-0 = <&i2c1_pins>;
 474 +       clock-frequency = <100000>;
 475 +};
 476 +
 477 +&i2s {
 478 +       pinctrl-names = "default";
 479 +       pinctrl-0 = <&i2s_pins>;
 480 +};
 481 +
 482 +/ {
 483 +       __overrides__ {
 484 +               /delete-property/ i2c2_baudrate;
 485 +               /delete-property/ i2c2_iknowwhatimdoing;
 486 +       };
 487 +};
 488 +
 489 +// =============================================
 490 +// Board specific stuff here
 491 +
 492 +/ {
 493 +       sd_vcc_reg: sd_vcc_reg {
 494 +               compatible = "regulator-fixed";
 495 +               regulator-name = "vcc-sd";
 496 +               regulator-min-microvolt = <3300000>;
 497 +               regulator-max-microvolt = <3300000>;
 498 +               regulator-boot-on;
 499 +               enable-active-high;
 500 +               gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
 501 +       };
 502 +};
 503 +
 504 +&sdhost {
 505 +       status = "disabled";
 506 +};
 507 +
 508 +&emmc2 {
 509 +       vmmc-supply = <&sd_vcc_reg>;
 510 +       bus-width = <8>;
 511 +};
 512 +
 513 +&phy1 {
 514 +       led-modes = <0x00 0x08>; /* link/activity link */
 515 +};
 516 +
 517 +&gpio {
 518 +       audio_pins: audio_pins {
 519 +               brcm,pins = <40 41>;
 520 +               brcm,function = <4>;
 521 +       };
 522 +};
 523 +
 524 +&leds {
 525 +       act_led: act {
 526 +               label = "led0";
 527 +               linux,default-trigger = "mmc0";
 528 +               gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
 529 +       };
 530 +
 531 +       pwr_led: pwr {
 532 +               label = "led1";
 533 +               linux,default-trigger = "default-on";
 534 +               gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
 535 +       };
 536 +};
 537 +
 538 +&pwm1 {
 539 +       status = "disabled";
 540 +};
 541 +
 542 +&audio {
 543 +       pinctrl-names = "default";
 544 +       pinctrl-0 = <&audio_pins>;
 545 +};
 546 +
 547 +&vc4 {
 548 +       status = "disabled";
 549 +};
 550 +
 551 +&pixelvalve0 {
 552 +       status = "disabled";
 553 +};
 554 +
 555 +&pixelvalve1 {
 556 +       status = "disabled";
 557 +};
 558 +
 559 +&pixelvalve2 {
 560 +       status = "disabled";
 561 +};
 562 +
 563 +&pixelvalve3 {
 564 +       status = "disabled";
 565 +};
 566 +
 567 +&pixelvalve4 {
 568 +       status = "disabled";
 569 +};
 570 +
 571 +&hdmi0 {
 572 +       status = "disabled";
 573 +};
 574 +
 575 +&ddc0 {
 576 +       status = "disabled";
 577 +};
 578 +
 579 +&hdmi1 {
 580 +       status = "disabled";
 581 +};
 582 +
 583 +&ddc1 {
 584 +       status = "disabled";
 585 +};
 586 +
 587 +/ {
 588 +       __overrides__ {
 589 +               act_led_gpio = <&act_led>,"gpios:4";
 590 +               act_led_activelow = <&act_led>,"gpios:8";
 591 +               act_led_trigger = <&act_led>,"linux,default-trigger";
 592 +
 593 +               pwr_led_gpio = <&pwr_led>,"gpios:4";
 594 +               pwr_led_activelow = <&pwr_led>,"gpios:8";
 595 +               pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
 596 +
 597 +               eth_led0 = <&phy1>,"led-modes:0";
 598 +               eth_led1 = <&phy1>,"led-modes:4";
 599 +
 600 +               ant1 =  <&ant1>,"output-high?=on",
 601 +                       <&ant1>, "output-low?=off",
 602 +                       <&ant2>, "output-high?=off",
 603 +                       <&ant2>, "output-low?=on";
 604 +               ant2 =  <&ant1>,"output-high?=off",
 605 +                       <&ant1>, "output-low?=on",
 606 +                       <&ant2>, "output-high?=on",
 607 +                       <&ant2>, "output-low?=off";
 608 +               noant = <&ant1>,"output-high?=off",
 609 +                       <&ant1>, "output-low?=on",
 610 +                       <&ant2>, "output-high?=off",
 611 +                       <&ant2>, "output-low?=on";
 612 +
 613 +               spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
 614 +                          <&spi0>, "dmas:8=", <&dma40>;
 615 +       };
 616 +};
 617 --- a/arch/arm/boot/dts/overlays/README
 618 +++ b/arch/arm/boot/dts/overlays/README
 619 @@ -92,6 +92,12 @@ Name:   <The base DTB>
 620  Info:   Configures the base Raspberry Pi hardware
 621  Load:   <loaded automatically>
 622  Params:
 623 +        ant1                    Select antenna 1 (default). CM4 only.
 624 +
 625 +        ant2                    Select antenna 2. CM4 only.
 626 +
 627 +        noant                   Disable both antennas. CM4 only.
 628 +
 629          audio                   Set to "on" to enable the onboard ALSA audio
 630                                  interface (default "off")
 631