9369658500462e16fd7ba4b9143d0d74b7d38a8e
[openwrt/staging/jow.git] / target / linux / bcm27xx / patches-5.10 / 950-0314-drm-vc4-add-iec958-controls-to-vc4_hdmi.patch
1 From 29e5bf9305e98a57a895d6806fafa6e67f257fd8 Mon Sep 17 00:00:00 2001
2 From: Matthias Reichl <hias@horus.com>
3 Date: Tue, 17 Mar 2020 12:12:22 +0100
4 Subject: [PATCH] drm/vc4: add iec958 controls to vc4_hdmi
5
6 Although vc4 get an IEC958 formatted stream passed in from userspace
7 the driver needs the info from the channel status bits to properly
8 set up the hardware, eg for HBR passthrough.
9
10 Add iec958 controls so the channel status bits can be passed in
11 from userspace.
12
13 Signed-off-by: Matthias Reichl <hias@horus.com>
14 ---
15 drivers/gpu/drm/vc4/vc4_hdmi.c | 60 ++++++++++++++++++++++++++++++++++
16 drivers/gpu/drm/vc4/vc4_hdmi.h | 2 ++
17 2 files changed, 62 insertions(+)
18
19 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
20 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
21 @@ -44,6 +44,7 @@
22 #include <linux/pm_runtime.h>
23 #include <linux/rational.h>
24 #include <linux/reset.h>
25 +#include <sound/asoundef.h>
26 #include <sound/dmaengine_pcm.h>
27 #include <sound/pcm_drm_eld.h>
28 #include <sound/pcm_params.h>
29 @@ -1179,6 +1180,47 @@ static int vc4_hdmi_audio_eld_ctl_get(st
30 return 0;
31 }
32
33 +static int vc4_spdif_info(struct snd_kcontrol *kcontrol,
34 + struct snd_ctl_elem_info *uinfo)
35 +{
36 + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
37 + uinfo->count = 1;
38 + return 0;
39 +}
40 +
41 +static int vc4_spdif_playback_get(struct snd_kcontrol *kcontrol,
42 + struct snd_ctl_elem_value *ucontrol)
43 +{
44 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
45 + struct vc4_hdmi *vc4_hdmi = snd_component_to_hdmi(component);
46 +
47 + memcpy(ucontrol->value.iec958.status, vc4_hdmi->audio.iec_status,
48 + sizeof(vc4_hdmi->audio.iec_status));
49 +
50 + return 0;
51 +}
52 +
53 +static int vc4_spdif_playback_put(struct snd_kcontrol *kcontrol,
54 + struct snd_ctl_elem_value *ucontrol)
55 +{
56 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
57 + struct vc4_hdmi *vc4_hdmi = snd_component_to_hdmi(component);
58 +
59 + memcpy(vc4_hdmi->audio.iec_status, ucontrol->value.iec958.status,
60 + sizeof(vc4_hdmi->audio.iec_status));
61 +
62 + return 0;
63 +}
64 +
65 +static int vc4_spdif_mask_get(struct snd_kcontrol *kcontrol,
66 + struct snd_ctl_elem_value *ucontrol)
67 +{
68 + memset(ucontrol->value.iec958.status, 0xff,
69 + sizeof_field(struct vc4_hdmi_audio, iec_status));
70 +
71 + return 0;
72 +}
73 +
74 static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = {
75 {
76 .access = SNDRV_CTL_ELEM_ACCESS_READ |
77 @@ -1188,6 +1230,19 @@ static const struct snd_kcontrol_new vc4
78 .info = vc4_hdmi_audio_eld_ctl_info,
79 .get = vc4_hdmi_audio_eld_ctl_get,
80 },
81 + {
82 + .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
83 + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
84 + .info = vc4_spdif_info,
85 + .get = vc4_spdif_playback_get,
86 + .put = vc4_spdif_playback_put,
87 + },
88 + {
89 + .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
90 + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
91 + .info = vc4_spdif_info,
92 + .get = vc4_spdif_mask_get,
93 + },
94 };
95
96 static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = {
97 @@ -1308,6 +1363,11 @@ static int vc4_hdmi_audio_init(struct vc
98 vc4_hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
99 vc4_hdmi->audio.dma_data.maxburst = 2;
100
101 + vc4_hdmi->audio.iec_status[0] = IEC958_AES0_CON_NOT_COPYRIGHT;
102 + vc4_hdmi->audio.iec_status[1] =
103 + IEC958_AES1_CON_ORIGINAL | IEC958_AES1_CON_PCM_CODER;
104 + vc4_hdmi->audio.iec_status[3] = IEC958_AES3_CON_FS_48000;
105 +
106 ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0);
107 if (ret) {
108 dev_err(dev, "Could not register PCM component: %d\n", ret);
109 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
110 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
111 @@ -107,6 +107,8 @@ struct vc4_hdmi_audio {
112 struct snd_pcm_substream *substream;
113
114 bool streaming;
115 +
116 + unsigned char iec_status[4];
117 };
118
119 /* General HDMI hardware state. */