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AVR32: sync with latest Atmel source (closes #3371)
[openwrt/openwrt.git] / target / linux / avr32 / patches / 100-git_sync.patch
1 diff -urN linux-2.6.24.3/arch/arm/mach-at91/at91sam9261_devices.c avr32-2.6/arch/arm/mach-at91/at91sam9261_devices.c
2 --- linux-2.6.24.3/arch/arm/mach-at91/at91sam9261_devices.c 2008-02-26 01:20:20.000000000 +0100
3 +++ avr32-2.6/arch/arm/mach-at91/at91sam9261_devices.c 2008-04-23 20:12:35.000000000 +0200
4 @@ -530,6 +530,20 @@
5 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
6 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
7
8 +#ifdef CONFIG_FB_INTSRAM
9 + {
10 + void __iomem *fb;
11 + struct resource *fb_res = &lcdc_resources[2];
12 + size_t fb_len = fb_res->end - fb_res->start + 1;
13 +
14 + fb = ioremap_writecombine(fb_res->start, fb_len);
15 + if (fb) {
16 + memset(fb, 0, fb_len);
17 + iounmap(fb, fb_len);
18 + }
19 + }
20 +#endif
21 +
22 lcdc_data = *data;
23 platform_device_register(&at91_lcdc_device);
24 }
25 diff -urN linux-2.6.24.3/arch/arm/mach-at91/at91sam9rl_devices.c avr32-2.6/arch/arm/mach-at91/at91sam9rl_devices.c
26 --- linux-2.6.24.3/arch/arm/mach-at91/at91sam9rl_devices.c 2008-02-26 01:20:20.000000000 +0100
27 +++ avr32-2.6/arch/arm/mach-at91/at91sam9rl_devices.c 2008-04-23 20:12:35.000000000 +0200
28 @@ -375,6 +375,20 @@
29 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
30 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
31
32 +#ifdef CONFIG_FB_INTSRAM
33 + {
34 + void __iomem *fb;
35 + struct resource *fb_res = &lcdc_resources[2];
36 + size_t fb_len = fb_res->end - fb_res->start + 1;
37 +
38 + fb = ioremap_writecombine(fb_res->start, fb_len);
39 + if (fb) {
40 + memset(fb, 0, fb_len);
41 + iounmap(fb, fb_len);
42 + }
43 + }
44 +#endif
45 +
46 lcdc_data = *data;
47 platform_device_register(&at91_lcdc_device);
48 }
49 diff -urN linux-2.6.24.3/arch/arm/mach-at91/board-sam9261ek.c avr32-2.6/arch/arm/mach-at91/board-sam9261ek.c
50 --- linux-2.6.24.3/arch/arm/mach-at91/board-sam9261ek.c 2008-02-26 01:20:20.000000000 +0100
51 +++ avr32-2.6/arch/arm/mach-at91/board-sam9261ek.c 2008-04-23 20:12:35.000000000 +0200
52 @@ -322,6 +322,7 @@
53
54 /* Driver datas */
55 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
56 + .lcdcon_is_backlight = true,
57 .default_bpp = 16,
58 .default_dmacon = ATMEL_LCDC_DMAEN,
59 .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
60 diff -urN linux-2.6.24.3/arch/arm/mach-at91/board-sam9263ek.c avr32-2.6/arch/arm/mach-at91/board-sam9263ek.c
61 --- linux-2.6.24.3/arch/arm/mach-at91/board-sam9263ek.c 2008-02-26 01:20:20.000000000 +0100
62 +++ avr32-2.6/arch/arm/mach-at91/board-sam9263ek.c 2008-04-23 20:12:35.000000000 +0200
63 @@ -250,6 +250,7 @@
64
65 /* Driver datas */
66 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
67 + .lcdcon_is_backlight = true,
68 .default_bpp = 16,
69 .default_dmacon = ATMEL_LCDC_DMAEN,
70 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
71 diff -urN linux-2.6.24.3/arch/arm/mach-at91/Kconfig avr32-2.6/arch/arm/mach-at91/Kconfig
72 --- linux-2.6.24.3/arch/arm/mach-at91/Kconfig 2008-02-26 01:20:20.000000000 +0100
73 +++ avr32-2.6/arch/arm/mach-at91/Kconfig 2008-04-23 20:12:35.000000000 +0200
74 @@ -219,6 +219,36 @@
75 Select this if you need to program one or more of the PCK0..PCK3
76 programmable clock outputs.
77
78 +choice
79 + prompt "Select a UART for early kernel messages"
80 +
81 +config AT91_EARLY_DBGU
82 + bool "DBGU"
83 +
84 +config AT91_EARLY_USART0
85 + bool "USART0"
86 +
87 +config AT91_EARLY_USART1
88 + bool "USART1"
89 +
90 +config AT91_EARLY_USART2
91 + bool "USART2"
92 + depends on ! ARCH_AT91X40
93 +
94 +config AT91_EARLY_USART3
95 + bool "USART3"
96 + depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260)
97 +
98 +config AT91_EARLY_USART4
99 + bool "USART4"
100 + depends on ARCH_AT91SAM9260
101 +
102 +config AT91_EARLY_USART5
103 + bool "USART5"
104 + depends on ARCH_AT91SAM9260
105 +
106 +endchoice
107 +
108 endmenu
109
110 endif
111 diff -urN linux-2.6.24.3/arch/avr32/boards/atngw100/Kconfig avr32-2.6/arch/avr32/boards/atngw100/Kconfig
112 --- linux-2.6.24.3/arch/avr32/boards/atngw100/Kconfig 1970-01-01 01:00:00.000000000 +0100
113 +++ avr32-2.6/arch/avr32/boards/atngw100/Kconfig 2008-04-23 19:33:28.000000000 +0200
114 @@ -0,0 +1,12 @@
115 +# NGW100 customization
116 +
117 +config BOARD_ATNGW100_I2C_GPIO
118 + bool "Use GPIO for i2c instead of built-in TWI module"
119 + help
120 + The driver for the built-in TWI module has been plagued by
121 + various problems, while the i2c-gpio driver is based on the
122 + trusty old i2c-algo-bit bitbanging engine, making it work
123 + on pretty much any setup.
124 +
125 + Choose 'Y' here if you're having i2c-related problems and
126 + want to rule out the i2c bus driver.
127 diff -urN linux-2.6.24.3/arch/avr32/boards/atngw100/setup.c avr32-2.6/arch/avr32/boards/atngw100/setup.c
128 --- linux-2.6.24.3/arch/avr32/boards/atngw100/setup.c 2008-02-26 01:20:20.000000000 +0100
129 +++ avr32-2.6/arch/avr32/boards/atngw100/setup.c 2008-04-23 20:12:35.000000000 +0200
130 @@ -20,7 +20,7 @@
131 #include <asm/io.h>
132 #include <asm/setup.h>
133
134 -#include <asm/arch/at32ap7000.h>
135 +#include <asm/arch/at32ap700x.h>
136 #include <asm/arch/board.h>
137 #include <asm/arch/init.h>
138 #include <asm/arch/portmux.h>
139 @@ -37,11 +37,16 @@
140 static struct spi_board_info spi0_board_info[] __initdata = {
141 {
142 .modalias = "mtd_dataflash",
143 - .max_speed_hz = 10000000,
144 + .max_speed_hz = 8000000,
145 .chip_select = 0,
146 },
147 };
148
149 +static struct mci_platform_data __initdata mci0_data = {
150 + .detect_pin = GPIO_PIN_PC(25),
151 + .wp_pin = GPIO_PIN_PE(0),
152 +};
153 +
154 /*
155 * The next two functions should go away as the boot loader is
156 * supposed to initialize the macb address registers with a valid
157 @@ -124,6 +129,7 @@
158 }
159 };
160
161 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
162 static struct i2c_gpio_platform_data i2c_gpio_data = {
163 .sda_pin = GPIO_PIN_PA(6),
164 .scl_pin = GPIO_PIN_PA(7),
165 @@ -139,6 +145,7 @@
166 .platform_data = &i2c_gpio_data,
167 },
168 };
169 +#endif
170
171 static int __init atngw100_init(void)
172 {
173 @@ -157,6 +164,7 @@
174 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
175
176 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
177 + at32_add_device_mci(0, &mci0_data);
178 at32_add_device_usba(0, NULL);
179
180 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
181 @@ -165,11 +173,15 @@
182 }
183 platform_device_register(&ngw_gpio_leds);
184
185 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
186 at32_select_gpio(i2c_gpio_data.sda_pin,
187 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
188 at32_select_gpio(i2c_gpio_data.scl_pin,
189 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
190 platform_device_register(&i2c_gpio_device);
191 +#else
192 + at32_add_device_twi(0, NULL, 0);
193 +#endif
194
195 return 0;
196 }
197 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1000.h avr32-2.6/arch/avr32/boards/atstk1000/atstk1000.h
198 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1000.h 2008-02-26 01:20:20.000000000 +0100
199 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1000.h 2008-04-23 19:33:28.000000000 +0200
200 @@ -12,4 +12,6 @@
201
202 extern struct atmel_lcdfb_info atstk1000_lcdc_data;
203
204 +void atstk1000_setup_j2_leds(void);
205 +
206 #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
207 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1002.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1002.c
208 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1002.c 2008-02-26 01:20:20.000000000 +0100
209 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1002.c 2008-04-23 20:12:35.000000000 +0200
210 @@ -11,7 +11,6 @@
211 #include <linux/etherdevice.h>
212 #include <linux/init.h>
213 #include <linux/kernel.h>
214 -#include <linux/leds.h>
215 #include <linux/platform_device.h>
216 #include <linux/string.h>
217 #include <linux/types.h>
218 @@ -22,7 +21,7 @@
219
220 #include <asm/io.h>
221 #include <asm/setup.h>
222 -#include <asm/arch/at32ap7000.h>
223 +#include <asm/arch/at32ap700x.h>
224 #include <asm/arch/board.h>
225 #include <asm/arch/init.h>
226 #include <asm/arch/portmux.h>
227 @@ -49,18 +48,16 @@
228 },
229 };
230
231 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
232 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
233 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
234 static struct at73c213_board_info at73c213_data = {
235 .ssc_id = 0,
236 .shortname = "AVR32 STK1000 external DAC",
237 };
238 #endif
239 -#endif
240
241 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
242 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
243 static struct spi_board_info spi0_board_info[] __initdata = {
244 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
245 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
246 {
247 /* AT73C213 */
248 .modalias = "at73c213",
249 @@ -80,12 +77,25 @@
250 };
251 #endif
252
253 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
254 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
255 static struct spi_board_info spi1_board_info[] __initdata = { {
256 /* patch in custom entries here */
257 } };
258 #endif
259
260 +static struct cf_platform_data __initdata cf0_data = {
261 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
262 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
263 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
264 +#else
265 + .detect_pin = GPIO_PIN_NONE,
266 + .reset_pin = GPIO_PIN_NONE,
267 +#endif
268 + .vcc_pin = GPIO_PIN_NONE,
269 + .ready_pin = GPIO_PIN_PB(27),
270 + .cs = 4,
271 +};
272 +
273 /*
274 * The next two functions should go away as the boot loader is
275 * supposed to initialize the macb address registers with a valid
276 @@ -141,68 +151,8 @@
277 clk_put(pclk);
278 }
279
280 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
281 -
282 -static struct gpio_led stk_j2_led[] = {
283 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
284 -#define LEDSTRING "J2 jumpered to LED8"
285 - { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
286 - { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
287 - { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
288 - { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
289 - { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
290 - { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
291 - { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
292 - { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
293 - .default_trigger = "heartbeat", },
294 -#else /* RGB */
295 -#define LEDSTRING "J2 jumpered to RGB LEDs"
296 - { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
297 - { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
298 - { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
299 -
300 - { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
301 - .default_trigger = "heartbeat", },
302 - { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
303 - { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
304 - .default_trigger = "heartbeat", },
305 - /* PB16, PB30 unused */
306 -#endif
307 -};
308 -
309 -static struct gpio_led_platform_data stk_j2_led_data = {
310 - .num_leds = ARRAY_SIZE(stk_j2_led),
311 - .leds = stk_j2_led,
312 -};
313 -
314 -static struct platform_device stk_j2_led_dev = {
315 - .name = "leds-gpio",
316 - .id = 2, /* gpio block J2 */
317 - .dev = {
318 - .platform_data = &stk_j2_led_data,
319 - },
320 -};
321 -
322 -static void setup_j2_leds(void)
323 -{
324 - unsigned i;
325 -
326 - for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
327 - at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
328 -
329 - printk("STK1002: " LEDSTRING "\n");
330 - platform_device_register(&stk_j2_led_dev);
331 -}
332 -
333 -#else
334 -static void setup_j2_leds(void)
335 -{
336 -}
337 -#endif
338 -
339 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
340 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
341 -static void __init at73c213_set_clk(struct at73c213_board_info *info)
342 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
343 +static void __init atstk1002_setup_extdac(void)
344 {
345 struct clk *gclk;
346 struct clk *pll;
347 @@ -220,7 +170,7 @@
348 }
349
350 at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
351 - info->dac_clk = gclk;
352 + at73c213_data.dac_clk = gclk;
353
354 err_set_clk:
355 clk_put(pll);
356 @@ -229,12 +179,16 @@
357 err_gclk:
358 return;
359 }
360 -#endif
361 -#endif
362 +#else
363 +static void __init atstk1002_setup_extdac(void)
364 +{
365 +
366 +}
367 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
368
369 void __init setup_board(void)
370 {
371 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
372 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
373 at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
374 #else
375 at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
376 @@ -271,7 +225,7 @@
377
378 at32_add_system_devices();
379
380 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
381 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
382 at32_add_device_usart(1);
383 #else
384 at32_add_device_usart(0);
385 @@ -281,12 +235,16 @@
386 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
387 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
388 #endif
389 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
390 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
391 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
392 #endif
393 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
394 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
395 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
396 #endif
397 + at32_add_device_twi(0, NULL, 0);
398 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
399 + at32_add_device_mci(0, NULL);
400 +#endif
401 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
402 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
403 #else
404 @@ -294,18 +252,23 @@
405 fbmem_start, fbmem_size);
406 #endif
407 at32_add_device_usba(0, NULL);
408 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
409 - at32_add_device_ssc(0, ATMEL_SSC_TX);
410 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
411 + at32_add_device_ac97c(0);
412 +#else
413 + at32_add_device_abdac(0);
414 #endif
415 -
416 - setup_j2_leds();
417 -
418 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
419 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
420 - at73c213_set_clk(&at73c213_data);
421 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
422 + at32_add_device_ssc(0, ATMEL_SSC_TX);
423 #endif
424 + at32_add_device_cf(0, 2, &cf0_data);
425 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
426 + at32_add_device_psif(0);
427 + at32_add_device_psif(1);
428 #endif
429
430 + atstk1000_setup_j2_leds();
431 + atstk1002_setup_extdac();
432 +
433 return 0;
434 }
435 postcore_initcall(atstk1002_init);
436 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1003.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1003.c
437 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1003.c 1970-01-01 01:00:00.000000000 +0100
438 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1003.c 2008-04-23 20:12:35.000000000 +0200
439 @@ -0,0 +1,185 @@
440 +/*
441 + * ATSTK1003 daughterboard-specific init code
442 + *
443 + * Copyright (C) 2007 Atmel Corporation
444 + *
445 + * This program is free software; you can redistribute it and/or modify
446 + * it under the terms of the GNU General Public License version 2 as
447 + * published by the Free Software Foundation.
448 + */
449 +#include <linux/clk.h>
450 +#include <linux/err.h>
451 +#include <linux/init.h>
452 +#include <linux/kernel.h>
453 +#include <linux/platform_device.h>
454 +#include <linux/string.h>
455 +#include <linux/types.h>
456 +
457 +#include <linux/spi/at73c213.h>
458 +#include <linux/spi/spi.h>
459 +
460 +#include <asm/setup.h>
461 +
462 +#include <asm/arch/at32ap700x.h>
463 +#include <asm/arch/board.h>
464 +#include <asm/arch/init.h>
465 +#include <asm/arch/portmux.h>
466 +
467 +#include "atstk1000.h"
468 +
469 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
470 +static struct at73c213_board_info at73c213_data = {
471 + .ssc_id = 0,
472 + .shortname = "AVR32 STK1000 external DAC",
473 +};
474 +#endif
475 +
476 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
477 +static struct spi_board_info spi0_board_info[] __initdata = {
478 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
479 + {
480 + /* AT73C213 */
481 + .modalias = "at73c213",
482 + .max_speed_hz = 200000,
483 + .chip_select = 0,
484 + .mode = SPI_MODE_1,
485 + .platform_data = &at73c213_data,
486 + },
487 +#endif
488 + /*
489 + * We can control the LTV350QV LCD panel, but it isn't much
490 + * point since we don't have an LCD controller...
491 + */
492 +};
493 +#endif
494 +
495 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
496 +static struct spi_board_info spi1_board_info[] __initdata = { {
497 + /* patch in custom entries here */
498 +} };
499 +#endif
500 +
501 +static struct cf_platform_data __initdata cf0_data = {
502 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
503 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
504 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
505 +#else
506 + .detect_pin = GPIO_PIN_NONE,
507 + .reset_pin = GPIO_PIN_NONE,
508 +#endif
509 + .vcc_pin = GPIO_PIN_NONE,
510 + .ready_pin = GPIO_PIN_PB(27),
511 + .cs = 4,
512 +};
513 +
514 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
515 +static void __init atstk1003_setup_extdac(void)
516 +{
517 + struct clk *gclk;
518 + struct clk *pll;
519 +
520 + gclk = clk_get(NULL, "gclk0");
521 + if (IS_ERR(gclk))
522 + goto err_gclk;
523 + pll = clk_get(NULL, "pll0");
524 + if (IS_ERR(pll))
525 + goto err_pll;
526 +
527 + if (clk_set_parent(gclk, pll)) {
528 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
529 + goto err_set_clk;
530 + }
531 +
532 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
533 + at73c213_data.dac_clk = gclk;
534 +
535 +err_set_clk:
536 + clk_put(pll);
537 +err_pll:
538 + clk_put(gclk);
539 +err_gclk:
540 + return;
541 +}
542 +#else
543 +static void __init atstk1003_setup_extdac(void)
544 +{
545 +
546 +}
547 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
548 +
549 +void __init setup_board(void)
550 +{
551 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
552 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
553 +#else
554 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
555 +#endif
556 + /* USART 2/unused: expansion connector */
557 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
558 +
559 + at32_setup_serial_console(0);
560 +}
561 +
562 +static int __init atstk1003_init(void)
563 +{
564 + /*
565 + * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
566 + * SDRAM-specific pins so that nobody messes with them.
567 + */
568 + at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
569 + at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
570 + at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
571 + at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
572 + at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
573 + at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
574 + at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
575 + at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
576 + at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
577 + at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
578 + at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
579 + at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
580 + at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
581 + at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
582 + at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
583 + at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
584 + at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
585 +
586 + at32_add_system_devices();
587 +
588 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
589 + at32_add_device_usart(1);
590 +#else
591 + at32_add_device_usart(0);
592 +#endif
593 + at32_add_device_usart(2);
594 +
595 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
596 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
597 +#endif
598 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
599 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
600 +#endif
601 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
602 + at32_add_device_mci(0, NULL);
603 +#endif
604 + at32_add_device_usba(0, NULL);
605 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
606 + at32_add_device_ac97c(0);
607 +#else
608 + at32_add_device_abdac(0);
609 +#endif
610 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
611 + at32_add_device_ssc(0, ATMEL_SSC_TX);
612 +#endif
613 + at32_add_device_cf(0, 2, &cf0_data);
614 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
615 + at32_add_device_psif(0);
616 + at32_add_device_psif(1);
617 +#endif
618 +
619 + atstk1000_setup_j2_leds();
620 + atstk1003_setup_extdac();
621 +
622 + return 0;
623 +}
624 +postcore_initcall(atstk1003_init);
625 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1004.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1004.c
626 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1004.c 1970-01-01 01:00:00.000000000 +0100
627 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1004.c 2008-04-23 20:12:35.000000000 +0200
628 @@ -0,0 +1,156 @@
629 +/*
630 + * ATSTK1003 daughterboard-specific init code
631 + *
632 + * Copyright (C) 2007 Atmel Corporation
633 + *
634 + * This program is free software; you can redistribute it and/or modify
635 + * it under the terms of the GNU General Public License version 2 as
636 + * published by the Free Software Foundation.
637 + */
638 +#include <linux/clk.h>
639 +#include <linux/err.h>
640 +#include <linux/init.h>
641 +#include <linux/kernel.h>
642 +#include <linux/platform_device.h>
643 +#include <linux/string.h>
644 +#include <linux/types.h>
645 +
646 +#include <linux/spi/at73c213.h>
647 +#include <linux/spi/spi.h>
648 +
649 +#include <video/atmel_lcdc.h>
650 +
651 +#include <asm/setup.h>
652 +
653 +#include <asm/arch/at32ap700x.h>
654 +#include <asm/arch/board.h>
655 +#include <asm/arch/init.h>
656 +#include <asm/arch/portmux.h>
657 +
658 +#include "atstk1000.h"
659 +
660 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
661 +static struct at73c213_board_info at73c213_data = {
662 + .ssc_id = 0,
663 + .shortname = "AVR32 STK1000 external DAC",
664 +};
665 +#endif
666 +
667 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
668 +static struct spi_board_info spi0_board_info[] __initdata = {
669 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
670 + {
671 + /* AT73C213 */
672 + .modalias = "at73c213",
673 + .max_speed_hz = 200000,
674 + .chip_select = 0,
675 + .mode = SPI_MODE_1,
676 + .platform_data = &at73c213_data,
677 + },
678 +#endif
679 + {
680 + /* QVGA display */
681 + .modalias = "ltv350qv",
682 + .max_speed_hz = 16000000,
683 + .chip_select = 1,
684 + .mode = SPI_MODE_3,
685 + },
686 +};
687 +#endif
688 +
689 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
690 +static struct spi_board_info spi1_board_info[] __initdata = { {
691 + /* patch in custom entries here */
692 +} };
693 +#endif
694 +
695 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
696 +static void __init atstk1004_setup_extdac(void)
697 +{
698 + struct clk *gclk;
699 + struct clk *pll;
700 +
701 + gclk = clk_get(NULL, "gclk0");
702 + if (IS_ERR(gclk))
703 + goto err_gclk;
704 + pll = clk_get(NULL, "pll0");
705 + if (IS_ERR(pll))
706 + goto err_pll;
707 +
708 + if (clk_set_parent(gclk, pll)) {
709 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
710 + goto err_set_clk;
711 + }
712 +
713 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
714 + at73c213_data.dac_clk = gclk;
715 +
716 +err_set_clk:
717 + clk_put(pll);
718 +err_pll:
719 + clk_put(gclk);
720 +err_gclk:
721 + return;
722 +}
723 +#else
724 +static void __init atstk1004_setup_extdac(void)
725 +{
726 +
727 +}
728 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
729 +
730 +void __init setup_board(void)
731 +{
732 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
733 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
734 +#else
735 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
736 +#endif
737 + /* USART 2/unused: expansion connector */
738 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
739 +
740 + at32_setup_serial_console(0);
741 +}
742 +
743 +static int __init atstk1004_init(void)
744 +{
745 + at32_add_system_devices();
746 +
747 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
748 + at32_add_device_usart(1);
749 +#else
750 + at32_add_device_usart(0);
751 +#endif
752 + at32_add_device_usart(2);
753 +
754 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
755 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
756 +#endif
757 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
758 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
759 +#endif
760 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
761 + at32_add_device_mci(0, NULL);
762 +#endif
763 + at32_add_device_lcdc(0, &atstk1000_lcdc_data,
764 + fbmem_start, fbmem_size);
765 + at32_add_device_usba(0, NULL);
766 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
767 + at32_add_device_ac97c(0);
768 +#else
769 + at32_add_device_abdac(0);
770 +#endif
771 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
772 + at32_add_device_ssc(0, ATMEL_SSC_TX);
773 +#endif
774 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
775 + at32_add_device_psif(0);
776 + at32_add_device_psif(1);
777 +#endif
778 +
779 + atstk1000_setup_j2_leds();
780 + atstk1004_setup_extdac();
781 +
782 + return 0;
783 +}
784 +postcore_initcall(atstk1004_init);
785 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/Kconfig avr32-2.6/arch/avr32/boards/atstk1000/Kconfig
786 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/Kconfig 2008-02-26 01:20:20.000000000 +0100
787 +++ avr32-2.6/arch/avr32/boards/atstk1000/Kconfig 2008-04-23 20:12:35.000000000 +0200
788 @@ -1,34 +1,53 @@
789 # STK1000 customization
790
791 -if BOARD_ATSTK1002
792 +if BOARD_ATSTK1000
793
794 -config BOARD_ATSTK1002_CUSTOM
795 - bool "Non-default STK-1002 jumper settings"
796 +choice
797 + prompt "ATSTK1000 CPU daughterboard type"
798 + default BOARD_ATSTK1002
799 +
800 +config BOARD_ATSTK1002
801 + bool "ATSTK1002"
802 + select CPU_AT32AP7000
803 +
804 +config BOARD_ATSTK1003
805 + bool "ATSTK1003"
806 + select CPU_AT32AP7001
807 +
808 +config BOARD_ATSTK1004
809 + bool "ATSTK1004"
810 + select CPU_AT32AP7002
811 +
812 +endchoice
813 +
814 +
815 +config BOARD_ATSTK100X_CUSTOM
816 + bool "Non-default STK1002/STK1003/STK1004 jumper settings"
817 help
818 You will normally leave the jumpers on the CPU card at their
819 default settings. If you need to use certain peripherals,
820 you will need to change some of those jumpers.
821
822 -if BOARD_ATSTK1002_CUSTOM
823 +if BOARD_ATSTK100X_CUSTOM
824
825 -config BOARD_ATSTK1002_SW1_CUSTOM
826 +config BOARD_ATSTK100X_SW1_CUSTOM
827 bool "SW1: use SSC1 (not SPI0)"
828 help
829 This also prevents using the external DAC as an audio interface,
830 and means you can't initialize the on-board QVGA display.
831
832 -config BOARD_ATSTK1002_SW2_CUSTOM
833 +config BOARD_ATSTK100X_SW2_CUSTOM
834 bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
835 help
836 If you change this you'll want an updated boot loader putting
837 the console on UART-C not UART-A.
838
839 -config BOARD_ATSTK1002_SW3_CUSTOM
840 +config BOARD_ATSTK100X_SW3_CUSTOM
841 bool "SW3: use TIMER1 (not SSC0 and GCLK)"
842 help
843 This also prevents using the external DAC as an audio interface.
844
845 -config BOARD_ATSTK1002_SW4_CUSTOM
846 +config BOARD_ATSTK100X_SW4_CUSTOM
847 bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
848 help
849 To use the camera interface you'll need a custom card (on the
850 @@ -36,27 +55,29 @@
851
852 config BOARD_ATSTK1002_SW5_CUSTOM
853 bool "SW5: use MACB1 (not LCDC)"
854 + depends on BOARD_ATSTK1002
855
856 config BOARD_ATSTK1002_SW6_CUSTOM
857 bool "SW6: more GPIOs (not MACB0)"
858 + depends on BOARD_ATSTK1002
859
860 endif # custom
861
862 -config BOARD_ATSTK1002_SPI1
863 +config BOARD_ATSTK100X_SPI1
864 bool "Configure SPI1 controller"
865 - depends on !BOARD_ATSTK1002_SW4_CUSTOM
866 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
867 help
868 All the signals for the second SPI controller are available on
869 GPIO lines and accessed through the J1 jumper block. Say "y"
870 here to configure that SPI controller.
871
872 -config BOARD_ATSTK1002_J2_LED
873 +config BOARD_ATSTK1000_J2_LED
874 bool
875 - default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
876 + default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
877
878 choice
879 prompt "LEDs connected to J2:"
880 - depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
881 + depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
882 optional
883 help
884 Select this if you have jumpered the J2 jumper block to the
885 @@ -64,16 +85,77 @@
886 IDC cable. A default "heartbeat" trigger is provided, but
887 you can of course override this.
888
889 -config BOARD_ATSTK1002_J2_LED8
890 +config BOARD_ATSTK1000_J2_LED8
891 bool "LED0..LED7"
892 help
893 Select this if J2 is jumpered to LED0..LED7 amber leds.
894
895 -config BOARD_ATSTK1002_J2_RGB
896 +config BOARD_ATSTK1000_J2_RGB
897 bool "RGB leds"
898 help
899 Select this if J2 is jumpered to the RGB leds.
900
901 endchoice
902
903 -endif # stk 1002
904 +config BOARD_ATSTK1000_EXTDAC
905 + bool
906 + depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
907 + default y
908 +
909 +config BOARD_ATSTK100X_ENABLE_AC97
910 + bool "Use AC97C instead of ABDAC"
911 + help
912 + Select this if you want to use the built-in AC97 controller
913 + instead of the built-in Audio Bitstream DAC. These share
914 + the same I/O pins on the AP7000, so both can't be enabled
915 + at the same time.
916 +
917 + Note that the STK1000 kit doesn't ship with an AC97 codec on
918 + board, so say N unless you've got an expansion board with an
919 + AC97 codec on it that you want to use.
920 +
921 +config BOARD_ATSTK1000_CF_HACKS
922 + bool "ATSTK1000 CompactFlash hacks"
923 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
924 + help
925 + Select this if you have re-routed the CompactFlash RESET and
926 + CD signals to GPIOs on your STK1000. This is necessary for
927 + reset and card detection to work properly, although some CF
928 + cards may be able to cope without reset.
929 +
930 +config BOARD_ATSTK1000_CF_RESET_PIN
931 + hex "CompactFlash RESET pin"
932 + default 0x30
933 + depends on BOARD_ATSTK1000_CF_HACKS
934 + help
935 + Select which GPIO pin to use for the CompactFlash RESET
936 + signal. This is specified as a hexadecimal number and should
937 + be defined as 0x20 * gpio_port + pin.
938 +
939 + The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
940 +
941 +config BOARD_ATSTK1000_CF_DETECT_PIN
942 + hex "CompactFlash DETECT pin"
943 + default 0x3e
944 + depends on BOARD_ATSTK1000_CF_HACKS
945 + help
946 + Select which GPIO pin to use for the CompactFlash CD
947 + signal. This is specified as a hexadecimal number and should
948 + be defined as 0x20 * gpio_port + pin.
949 +
950 + The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
951 +
952 +config BOARD_ATSTK100X_ENABLE_PSIF
953 + bool "Enable PSIF peripheral (PS/2 support)"
954 + default n
955 + help
956 + Select this if you want to use the PSIF peripheral to hook up PS/2
957 + devices to your STK1000. This will require a hardware modification to
958 + work correctly, since PS/2 devices require 5 volt power and signals,
959 + while the STK1000 only provides 3.3 volt.
960 +
961 + Say N if you have not modified the hardware to boost the voltage, say
962 + Y if you have level convertion hardware or a PS/2 device capable of
963 + operating on 3.3 volt.
964 +
965 +endif # stk 1000
966 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/Makefile avr32-2.6/arch/avr32/boards/atstk1000/Makefile
967 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/Makefile 2008-02-26 01:20:20.000000000 +0100
968 +++ avr32-2.6/arch/avr32/boards/atstk1000/Makefile 2008-04-23 19:33:28.000000000 +0200
969 @@ -1,2 +1,4 @@
970 obj-y += setup.o flash.o
971 obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
972 +obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
973 +obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
974 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/setup.c avr32-2.6/arch/avr32/boards/atstk1000/setup.c
975 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/setup.c 2008-02-26 01:20:20.000000000 +0100
976 +++ avr32-2.6/arch/avr32/boards/atstk1000/setup.c 2008-04-23 19:33:28.000000000 +0200
977 @@ -10,13 +10,17 @@
978 #include <linux/bootmem.h>
979 #include <linux/fb.h>
980 #include <linux/init.h>
981 +#include <linux/platform_device.h>
982 #include <linux/types.h>
983 #include <linux/linkage.h>
984
985 #include <video/atmel_lcdc.h>
986
987 #include <asm/setup.h>
988 +
989 +#include <asm/arch/at32ap700x.h>
990 #include <asm/arch/board.h>
991 +#include <asm/arch/portmux.h>
992
993 #include "atstk1000.h"
994
995 @@ -61,3 +65,63 @@
996 .default_monspecs = &atstk1000_default_monspecs,
997 .guard_time = 2,
998 };
999 +
1000 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
1001 +#include <linux/leds.h>
1002 +
1003 +static struct gpio_led stk1000_j2_led[] = {
1004 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
1005 +#define LEDSTRING "J2 jumpered to LED8"
1006 + { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
1007 + { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
1008 + { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
1009 + { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
1010 + { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
1011 + { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
1012 + { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
1013 + { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
1014 + .default_trigger = "heartbeat", },
1015 +#else /* RGB */
1016 +#define LEDSTRING "J2 jumpered to RGB LEDs"
1017 + { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
1018 + { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
1019 + { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
1020 +
1021 + { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
1022 + .default_trigger = "heartbeat", },
1023 + { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
1024 + { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
1025 + .default_trigger = "heartbeat", },
1026 + /* PB16, PB30 unused */
1027 +#endif
1028 +};
1029 +
1030 +static struct gpio_led_platform_data stk1000_j2_led_data = {
1031 + .num_leds = ARRAY_SIZE(stk1000_j2_led),
1032 + .leds = stk1000_j2_led,
1033 +};
1034 +
1035 +static struct platform_device stk1000_j2_led_dev = {
1036 + .name = "leds-gpio",
1037 + .id = 2, /* gpio block J2 */
1038 + .dev = {
1039 + .platform_data = &stk1000_j2_led_data,
1040 + },
1041 +};
1042 +
1043 +void __init atstk1000_setup_j2_leds(void)
1044 +{
1045 + unsigned i;
1046 +
1047 + for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
1048 + at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
1049 +
1050 + printk("STK1000: " LEDSTRING "\n");
1051 + platform_device_register(&stk1000_j2_led_dev);
1052 +}
1053 +#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
1054 +void __init atstk1000_setup_j2_leds(void)
1055 +{
1056 +
1057 +}
1058 +#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
1059 diff -urN linux-2.6.24.3/arch/avr32/configs/atngw100_defconfig avr32-2.6/arch/avr32/configs/atngw100_defconfig
1060 --- linux-2.6.24.3/arch/avr32/configs/atngw100_defconfig 2008-02-26 01:20:20.000000000 +0100
1061 +++ avr32-2.6/arch/avr32/configs/atngw100_defconfig 2008-04-23 20:12:35.000000000 +0200
1062 @@ -1,46 +1,52 @@
1063 #
1064 # Automatically generated make config: don't edit
1065 -# Linux kernel version: 2.6.22-rc5
1066 -# Sat Jun 23 15:40:05 2007
1067 +# Linux kernel version: 2.6.24
1068 +# Thu Mar 6 12:49:54 2008
1069 #
1070 CONFIG_AVR32=y
1071 CONFIG_GENERIC_GPIO=y
1072 CONFIG_GENERIC_HARDIRQS=y
1073 +CONFIG_STACKTRACE_SUPPORT=y
1074 +CONFIG_LOCKDEP_SUPPORT=y
1075 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1076 CONFIG_HARDIRQS_SW_RESEND=y
1077 CONFIG_GENERIC_IRQ_PROBE=y
1078 CONFIG_RWSEM_GENERIC_SPINLOCK=y
1079 CONFIG_GENERIC_TIME=y
1080 +CONFIG_GENERIC_CLOCKEVENTS=y
1081 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
1082 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
1083 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
1084 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
1085 CONFIG_GENERIC_HWEIGHT=y
1086 CONFIG_GENERIC_CALIBRATE_DELAY=y
1087 CONFIG_GENERIC_BUG=y
1088 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1089
1090 #
1091 -# Code maturity level options
1092 +# General setup
1093 #
1094 CONFIG_EXPERIMENTAL=y
1095 CONFIG_BROKEN_ON_SMP=y
1096 CONFIG_INIT_ENV_ARG_LIMIT=32
1097 -
1098 -#
1099 -# General setup
1100 -#
1101 CONFIG_LOCALVERSION=""
1102 # CONFIG_LOCALVERSION_AUTO is not set
1103 CONFIG_SWAP=y
1104 CONFIG_SYSVIPC=y
1105 -# CONFIG_IPC_NS is not set
1106 CONFIG_SYSVIPC_SYSCTL=y
1107 CONFIG_POSIX_MQUEUE=y
1108 CONFIG_BSD_PROCESS_ACCT=y
1109 CONFIG_BSD_PROCESS_ACCT_V3=y
1110 # CONFIG_TASKSTATS is not set
1111 -# CONFIG_UTS_NS is not set
1112 +# CONFIG_USER_NS is not set
1113 +# CONFIG_PID_NS is not set
1114 # CONFIG_AUDIT is not set
1115 # CONFIG_IKCONFIG is not set
1116 CONFIG_LOG_BUF_SHIFT=14
1117 +# CONFIG_CGROUPS is not set
1118 +CONFIG_FAIR_GROUP_SCHED=y
1119 +CONFIG_FAIR_USER_SCHED=y
1120 +# CONFIG_FAIR_CGROUP_SCHED is not set
1121 CONFIG_SYSFS_DEPRECATED=y
1122 # CONFIG_RELAY is not set
1123 CONFIG_BLK_DEV_INITRD=y
1124 @@ -61,35 +67,28 @@
1125 CONFIG_ANON_INODES=y
1126 CONFIG_EPOLL=y
1127 CONFIG_SIGNALFD=y
1128 -CONFIG_TIMERFD=y
1129 CONFIG_EVENTFD=y
1130 CONFIG_SHMEM=y
1131 CONFIG_VM_EVENT_COUNTERS=y
1132 -# CONFIG_SLUB_DEBUG is not set
1133 +CONFIG_SLUB_DEBUG=y
1134 # CONFIG_SLAB is not set
1135 CONFIG_SLUB=y
1136 # CONFIG_SLOB is not set
1137 +CONFIG_SLABINFO=y
1138 CONFIG_RT_MUTEXES=y
1139 # CONFIG_TINY_SHMEM is not set
1140 CONFIG_BASE_SMALL=1
1141 -
1142 -#
1143 -# Loadable module support
1144 -#
1145 CONFIG_MODULES=y
1146 CONFIG_MODULE_UNLOAD=y
1147 CONFIG_MODULE_FORCE_UNLOAD=y
1148 # CONFIG_MODVERSIONS is not set
1149 # CONFIG_MODULE_SRCVERSION_ALL is not set
1150 CONFIG_KMOD=y
1151 -
1152 -#
1153 -# Block layer
1154 -#
1155 CONFIG_BLOCK=y
1156 # CONFIG_LBD is not set
1157 # CONFIG_BLK_DEV_IO_TRACE is not set
1158 # CONFIG_LSF is not set
1159 +# CONFIG_BLK_DEV_BSG is not set
1160
1161 #
1162 # IO Schedulers
1163 @@ -107,21 +106,28 @@
1164 #
1165 # System Type and features
1166 #
1167 +CONFIG_TICK_ONESHOT=y
1168 +CONFIG_NO_HZ=y
1169 +CONFIG_HIGH_RES_TIMERS=y
1170 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
1171 CONFIG_SUBARCH_AVR32B=y
1172 CONFIG_MMU=y
1173 CONFIG_PERFORMANCE_COUNTERS=y
1174 CONFIG_PLATFORM_AT32AP=y
1175 +CONFIG_CPU_AT32AP700X=y
1176 CONFIG_CPU_AT32AP7000=y
1177 # CONFIG_BOARD_ATSTK1000 is not set
1178 CONFIG_BOARD_ATNGW100=y
1179 +CONFIG_BOARD_ATNGW100_I2C_GPIO=y
1180 CONFIG_LOADER_U_BOOT=y
1181
1182 #
1183 # Atmel AVR32 AP options
1184 #
1185 -# CONFIG_AP7000_32_BIT_SMC is not set
1186 -CONFIG_AP7000_16_BIT_SMC=y
1187 -# CONFIG_AP7000_8_BIT_SMC is not set
1188 +# CONFIG_AP700X_32_BIT_SMC is not set
1189 +CONFIG_AP700X_16_BIT_SMC=y
1190 +# CONFIG_AP700X_8_BIT_SMC is not set
1191 +CONFIG_GPIO_DEV=y
1192 CONFIG_LOAD_ADDRESS=0x10000000
1193 CONFIG_ENTRY_ADDRESS=0x90000000
1194 CONFIG_PHYS_OFFSET=0x10000000
1195 @@ -141,10 +147,14 @@
1196 CONFIG_FLATMEM=y
1197 CONFIG_FLAT_NODE_MEM_MAP=y
1198 # CONFIG_SPARSEMEM_STATIC is not set
1199 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
1200 CONFIG_SPLIT_PTLOCK_CPUS=4
1201 # CONFIG_RESOURCES_64BIT is not set
1202 CONFIG_ZONE_DMA_FLAG=0
1203 +CONFIG_VIRT_TO_BUS=y
1204 # CONFIG_OWNERSHIP_TRACE is not set
1205 +# CONFIG_NMI_DEBUGGING is not set
1206 +CONFIG_DW_DMAC=y
1207 # CONFIG_HZ_100 is not set
1208 CONFIG_HZ_250=y
1209 # CONFIG_HZ_300 is not set
1210 @@ -153,13 +163,31 @@
1211 CONFIG_CMDLINE=""
1212
1213 #
1214 -# Bus options
1215 +# Power management options
1216 #
1217 -# CONFIG_ARCH_SUPPORTS_MSI is not set
1218
1219 #
1220 -# PCCARD (PCMCIA/CardBus) support
1221 +# CPU Frequency scaling
1222 +#
1223 +CONFIG_CPU_FREQ=y
1224 +CONFIG_CPU_FREQ_TABLE=y
1225 +# CONFIG_CPU_FREQ_DEBUG is not set
1226 +# CONFIG_CPU_FREQ_STAT is not set
1227 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
1228 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
1229 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
1230 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
1231 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
1232 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
1233 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
1234 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
1235 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
1236 +CONFIG_CPU_FREQ_AT32AP=y
1237 +
1238 +#
1239 +# Bus options
1240 #
1241 +# CONFIG_ARCH_SUPPORTS_MSI is not set
1242 # CONFIG_PCCARD is not set
1243
1244 #
1245 @@ -213,6 +241,7 @@
1246 CONFIG_INET_XFRM_MODE_TRANSPORT=y
1247 CONFIG_INET_XFRM_MODE_TUNNEL=y
1248 CONFIG_INET_XFRM_MODE_BEET=y
1249 +# CONFIG_INET_LRO is not set
1250 CONFIG_INET_DIAG=y
1251 CONFIG_INET_TCP_DIAG=y
1252 # CONFIG_TCP_CONG_ADVANCED is not set
1253 @@ -240,6 +269,7 @@
1254 # CONFIG_NETWORK_SECMARK is not set
1255 CONFIG_NETFILTER=y
1256 # CONFIG_NETFILTER_DEBUG is not set
1257 +CONFIG_BRIDGE_NETFILTER=y
1258
1259 #
1260 # Core Netfilter Configuration
1261 @@ -252,6 +282,7 @@
1262 # CONFIG_NF_CONNTRACK_EVENTS is not set
1263 CONFIG_NF_CT_PROTO_GRE=m
1264 # CONFIG_NF_CT_PROTO_SCTP is not set
1265 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
1266 CONFIG_NF_CONNTRACK_AMANDA=m
1267 CONFIG_NF_CONNTRACK_FTP=m
1268 CONFIG_NF_CONNTRACK_H323=m
1269 @@ -269,9 +300,11 @@
1270 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
1271 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
1272 # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
1273 +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
1274 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
1275 CONFIG_NETFILTER_XT_MATCH_COMMENT=m
1276 CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
1277 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
1278 CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
1279 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
1280 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
1281 @@ -284,6 +317,7 @@
1282 CONFIG_NETFILTER_XT_MATCH_MARK=m
1283 CONFIG_NETFILTER_XT_MATCH_POLICY=m
1284 CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
1285 +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
1286 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
1287 CONFIG_NETFILTER_XT_MATCH_QUOTA=m
1288 CONFIG_NETFILTER_XT_MATCH_REALM=m
1289 @@ -292,6 +326,8 @@
1290 CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
1291 CONFIG_NETFILTER_XT_MATCH_STRING=m
1292 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
1293 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
1294 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
1295 CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
1296
1297 #
1298 @@ -359,13 +395,19 @@
1299 CONFIG_IP6_NF_MANGLE=m
1300 CONFIG_IP6_NF_TARGET_HL=m
1301 CONFIG_IP6_NF_RAW=m
1302 +
1303 +#
1304 +# Bridge: Netfilter Configuration
1305 +#
1306 +# CONFIG_BRIDGE_NF_EBTABLES is not set
1307 # CONFIG_IP_DCCP is not set
1308 # CONFIG_IP_SCTP is not set
1309 # CONFIG_TIPC is not set
1310 # CONFIG_ATM is not set
1311 -# CONFIG_BRIDGE is not set
1312 +CONFIG_BRIDGE=m
1313 CONFIG_VLAN_8021Q=m
1314 # CONFIG_DECNET is not set
1315 +CONFIG_LLC=m
1316 # CONFIG_LLC2 is not set
1317 # CONFIG_IPX is not set
1318 # CONFIG_ATALK is not set
1319 @@ -373,10 +415,6 @@
1320 # CONFIG_LAPB is not set
1321 # CONFIG_ECONET is not set
1322 # CONFIG_WAN_ROUTER is not set
1323 -
1324 -#
1325 -# QoS and/or fair queueing
1326 -#
1327 # CONFIG_NET_SCHED is not set
1328 CONFIG_NET_CLS_ROUTE=y
1329
1330 @@ -384,6 +422,7 @@
1331 # Network testing
1332 #
1333 # CONFIG_NET_PKTGEN is not set
1334 +# CONFIG_NET_TCPPROBE is not set
1335 # CONFIG_HAMRADIO is not set
1336 # CONFIG_IRDA is not set
1337 # CONFIG_BT is not set
1338 @@ -397,6 +436,7 @@
1339 # CONFIG_MAC80211 is not set
1340 # CONFIG_IEEE80211 is not set
1341 # CONFIG_RFKILL is not set
1342 +# CONFIG_NET_9P is not set
1343
1344 #
1345 # Device Drivers
1346 @@ -405,16 +445,13 @@
1347 #
1348 # Generic Driver Options
1349 #
1350 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
1351 CONFIG_STANDALONE=y
1352 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
1353 # CONFIG_FW_LOADER is not set
1354 # CONFIG_DEBUG_DRIVER is not set
1355 # CONFIG_DEBUG_DEVRES is not set
1356 # CONFIG_SYS_HYPERVISOR is not set
1357 -
1358 -#
1359 -# Connector - unified userspace <-> kernelspace linker
1360 -#
1361 # CONFIG_CONNECTOR is not set
1362 CONFIG_MTD=y
1363 # CONFIG_MTD_DEBUG is not set
1364 @@ -434,6 +471,7 @@
1365 # CONFIG_INFTL is not set
1366 # CONFIG_RFD_FTL is not set
1367 # CONFIG_SSFDC is not set
1368 +# CONFIG_MTD_OOPS is not set
1369
1370 #
1371 # RAM/ROM/Flash chip drivers
1372 @@ -493,20 +531,8 @@
1373 # UBI - Unsorted block images
1374 #
1375 # CONFIG_MTD_UBI is not set
1376 -
1377 -#
1378 -# Parallel port support
1379 -#
1380 # CONFIG_PARPORT is not set
1381 -
1382 -#
1383 -# Plug and Play support
1384 -#
1385 -# CONFIG_PNPACPI is not set
1386 -
1387 -#
1388 -# Block devices
1389 -#
1390 +CONFIG_BLK_DEV=y
1391 # CONFIG_BLK_DEV_COW_COMMON is not set
1392 CONFIG_BLK_DEV_LOOP=m
1393 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
1394 @@ -517,11 +543,13 @@
1395 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1396 # CONFIG_CDROM_PKTCDVD is not set
1397 # CONFIG_ATA_OVER_ETH is not set
1398 -
1399 -#
1400 -# Misc devices
1401 -#
1402 -# CONFIG_BLINK is not set
1403 +CONFIG_MISC_DEVICES=y
1404 +# CONFIG_ATMEL_PWM is not set
1405 +CONFIG_ATMEL_TCLIB=y
1406 +CONFIG_ATMEL_TCB_CLKSRC=y
1407 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
1408 +# CONFIG_EEPROM_93CX6 is not set
1409 +# CONFIG_ATMEL_SSC is not set
1410 # CONFIG_IDE is not set
1411
1412 #
1413 @@ -529,30 +557,42 @@
1414 #
1415 # CONFIG_RAID_ATTRS is not set
1416 # CONFIG_SCSI is not set
1417 +# CONFIG_SCSI_DMA is not set
1418 # CONFIG_SCSI_NETLINK is not set
1419 # CONFIG_ATA is not set
1420 -
1421 -#
1422 -# Multi-device support (RAID and LVM)
1423 -#
1424 # CONFIG_MD is not set
1425 -
1426 -#
1427 -# Network device support
1428 -#
1429 CONFIG_NETDEVICES=y
1430 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
1431 # CONFIG_DUMMY is not set
1432 # CONFIG_BONDING is not set
1433 +# CONFIG_MACVLAN is not set
1434 # CONFIG_EQUALIZER is not set
1435 CONFIG_TUN=m
1436 -# CONFIG_PHYLIB is not set
1437 +# CONFIG_VETH is not set
1438 +CONFIG_PHYLIB=y
1439
1440 #
1441 -# Ethernet (10 or 100Mbit)
1442 +# MII PHY device drivers
1443 #
1444 +# CONFIG_MARVELL_PHY is not set
1445 +# CONFIG_DAVICOM_PHY is not set
1446 +# CONFIG_QSEMI_PHY is not set
1447 +# CONFIG_LXT_PHY is not set
1448 +# CONFIG_CICADA_PHY is not set
1449 +# CONFIG_VITESSE_PHY is not set
1450 +# CONFIG_SMSC_PHY is not set
1451 +# CONFIG_BROADCOM_PHY is not set
1452 +# CONFIG_ICPLUS_PHY is not set
1453 +# CONFIG_FIXED_PHY is not set
1454 +# CONFIG_MDIO_BITBANG is not set
1455 CONFIG_NET_ETHERNET=y
1456 -CONFIG_MII=y
1457 +# CONFIG_MII is not set
1458 CONFIG_MACB=y
1459 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
1460 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
1461 +# CONFIG_IBM_NEW_EMAC_TAH is not set
1462 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
1463 +# CONFIG_B44 is not set
1464 # CONFIG_NETDEV_1000 is not set
1465 # CONFIG_NETDEV_10000 is not set
1466
1467 @@ -571,21 +611,14 @@
1468 CONFIG_PPP_BSDCOMP=m
1469 CONFIG_PPP_MPPE=m
1470 CONFIG_PPPOE=m
1471 +# CONFIG_PPPOL2TP is not set
1472 # CONFIG_SLIP is not set
1473 CONFIG_SLHC=m
1474 # CONFIG_SHAPER is not set
1475 # CONFIG_NETCONSOLE is not set
1476 # CONFIG_NETPOLL is not set
1477 # CONFIG_NET_POLL_CONTROLLER is not set
1478 -
1479 -#
1480 -# ISDN subsystem
1481 -#
1482 # CONFIG_ISDN is not set
1483 -
1484 -#
1485 -# Telephony Support
1486 -#
1487 # CONFIG_PHONE is not set
1488
1489 #
1490 @@ -615,28 +648,57 @@
1491 #
1492 CONFIG_SERIAL_ATMEL=y
1493 CONFIG_SERIAL_ATMEL_CONSOLE=y
1494 +CONFIG_SERIAL_ATMEL_PDC=y
1495 # CONFIG_SERIAL_ATMEL_TTYAT is not set
1496 CONFIG_SERIAL_CORE=y
1497 CONFIG_SERIAL_CORE_CONSOLE=y
1498 CONFIG_UNIX98_PTYS=y
1499 # CONFIG_LEGACY_PTYS is not set
1500 -
1501 -#
1502 -# IPMI
1503 -#
1504 # CONFIG_IPMI_HANDLER is not set
1505 -# CONFIG_WATCHDOG is not set
1506 # CONFIG_HW_RANDOM is not set
1507 # CONFIG_RTC is not set
1508 # CONFIG_GEN_RTC is not set
1509 # CONFIG_R3964 is not set
1510 # CONFIG_RAW_DRIVER is not set
1511 -
1512 -#
1513 -# TPM devices
1514 -#
1515 # CONFIG_TCG_TPM is not set
1516 -# CONFIG_I2C is not set
1517 +CONFIG_I2C=m
1518 +CONFIG_I2C_BOARDINFO=y
1519 +CONFIG_I2C_CHARDEV=m
1520 +
1521 +#
1522 +# I2C Algorithms
1523 +#
1524 +CONFIG_I2C_ALGOBIT=m
1525 +# CONFIG_I2C_ALGOPCF is not set
1526 +# CONFIG_I2C_ALGOPCA is not set
1527 +
1528 +#
1529 +# I2C Hardware Bus support
1530 +#
1531 +CONFIG_I2C_ATMELTWI=m
1532 +CONFIG_I2C_GPIO=m
1533 +# CONFIG_I2C_OCORES is not set
1534 +# CONFIG_I2C_PARPORT_LIGHT is not set
1535 +# CONFIG_I2C_SIMTEC is not set
1536 +# CONFIG_I2C_TAOS_EVM is not set
1537 +# CONFIG_I2C_STUB is not set
1538 +
1539 +#
1540 +# Miscellaneous I2C Chip support
1541 +#
1542 +# CONFIG_SENSORS_DS1337 is not set
1543 +# CONFIG_SENSORS_DS1374 is not set
1544 +# CONFIG_DS1682 is not set
1545 +# CONFIG_SENSORS_EEPROM is not set
1546 +# CONFIG_SENSORS_PCF8574 is not set
1547 +# CONFIG_SENSORS_PCA9539 is not set
1548 +# CONFIG_SENSORS_PCF8591 is not set
1549 +# CONFIG_SENSORS_MAX6875 is not set
1550 +# CONFIG_SENSORS_TSL2550 is not set
1551 +# CONFIG_I2C_DEBUG_CORE is not set
1552 +# CONFIG_I2C_DEBUG_ALGO is not set
1553 +# CONFIG_I2C_DEBUG_BUS is not set
1554 +# CONFIG_I2C_DEBUG_CHIP is not set
1555
1556 #
1557 # SPI support
1558 @@ -655,13 +717,25 @@
1559 # SPI Protocol Masters
1560 #
1561 # CONFIG_SPI_AT25 is not set
1562 -# CONFIG_SPI_SPIDEV is not set
1563 +CONFIG_SPI_SPIDEV=m
1564 +# CONFIG_SPI_TLE62X0 is not set
1565 +# CONFIG_W1 is not set
1566 +# CONFIG_POWER_SUPPLY is not set
1567 +# CONFIG_HWMON is not set
1568 +CONFIG_WATCHDOG=y
1569 +# CONFIG_WATCHDOG_NOWAYOUT is not set
1570
1571 #
1572 -# Dallas's 1-wire bus
1573 +# Watchdog Device Drivers
1574 #
1575 -# CONFIG_W1 is not set
1576 -# CONFIG_HWMON is not set
1577 +# CONFIG_SOFT_WATCHDOG is not set
1578 +CONFIG_AT32AP700X_WDT=y
1579 +
1580 +#
1581 +# Sonics Silicon Backplane
1582 +#
1583 +CONFIG_SSB_POSSIBLE=y
1584 +# CONFIG_SSB is not set
1585
1586 #
1587 # Multifunction device drivers
1588 @@ -678,23 +752,21 @@
1589 #
1590 # Graphics support
1591 #
1592 +# CONFIG_VGASTATE is not set
1593 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1594 +# CONFIG_FB is not set
1595 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1596
1597 #
1598 # Display device support
1599 #
1600 # CONFIG_DISPLAY_SUPPORT is not set
1601 -# CONFIG_VGASTATE is not set
1602 -# CONFIG_FB is not set
1603
1604 #
1605 # Sound
1606 #
1607 # CONFIG_SOUND is not set
1608 -
1609 -#
1610 -# USB support
1611 -#
1612 +CONFIG_USB_SUPPORT=y
1613 # CONFIG_USB_ARCH_HAS_HCD is not set
1614 # CONFIG_USB_ARCH_HAS_OHCI is not set
1615 # CONFIG_USB_ARCH_HAS_EHCI is not set
1616 @@ -706,12 +778,48 @@
1617 #
1618 # USB Gadget Support
1619 #
1620 -# CONFIG_USB_GADGET is not set
1621 -# CONFIG_MMC is not set
1622 +CONFIG_USB_GADGET=y
1623 +# CONFIG_USB_GADGET_DEBUG is not set
1624 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
1625 +CONFIG_USB_GADGET_SELECTED=y
1626 +# CONFIG_USB_GADGET_AMD5536UDC is not set
1627 +CONFIG_USB_GADGET_ATMEL_USBA=y
1628 +CONFIG_USB_ATMEL_USBA=y
1629 +# CONFIG_USB_GADGET_FSL_USB2 is not set
1630 +# CONFIG_USB_GADGET_NET2280 is not set
1631 +# CONFIG_USB_GADGET_PXA2XX is not set
1632 +# CONFIG_USB_GADGET_M66592 is not set
1633 +# CONFIG_USB_GADGET_GOKU is not set
1634 +# CONFIG_USB_GADGET_LH7A40X is not set
1635 +# CONFIG_USB_GADGET_OMAP is not set
1636 +# CONFIG_USB_GADGET_S3C2410 is not set
1637 +# CONFIG_USB_GADGET_AT91 is not set
1638 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
1639 +CONFIG_USB_GADGET_DUALSPEED=y
1640 +CONFIG_USB_ZERO=m
1641 +CONFIG_USB_ETH=m
1642 +CONFIG_USB_ETH_RNDIS=y
1643 +CONFIG_USB_GADGETFS=m
1644 +CONFIG_USB_FILE_STORAGE=m
1645 +# CONFIG_USB_FILE_STORAGE_TEST is not set
1646 +CONFIG_USB_G_SERIAL=m
1647 +# CONFIG_USB_MIDI_GADGET is not set
1648 +CONFIG_MMC=y
1649 +# CONFIG_MMC_DEBUG is not set
1650 +# CONFIG_MMC_UNSAFE_RESUME is not set
1651 +
1652 +#
1653 +# MMC/SD Card Drivers
1654 +#
1655 +CONFIG_MMC_BLOCK=y
1656 +# CONFIG_MMC_BLOCK_BOUNCE is not set
1657 +# CONFIG_SDIO_UART is not set
1658
1659 #
1660 -# LED devices
1661 +# MMC/SD Host Controller Drivers
1662 #
1663 +CONFIG_MMC_ATMELMCI=y
1664 +CONFIG_MMC_SPI=m
1665 CONFIG_NEW_LEDS=y
1666 CONFIG_LEDS_CLASS=y
1667
1668 @@ -726,53 +834,71 @@
1669 CONFIG_LEDS_TRIGGERS=y
1670 CONFIG_LEDS_TRIGGER_TIMER=y
1671 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1672 -
1673 +CONFIG_RTC_LIB=y
1674 +CONFIG_RTC_CLASS=y
1675 +CONFIG_RTC_HCTOSYS=y
1676 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1677 +# CONFIG_RTC_DEBUG is not set
1678
1679 #
1680 -# LED drivers
1681 -#
1682 -
1683 -#
1684 -# LED Triggers
1685 -#
1686 -
1687 -#
1688 -# InfiniBand support
1689 +# RTC interfaces
1690 #
1691 +CONFIG_RTC_INTF_SYSFS=y
1692 +CONFIG_RTC_INTF_PROC=y
1693 +CONFIG_RTC_INTF_DEV=y
1694 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1695 +# CONFIG_RTC_DRV_TEST is not set
1696
1697 #
1698 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1699 +# I2C RTC drivers
1700 #
1701 +# CONFIG_RTC_DRV_DS1307 is not set
1702 +# CONFIG_RTC_DRV_DS1374 is not set
1703 +# CONFIG_RTC_DRV_DS1672 is not set
1704 +# CONFIG_RTC_DRV_MAX6900 is not set
1705 +# CONFIG_RTC_DRV_RS5C372 is not set
1706 +# CONFIG_RTC_DRV_ISL1208 is not set
1707 +# CONFIG_RTC_DRV_X1205 is not set
1708 +# CONFIG_RTC_DRV_PCF8563 is not set
1709 +# CONFIG_RTC_DRV_PCF8583 is not set
1710 +# CONFIG_RTC_DRV_M41T80 is not set
1711
1712 #
1713 -# Real Time Clock
1714 +# SPI RTC drivers
1715 #
1716 -# CONFIG_RTC_CLASS is not set
1717 +# CONFIG_RTC_DRV_RS5C348 is not set
1718 +# CONFIG_RTC_DRV_MAX6902 is not set
1719
1720 #
1721 -# DMA Engine support
1722 +# Platform RTC drivers
1723 #
1724 -# CONFIG_DMA_ENGINE is not set
1725 +# CONFIG_RTC_DRV_DS1553 is not set
1726 +# CONFIG_RTC_DRV_STK17TA8 is not set
1727 +# CONFIG_RTC_DRV_DS1742 is not set
1728 +# CONFIG_RTC_DRV_M48T86 is not set
1729 +# CONFIG_RTC_DRV_M48T59 is not set
1730 +# CONFIG_RTC_DRV_V3020 is not set
1731
1732 #
1733 -# DMA Clients
1734 +# on-CPU RTC drivers
1735 #
1736 +CONFIG_RTC_DRV_AT32AP700X=y
1737
1738 #
1739 -# DMA Devices
1740 +# Userspace I/O
1741 #
1742 +# CONFIG_UIO is not set
1743
1744 #
1745 # File systems
1746 #
1747 -CONFIG_EXT2_FS=y
1748 +CONFIG_EXT2_FS=m
1749 # CONFIG_EXT2_FS_XATTR is not set
1750 # CONFIG_EXT2_FS_XIP is not set
1751 -CONFIG_EXT3_FS=y
1752 +CONFIG_EXT3_FS=m
1753 # CONFIG_EXT3_FS_XATTR is not set
1754 # CONFIG_EXT4DEV_FS is not set
1755 -CONFIG_JBD=y
1756 -# CONFIG_JBD_DEBUG is not set
1757 +CONFIG_JBD=m
1758 # CONFIG_REISERFS_FS is not set
1759 # CONFIG_JFS_FS is not set
1760 # CONFIG_FS_POSIX_ACL is not set
1761 @@ -781,7 +907,8 @@
1762 # CONFIG_OCFS2_FS is not set
1763 # CONFIG_MINIX_FS is not set
1764 # CONFIG_ROMFS_FS is not set
1765 -# CONFIG_INOTIFY is not set
1766 +CONFIG_INOTIFY=y
1767 +CONFIG_INOTIFY_USER=y
1768 # CONFIG_QUOTA is not set
1769 # CONFIG_DNOTIFY is not set
1770 # CONFIG_AUTOFS_FS is not set
1771 @@ -814,7 +941,6 @@
1772 CONFIG_TMPFS=y
1773 # CONFIG_TMPFS_POSIX_ACL is not set
1774 # CONFIG_HUGETLB_PAGE is not set
1775 -CONFIG_RAMFS=y
1776 CONFIG_CONFIGFS_FS=y
1777
1778 #
1779 @@ -830,10 +956,12 @@
1780 CONFIG_JFFS2_FS=y
1781 CONFIG_JFFS2_FS_DEBUG=0
1782 CONFIG_JFFS2_FS_WRITEBUFFER=y
1783 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1784 # CONFIG_JFFS2_SUMMARY is not set
1785 # CONFIG_JFFS2_FS_XATTR is not set
1786 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1787 CONFIG_JFFS2_ZLIB=y
1788 +# CONFIG_JFFS2_LZO is not set
1789 CONFIG_JFFS2_RTIME=y
1790 # CONFIG_JFFS2_RUBIN is not set
1791 # CONFIG_CRAMFS is not set
1792 @@ -842,19 +970,21 @@
1793 # CONFIG_QNX4FS_FS is not set
1794 # CONFIG_SYSV_FS is not set
1795 # CONFIG_UFS_FS is not set
1796 -
1797 -#
1798 -# Network File Systems
1799 -#
1800 +CONFIG_NETWORK_FILESYSTEMS=y
1801 CONFIG_NFS_FS=y
1802 CONFIG_NFS_V3=y
1803 # CONFIG_NFS_V3_ACL is not set
1804 # CONFIG_NFS_V4 is not set
1805 # CONFIG_NFS_DIRECTIO is not set
1806 -# CONFIG_NFSD is not set
1807 +CONFIG_NFSD=m
1808 +CONFIG_NFSD_V3=y
1809 +# CONFIG_NFSD_V3_ACL is not set
1810 +# CONFIG_NFSD_V4 is not set
1811 +CONFIG_NFSD_TCP=y
1812 CONFIG_ROOT_NFS=y
1813 CONFIG_LOCKD=y
1814 CONFIG_LOCKD_V4=y
1815 +CONFIG_EXPORTFS=m
1816 CONFIG_NFS_COMMON=y
1817 CONFIG_SUNRPC=y
1818 # CONFIG_SUNRPC_BIND34 is not set
1819 @@ -871,23 +1001,18 @@
1820 # CONFIG_NCP_FS is not set
1821 # CONFIG_CODA_FS is not set
1822 # CONFIG_AFS_FS is not set
1823 -# CONFIG_9P_FS is not set
1824
1825 #
1826 # Partition Types
1827 #
1828 # CONFIG_PARTITION_ADVANCED is not set
1829 CONFIG_MSDOS_PARTITION=y
1830 -
1831 -#
1832 -# Native Language Support
1833 -#
1834 -CONFIG_NLS=y
1835 +CONFIG_NLS=m
1836 CONFIG_NLS_DEFAULT="iso8859-1"
1837 -# CONFIG_NLS_CODEPAGE_437 is not set
1838 +CONFIG_NLS_CODEPAGE_437=m
1839 # CONFIG_NLS_CODEPAGE_737 is not set
1840 # CONFIG_NLS_CODEPAGE_775 is not set
1841 -CONFIG_NLS_CODEPAGE_850=y
1842 +CONFIG_NLS_CODEPAGE_850=m
1843 # CONFIG_NLS_CODEPAGE_852 is not set
1844 # CONFIG_NLS_CODEPAGE_855 is not set
1845 # CONFIG_NLS_CODEPAGE_857 is not set
1846 @@ -908,7 +1033,7 @@
1847 # CONFIG_NLS_CODEPAGE_1250 is not set
1848 # CONFIG_NLS_CODEPAGE_1251 is not set
1849 # CONFIG_NLS_ASCII is not set
1850 -CONFIG_NLS_ISO8859_1=y
1851 +CONFIG_NLS_ISO8859_1=m
1852 # CONFIG_NLS_ISO8859_2 is not set
1853 # CONFIG_NLS_ISO8859_3 is not set
1854 # CONFIG_NLS_ISO8859_4 is not set
1855 @@ -921,18 +1046,19 @@
1856 # CONFIG_NLS_ISO8859_15 is not set
1857 # CONFIG_NLS_KOI8_R is not set
1858 # CONFIG_NLS_KOI8_U is not set
1859 -CONFIG_NLS_UTF8=y
1860 -
1861 -#
1862 -# Distributed Lock Manager
1863 -#
1864 +CONFIG_NLS_UTF8=m
1865 # CONFIG_DLM is not set
1866 +CONFIG_INSTRUMENTATION=y
1867 +CONFIG_PROFILING=y
1868 +CONFIG_OPROFILE=m
1869 +CONFIG_KPROBES=y
1870 +# CONFIG_MARKERS is not set
1871
1872 #
1873 # Kernel hacking
1874 #
1875 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1876 # CONFIG_PRINTK_TIME is not set
1877 +CONFIG_ENABLE_WARN_DEPRECATED=y
1878 CONFIG_ENABLE_MUST_CHECK=y
1879 CONFIG_MAGIC_SYSRQ=y
1880 # CONFIG_UNUSED_SYMBOLS is not set
1881 @@ -941,12 +1067,17 @@
1882 CONFIG_DEBUG_KERNEL=y
1883 # CONFIG_DEBUG_SHIRQ is not set
1884 CONFIG_DETECT_SOFTLOCKUP=y
1885 +CONFIG_SCHED_DEBUG=y
1886 # CONFIG_SCHEDSTATS is not set
1887 # CONFIG_TIMER_STATS is not set
1888 +# CONFIG_SLUB_DEBUG_ON is not set
1889 # CONFIG_DEBUG_RT_MUTEXES is not set
1890 # CONFIG_RT_MUTEX_TESTER is not set
1891 # CONFIG_DEBUG_SPINLOCK is not set
1892 # CONFIG_DEBUG_MUTEXES is not set
1893 +# CONFIG_DEBUG_LOCK_ALLOC is not set
1894 +# CONFIG_PROVE_LOCKING is not set
1895 +# CONFIG_LOCK_STAT is not set
1896 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1897 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1898 # CONFIG_DEBUG_KOBJECT is not set
1899 @@ -954,21 +1085,21 @@
1900 # CONFIG_DEBUG_INFO is not set
1901 # CONFIG_DEBUG_VM is not set
1902 # CONFIG_DEBUG_LIST is not set
1903 +# CONFIG_DEBUG_SG is not set
1904 CONFIG_FRAME_POINTER=y
1905 # CONFIG_FORCED_INLINING is not set
1906 +# CONFIG_BOOT_PRINTK_DELAY is not set
1907 # CONFIG_RCU_TORTURE_TEST is not set
1908 +# CONFIG_LKDTM is not set
1909 # CONFIG_FAULT_INJECTION is not set
1910 -# CONFIG_KPROBES is not set
1911 +# CONFIG_SAMPLES is not set
1912
1913 #
1914 # Security options
1915 #
1916 # CONFIG_KEYS is not set
1917 # CONFIG_SECURITY is not set
1918 -
1919 -#
1920 -# Cryptographic options
1921 -#
1922 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1923 CONFIG_CRYPTO=y
1924 CONFIG_CRYPTO_ALGAPI=y
1925 CONFIG_CRYPTO_BLKCIPHER=y
1926 @@ -989,6 +1120,7 @@
1927 CONFIG_CRYPTO_CBC=y
1928 CONFIG_CRYPTO_PCBC=m
1929 # CONFIG_CRYPTO_LRW is not set
1930 +# CONFIG_CRYPTO_XTS is not set
1931 # CONFIG_CRYPTO_CRYPTD is not set
1932 CONFIG_CRYPTO_DES=y
1933 # CONFIG_CRYPTO_FCRYPT is not set
1934 @@ -1002,15 +1134,14 @@
1935 CONFIG_CRYPTO_ARC4=m
1936 # CONFIG_CRYPTO_KHAZAD is not set
1937 # CONFIG_CRYPTO_ANUBIS is not set
1938 +# CONFIG_CRYPTO_SEED is not set
1939 CONFIG_CRYPTO_DEFLATE=y
1940 # CONFIG_CRYPTO_MICHAEL_MIC is not set
1941 # CONFIG_CRYPTO_CRC32C is not set
1942 # CONFIG_CRYPTO_CAMELLIA is not set
1943 # CONFIG_CRYPTO_TEST is not set
1944 -
1945 -#
1946 -# Hardware crypto devices
1947 -#
1948 +# CONFIG_CRYPTO_AUTHENC is not set
1949 +CONFIG_CRYPTO_HW=y
1950
1951 #
1952 # Library routines
1953 @@ -1018,8 +1149,9 @@
1954 CONFIG_BITREVERSE=y
1955 CONFIG_CRC_CCITT=m
1956 # CONFIG_CRC16 is not set
1957 -# CONFIG_CRC_ITU_T is not set
1958 +CONFIG_CRC_ITU_T=m
1959 CONFIG_CRC32=y
1960 +CONFIG_CRC7=m
1961 # CONFIG_LIBCRC32C is not set
1962 CONFIG_ZLIB_INFLATE=y
1963 CONFIG_ZLIB_DEFLATE=y
1964 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1002_defconfig avr32-2.6/arch/avr32/configs/atstk1002_defconfig
1965 --- linux-2.6.24.3/arch/avr32/configs/atstk1002_defconfig 2008-02-26 01:20:20.000000000 +0100
1966 +++ avr32-2.6/arch/avr32/configs/atstk1002_defconfig 2008-04-23 20:12:35.000000000 +0200
1967 @@ -1,48 +1,49 @@
1968 #
1969 # Automatically generated make config: don't edit
1970 -# Linux kernel version: 2.6.22-rc5
1971 -# Sat Jun 23 15:32:08 2007
1972 +# Linux kernel version: 2.6.24
1973 +# Thu Mar 6 12:49:17 2008
1974 #
1975 CONFIG_AVR32=y
1976 CONFIG_GENERIC_GPIO=y
1977 CONFIG_GENERIC_HARDIRQS=y
1978 +CONFIG_STACKTRACE_SUPPORT=y
1979 +CONFIG_LOCKDEP_SUPPORT=y
1980 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1981 CONFIG_HARDIRQS_SW_RESEND=y
1982 CONFIG_GENERIC_IRQ_PROBE=y
1983 CONFIG_RWSEM_GENERIC_SPINLOCK=y
1984 CONFIG_GENERIC_TIME=y
1985 +CONFIG_GENERIC_CLOCKEVENTS=y
1986 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
1987 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
1988 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
1989 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
1990 CONFIG_GENERIC_HWEIGHT=y
1991 CONFIG_GENERIC_CALIBRATE_DELAY=y
1992 CONFIG_GENERIC_BUG=y
1993 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1994
1995 #
1996 -# Code maturity level options
1997 +# General setup
1998 #
1999 CONFIG_EXPERIMENTAL=y
2000 CONFIG_BROKEN_ON_SMP=y
2001 CONFIG_INIT_ENV_ARG_LIMIT=32
2002 -
2003 -#
2004 -# General setup
2005 -#
2006 CONFIG_LOCALVERSION=""
2007 # CONFIG_LOCALVERSION_AUTO is not set
2008 CONFIG_SWAP=y
2009 CONFIG_SYSVIPC=y
2010 -# CONFIG_IPC_NS is not set
2011 CONFIG_SYSVIPC_SYSCTL=y
2012 CONFIG_POSIX_MQUEUE=y
2013 -CONFIG_BSD_PROCESS_ACCT=y
2014 -CONFIG_BSD_PROCESS_ACCT_V3=y
2015 -CONFIG_TASKSTATS=y
2016 -CONFIG_TASK_DELAY_ACCT=y
2017 -# CONFIG_TASK_XACCT is not set
2018 -# CONFIG_UTS_NS is not set
2019 -CONFIG_AUDIT=y
2020 +# CONFIG_BSD_PROCESS_ACCT is not set
2021 +# CONFIG_TASKSTATS is not set
2022 +# CONFIG_USER_NS is not set
2023 +# CONFIG_PID_NS is not set
2024 +# CONFIG_AUDIT is not set
2025 # CONFIG_IKCONFIG is not set
2026 CONFIG_LOG_BUF_SHIFT=14
2027 +# CONFIG_CGROUPS is not set
2028 +# CONFIG_FAIR_GROUP_SCHED is not set
2029 CONFIG_SYSFS_DEPRECATED=y
2030 CONFIG_RELAY=y
2031 CONFIG_BLK_DEV_INITRD=y
2032 @@ -63,35 +64,28 @@
2033 CONFIG_ANON_INODES=y
2034 CONFIG_EPOLL=y
2035 CONFIG_SIGNALFD=y
2036 -CONFIG_TIMERFD=y
2037 CONFIG_EVENTFD=y
2038 CONFIG_SHMEM=y
2039 CONFIG_VM_EVENT_COUNTERS=y
2040 -# CONFIG_SLUB_DEBUG is not set
2041 +CONFIG_SLUB_DEBUG=y
2042 # CONFIG_SLAB is not set
2043 CONFIG_SLUB=y
2044 # CONFIG_SLOB is not set
2045 +CONFIG_SLABINFO=y
2046 CONFIG_RT_MUTEXES=y
2047 # CONFIG_TINY_SHMEM is not set
2048 CONFIG_BASE_SMALL=1
2049 -
2050 -#
2051 -# Loadable module support
2052 -#
2053 CONFIG_MODULES=y
2054 CONFIG_MODULE_UNLOAD=y
2055 # CONFIG_MODULE_FORCE_UNLOAD is not set
2056 # CONFIG_MODVERSIONS is not set
2057 # CONFIG_MODULE_SRCVERSION_ALL is not set
2058 # CONFIG_KMOD is not set
2059 -
2060 -#
2061 -# Block layer
2062 -#
2063 CONFIG_BLOCK=y
2064 # CONFIG_LBD is not set
2065 # CONFIG_BLK_DEV_IO_TRACE is not set
2066 # CONFIG_LSF is not set
2067 +# CONFIG_BLK_DEV_BSG is not set
2068
2069 #
2070 # IO Schedulers
2071 @@ -99,32 +93,49 @@
2072 CONFIG_IOSCHED_NOOP=y
2073 # CONFIG_IOSCHED_AS is not set
2074 # CONFIG_IOSCHED_DEADLINE is not set
2075 -# CONFIG_IOSCHED_CFQ is not set
2076 +CONFIG_IOSCHED_CFQ=y
2077 # CONFIG_DEFAULT_AS is not set
2078 # CONFIG_DEFAULT_DEADLINE is not set
2079 -# CONFIG_DEFAULT_CFQ is not set
2080 -CONFIG_DEFAULT_NOOP=y
2081 -CONFIG_DEFAULT_IOSCHED="noop"
2082 +CONFIG_DEFAULT_CFQ=y
2083 +# CONFIG_DEFAULT_NOOP is not set
2084 +CONFIG_DEFAULT_IOSCHED="cfq"
2085
2086 #
2087 # System Type and features
2088 #
2089 +CONFIG_TICK_ONESHOT=y
2090 +CONFIG_NO_HZ=y
2091 +CONFIG_HIGH_RES_TIMERS=y
2092 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
2093 CONFIG_SUBARCH_AVR32B=y
2094 CONFIG_MMU=y
2095 CONFIG_PERFORMANCE_COUNTERS=y
2096 CONFIG_PLATFORM_AT32AP=y
2097 +CONFIG_CPU_AT32AP700X=y
2098 CONFIG_CPU_AT32AP7000=y
2099 -CONFIG_BOARD_ATSTK1002=y
2100 CONFIG_BOARD_ATSTK1000=y
2101 # CONFIG_BOARD_ATNGW100 is not set
2102 +CONFIG_BOARD_ATSTK1002=y
2103 +# CONFIG_BOARD_ATSTK1003 is not set
2104 +# CONFIG_BOARD_ATSTK1004 is not set
2105 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
2106 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
2107 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
2108 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
2109 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
2110 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
2111 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
2112 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
2113 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
2114 CONFIG_LOADER_U_BOOT=y
2115
2116 #
2117 # Atmel AVR32 AP options
2118 #
2119 -# CONFIG_AP7000_32_BIT_SMC is not set
2120 -CONFIG_AP7000_16_BIT_SMC=y
2121 -# CONFIG_AP7000_8_BIT_SMC is not set
2122 +# CONFIG_AP700X_32_BIT_SMC is not set
2123 +CONFIG_AP700X_16_BIT_SMC=y
2124 +# CONFIG_AP700X_8_BIT_SMC is not set
2125 +CONFIG_GPIO_DEV=y
2126 CONFIG_LOAD_ADDRESS=0x10000000
2127 CONFIG_ENTRY_ADDRESS=0x90000000
2128 CONFIG_PHYS_OFFSET=0x10000000
2129 @@ -144,10 +155,14 @@
2130 CONFIG_FLATMEM=y
2131 CONFIG_FLAT_NODE_MEM_MAP=y
2132 # CONFIG_SPARSEMEM_STATIC is not set
2133 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
2134 CONFIG_SPLIT_PTLOCK_CPUS=4
2135 # CONFIG_RESOURCES_64BIT is not set
2136 CONFIG_ZONE_DMA_FLAG=0
2137 +CONFIG_VIRT_TO_BUS=y
2138 # CONFIG_OWNERSHIP_TRACE is not set
2139 +CONFIG_NMI_DEBUGGING=y
2140 +CONFIG_DW_DMAC=y
2141 # CONFIG_HZ_100 is not set
2142 CONFIG_HZ_250=y
2143 # CONFIG_HZ_300 is not set
2144 @@ -156,13 +171,31 @@
2145 CONFIG_CMDLINE=""
2146
2147 #
2148 -# Bus options
2149 +# Power management options
2150 #
2151 -# CONFIG_ARCH_SUPPORTS_MSI is not set
2152
2153 #
2154 -# PCCARD (PCMCIA/CardBus) support
2155 +# CPU Frequency scaling
2156 +#
2157 +CONFIG_CPU_FREQ=y
2158 +CONFIG_CPU_FREQ_TABLE=y
2159 +# CONFIG_CPU_FREQ_DEBUG is not set
2160 +# CONFIG_CPU_FREQ_STAT is not set
2161 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
2162 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
2163 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
2164 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
2165 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
2166 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
2167 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
2168 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
2169 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
2170 +CONFIG_CPU_FREQ_AT32AP=y
2171 +
2172 +#
2173 +# Bus options
2174 #
2175 +# CONFIG_ARCH_SUPPORTS_MSI is not set
2176 # CONFIG_PCCARD is not set
2177
2178 #
2179 @@ -182,7 +215,12 @@
2180 CONFIG_PACKET=y
2181 CONFIG_PACKET_MMAP=y
2182 CONFIG_UNIX=y
2183 -# CONFIG_NET_KEY is not set
2184 +CONFIG_XFRM=y
2185 +CONFIG_XFRM_USER=m
2186 +# CONFIG_XFRM_SUB_POLICY is not set
2187 +# CONFIG_XFRM_MIGRATE is not set
2188 +CONFIG_NET_KEY=m
2189 +# CONFIG_NET_KEY_MIGRATE is not set
2190 CONFIG_INET=y
2191 # CONFIG_IP_MULTICAST is not set
2192 # CONFIG_IP_ADVANCED_ROUTER is not set
2193 @@ -191,36 +229,52 @@
2194 CONFIG_IP_PNP_DHCP=y
2195 # CONFIG_IP_PNP_BOOTP is not set
2196 # CONFIG_IP_PNP_RARP is not set
2197 -# CONFIG_NET_IPIP is not set
2198 -# CONFIG_NET_IPGRE is not set
2199 +CONFIG_NET_IPIP=m
2200 +CONFIG_NET_IPGRE=m
2201 # CONFIG_ARPD is not set
2202 # CONFIG_SYN_COOKIES is not set
2203 -# CONFIG_INET_AH is not set
2204 -# CONFIG_INET_ESP is not set
2205 +CONFIG_INET_AH=m
2206 +CONFIG_INET_ESP=m
2207 # CONFIG_INET_IPCOMP is not set
2208 # CONFIG_INET_XFRM_TUNNEL is not set
2209 -# CONFIG_INET_TUNNEL is not set
2210 -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
2211 -# CONFIG_INET_XFRM_MODE_TUNNEL is not set
2212 -# CONFIG_INET_XFRM_MODE_BEET is not set
2213 +CONFIG_INET_TUNNEL=m
2214 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
2215 +CONFIG_INET_XFRM_MODE_TUNNEL=m
2216 +CONFIG_INET_XFRM_MODE_BEET=m
2217 +# CONFIG_INET_LRO is not set
2218 CONFIG_INET_DIAG=y
2219 CONFIG_INET_TCP_DIAG=y
2220 # CONFIG_TCP_CONG_ADVANCED is not set
2221 CONFIG_TCP_CONG_CUBIC=y
2222 CONFIG_DEFAULT_TCP_CONG="cubic"
2223 # CONFIG_TCP_MD5SIG is not set
2224 -# CONFIG_IPV6 is not set
2225 -# CONFIG_INET6_XFRM_TUNNEL is not set
2226 -# CONFIG_INET6_TUNNEL is not set
2227 +CONFIG_IPV6=m
2228 +# CONFIG_IPV6_PRIVACY is not set
2229 +# CONFIG_IPV6_ROUTER_PREF is not set
2230 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
2231 +CONFIG_INET6_AH=m
2232 +CONFIG_INET6_ESP=m
2233 +CONFIG_INET6_IPCOMP=m
2234 +# CONFIG_IPV6_MIP6 is not set
2235 +CONFIG_INET6_XFRM_TUNNEL=m
2236 +CONFIG_INET6_TUNNEL=m
2237 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
2238 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
2239 +CONFIG_INET6_XFRM_MODE_BEET=m
2240 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
2241 +CONFIG_IPV6_SIT=m
2242 +CONFIG_IPV6_TUNNEL=m
2243 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
2244 # CONFIG_NETWORK_SECMARK is not set
2245 # CONFIG_NETFILTER is not set
2246 # CONFIG_IP_DCCP is not set
2247 # CONFIG_IP_SCTP is not set
2248 # CONFIG_TIPC is not set
2249 # CONFIG_ATM is not set
2250 -# CONFIG_BRIDGE is not set
2251 +CONFIG_BRIDGE=m
2252 # CONFIG_VLAN_8021Q is not set
2253 # CONFIG_DECNET is not set
2254 +CONFIG_LLC=m
2255 # CONFIG_LLC2 is not set
2256 # CONFIG_IPX is not set
2257 # CONFIG_ATALK is not set
2258 @@ -228,16 +282,13 @@
2259 # CONFIG_LAPB is not set
2260 # CONFIG_ECONET is not set
2261 # CONFIG_WAN_ROUTER is not set
2262 -
2263 -#
2264 -# QoS and/or fair queueing
2265 -#
2266 # CONFIG_NET_SCHED is not set
2267
2268 #
2269 # Network testing
2270 #
2271 # CONFIG_NET_PKTGEN is not set
2272 +# CONFIG_NET_TCPPROBE is not set
2273 # CONFIG_HAMRADIO is not set
2274 # CONFIG_IRDA is not set
2275 # CONFIG_BT is not set
2276 @@ -251,6 +302,7 @@
2277 # CONFIG_MAC80211 is not set
2278 # CONFIG_IEEE80211 is not set
2279 # CONFIG_RFKILL is not set
2280 +# CONFIG_NET_9P is not set
2281
2282 #
2283 # Device Drivers
2284 @@ -259,16 +311,13 @@
2285 #
2286 # Generic Driver Options
2287 #
2288 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
2289 CONFIG_STANDALONE=y
2290 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
2291 # CONFIG_FW_LOADER is not set
2292 # CONFIG_DEBUG_DRIVER is not set
2293 # CONFIG_DEBUG_DEVRES is not set
2294 # CONFIG_SYS_HYPERVISOR is not set
2295 -
2296 -#
2297 -# Connector - unified userspace <-> kernelspace linker
2298 -#
2299 # CONFIG_CONNECTOR is not set
2300 CONFIG_MTD=y
2301 # CONFIG_MTD_DEBUG is not set
2302 @@ -288,6 +337,7 @@
2303 # CONFIG_INFTL is not set
2304 # CONFIG_RFD_FTL is not set
2305 # CONFIG_SSFDC is not set
2306 +# CONFIG_MTD_OOPS is not set
2307
2308 #
2309 # RAM/ROM/Flash chip drivers
2310 @@ -327,6 +377,8 @@
2311 #
2312 # Self-contained MTD device drivers
2313 #
2314 +CONFIG_MTD_DATAFLASH=m
2315 +CONFIG_MTD_M25P80=m
2316 # CONFIG_MTD_SLRAM is not set
2317 # CONFIG_MTD_PHRAM is not set
2318 # CONFIG_MTD_MTDRAM is not set
2319 @@ -345,20 +397,8 @@
2320 # UBI - Unsorted block images
2321 #
2322 # CONFIG_MTD_UBI is not set
2323 -
2324 -#
2325 -# Parallel port support
2326 -#
2327 # CONFIG_PARPORT is not set
2328 -
2329 -#
2330 -# Plug and Play support
2331 -#
2332 -# CONFIG_PNPACPI is not set
2333 -
2334 -#
2335 -# Block devices
2336 -#
2337 +CONFIG_BLK_DEV=y
2338 # CONFIG_BLK_DEV_COW_COMMON is not set
2339 CONFIG_BLK_DEV_LOOP=m
2340 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
2341 @@ -369,42 +409,91 @@
2342 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
2343 # CONFIG_CDROM_PKTCDVD is not set
2344 # CONFIG_ATA_OVER_ETH is not set
2345 -
2346 -#
2347 -# Misc devices
2348 -#
2349 -# CONFIG_BLINK is not set
2350 +CONFIG_MISC_DEVICES=y
2351 +CONFIG_ATMEL_PWM=m
2352 +CONFIG_ATMEL_TCLIB=y
2353 +CONFIG_ATMEL_TCB_CLKSRC=y
2354 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
2355 +# CONFIG_EEPROM_93CX6 is not set
2356 +CONFIG_ATMEL_SSC=m
2357 # CONFIG_IDE is not set
2358
2359 #
2360 # SCSI device support
2361 #
2362 # CONFIG_RAID_ATTRS is not set
2363 -# CONFIG_SCSI is not set
2364 +CONFIG_SCSI=m
2365 +CONFIG_SCSI_DMA=y
2366 +# CONFIG_SCSI_TGT is not set
2367 # CONFIG_SCSI_NETLINK is not set
2368 -# CONFIG_ATA is not set
2369 +# CONFIG_SCSI_PROC_FS is not set
2370
2371 #
2372 -# Multi-device support (RAID and LVM)
2373 +# SCSI support type (disk, tape, CD-ROM)
2374 #
2375 -# CONFIG_MD is not set
2376 +CONFIG_BLK_DEV_SD=m
2377 +# CONFIG_CHR_DEV_ST is not set
2378 +# CONFIG_CHR_DEV_OSST is not set
2379 +CONFIG_BLK_DEV_SR=m
2380 +# CONFIG_BLK_DEV_SR_VENDOR is not set
2381 +# CONFIG_CHR_DEV_SG is not set
2382 +# CONFIG_CHR_DEV_SCH is not set
2383 +
2384 +#
2385 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
2386 +#
2387 +# CONFIG_SCSI_MULTI_LUN is not set
2388 +# CONFIG_SCSI_CONSTANTS is not set
2389 +# CONFIG_SCSI_LOGGING is not set
2390 +# CONFIG_SCSI_SCAN_ASYNC is not set
2391 +CONFIG_SCSI_WAIT_SCAN=m
2392
2393 #
2394 -# Network device support
2395 +# SCSI Transports
2396 #
2397 +# CONFIG_SCSI_SPI_ATTRS is not set
2398 +# CONFIG_SCSI_FC_ATTRS is not set
2399 +# CONFIG_SCSI_ISCSI_ATTRS is not set
2400 +# CONFIG_SCSI_SAS_LIBSAS is not set
2401 +# CONFIG_SCSI_SRP_ATTRS is not set
2402 +# CONFIG_SCSI_LOWLEVEL is not set
2403 +CONFIG_ATA=m
2404 +# CONFIG_ATA_NONSTANDARD is not set
2405 +CONFIG_PATA_AT32=m
2406 +# CONFIG_PATA_PLATFORM is not set
2407 +# CONFIG_MD is not set
2408 CONFIG_NETDEVICES=y
2409 -CONFIG_DUMMY=y
2410 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
2411 +# CONFIG_DUMMY is not set
2412 # CONFIG_BONDING is not set
2413 +# CONFIG_MACVLAN is not set
2414 # CONFIG_EQUALIZER is not set
2415 CONFIG_TUN=m
2416 -# CONFIG_PHYLIB is not set
2417 +# CONFIG_VETH is not set
2418 +CONFIG_PHYLIB=y
2419
2420 #
2421 -# Ethernet (10 or 100Mbit)
2422 +# MII PHY device drivers
2423 #
2424 +# CONFIG_MARVELL_PHY is not set
2425 +# CONFIG_DAVICOM_PHY is not set
2426 +# CONFIG_QSEMI_PHY is not set
2427 +# CONFIG_LXT_PHY is not set
2428 +# CONFIG_CICADA_PHY is not set
2429 +# CONFIG_VITESSE_PHY is not set
2430 +# CONFIG_SMSC_PHY is not set
2431 +# CONFIG_BROADCOM_PHY is not set
2432 +# CONFIG_ICPLUS_PHY is not set
2433 +# CONFIG_FIXED_PHY is not set
2434 +# CONFIG_MDIO_BITBANG is not set
2435 CONFIG_NET_ETHERNET=y
2436 -CONFIG_MII=y
2437 +# CONFIG_MII is not set
2438 CONFIG_MACB=y
2439 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
2440 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
2441 +# CONFIG_IBM_NEW_EMAC_TAH is not set
2442 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
2443 +# CONFIG_B44 is not set
2444 # CONFIG_NETDEV_1000 is not set
2445 # CONFIG_NETDEV_10000 is not set
2446
2447 @@ -423,27 +512,54 @@
2448 CONFIG_PPP_BSDCOMP=m
2449 # CONFIG_PPP_MPPE is not set
2450 # CONFIG_PPPOE is not set
2451 +# CONFIG_PPPOL2TP is not set
2452 # CONFIG_SLIP is not set
2453 CONFIG_SLHC=m
2454 # CONFIG_SHAPER is not set
2455 # CONFIG_NETCONSOLE is not set
2456 # CONFIG_NETPOLL is not set
2457 # CONFIG_NET_POLL_CONTROLLER is not set
2458 -
2459 -#
2460 -# ISDN subsystem
2461 -#
2462 # CONFIG_ISDN is not set
2463 -
2464 -#
2465 -# Telephony Support
2466 -#
2467 # CONFIG_PHONE is not set
2468
2469 #
2470 # Input device support
2471 #
2472 -# CONFIG_INPUT is not set
2473 +CONFIG_INPUT=m
2474 +# CONFIG_INPUT_FF_MEMLESS is not set
2475 +CONFIG_INPUT_POLLDEV=m
2476 +
2477 +#
2478 +# Userland interfaces
2479 +#
2480 +CONFIG_INPUT_MOUSEDEV=m
2481 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
2482 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
2483 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
2484 +# CONFIG_INPUT_JOYDEV is not set
2485 +CONFIG_INPUT_EVDEV=m
2486 +# CONFIG_INPUT_EVBUG is not set
2487 +
2488 +#
2489 +# Input Device Drivers
2490 +#
2491 +CONFIG_INPUT_KEYBOARD=y
2492 +# CONFIG_KEYBOARD_ATKBD is not set
2493 +# CONFIG_KEYBOARD_SUNKBD is not set
2494 +# CONFIG_KEYBOARD_LKKBD is not set
2495 +# CONFIG_KEYBOARD_XTKBD is not set
2496 +# CONFIG_KEYBOARD_NEWTON is not set
2497 +# CONFIG_KEYBOARD_STOWAWAY is not set
2498 +CONFIG_KEYBOARD_GPIO=m
2499 +CONFIG_INPUT_MOUSE=y
2500 +# CONFIG_MOUSE_PS2 is not set
2501 +# CONFIG_MOUSE_SERIAL is not set
2502 +# CONFIG_MOUSE_VSXXXAA is not set
2503 +CONFIG_MOUSE_GPIO=m
2504 +# CONFIG_INPUT_JOYSTICK is not set
2505 +# CONFIG_INPUT_TABLET is not set
2506 +# CONFIG_INPUT_TOUCHSCREEN is not set
2507 +# CONFIG_INPUT_MISC is not set
2508
2509 #
2510 # Hardware I/O ports
2511 @@ -467,40 +583,94 @@
2512 #
2513 CONFIG_SERIAL_ATMEL=y
2514 CONFIG_SERIAL_ATMEL_CONSOLE=y
2515 +CONFIG_SERIAL_ATMEL_PDC=y
2516 # CONFIG_SERIAL_ATMEL_TTYAT is not set
2517 CONFIG_SERIAL_CORE=y
2518 CONFIG_SERIAL_CORE_CONSOLE=y
2519 CONFIG_UNIX98_PTYS=y
2520 # CONFIG_LEGACY_PTYS is not set
2521 -
2522 -#
2523 -# IPMI
2524 -#
2525 # CONFIG_IPMI_HANDLER is not set
2526 -# CONFIG_WATCHDOG is not set
2527 # CONFIG_HW_RANDOM is not set
2528 # CONFIG_RTC is not set
2529 # CONFIG_GEN_RTC is not set
2530 # CONFIG_R3964 is not set
2531 # CONFIG_RAW_DRIVER is not set
2532 +# CONFIG_TCG_TPM is not set
2533 +CONFIG_I2C=m
2534 +CONFIG_I2C_BOARDINFO=y
2535 +CONFIG_I2C_CHARDEV=m
2536 +
2537 +#
2538 +# I2C Algorithms
2539 +#
2540 +CONFIG_I2C_ALGOBIT=m
2541 +# CONFIG_I2C_ALGOPCF is not set
2542 +# CONFIG_I2C_ALGOPCA is not set
2543 +
2544 +#
2545 +# I2C Hardware Bus support
2546 +#
2547 +CONFIG_I2C_ATMELTWI=m
2548 +CONFIG_I2C_GPIO=m
2549 +# CONFIG_I2C_OCORES is not set
2550 +# CONFIG_I2C_PARPORT_LIGHT is not set
2551 +# CONFIG_I2C_SIMTEC is not set
2552 +# CONFIG_I2C_TAOS_EVM is not set
2553 +# CONFIG_I2C_STUB is not set
2554 +
2555 +#
2556 +# Miscellaneous I2C Chip support
2557 +#
2558 +# CONFIG_SENSORS_DS1337 is not set
2559 +# CONFIG_SENSORS_DS1374 is not set
2560 +# CONFIG_DS1682 is not set
2561 +# CONFIG_SENSORS_EEPROM is not set
2562 +# CONFIG_SENSORS_PCF8574 is not set
2563 +# CONFIG_SENSORS_PCA9539 is not set
2564 +# CONFIG_SENSORS_PCF8591 is not set
2565 +# CONFIG_SENSORS_MAX6875 is not set
2566 +# CONFIG_SENSORS_TSL2550 is not set
2567 +# CONFIG_I2C_DEBUG_CORE is not set
2568 +# CONFIG_I2C_DEBUG_ALGO is not set
2569 +# CONFIG_I2C_DEBUG_BUS is not set
2570 +# CONFIG_I2C_DEBUG_CHIP is not set
2571
2572 #
2573 -# TPM devices
2574 +# SPI support
2575 #
2576 -# CONFIG_TCG_TPM is not set
2577 -# CONFIG_I2C is not set
2578 +CONFIG_SPI=y
2579 +# CONFIG_SPI_DEBUG is not set
2580 +CONFIG_SPI_MASTER=y
2581
2582 #
2583 -# SPI support
2584 +# SPI Master Controller Drivers
2585 #
2586 -# CONFIG_SPI is not set
2587 -# CONFIG_SPI_MASTER is not set
2588 +CONFIG_SPI_ATMEL=y
2589 +# CONFIG_SPI_BITBANG is not set
2590
2591 #
2592 -# Dallas's 1-wire bus
2593 +# SPI Protocol Masters
2594 #
2595 +# CONFIG_SPI_AT25 is not set
2596 +CONFIG_SPI_SPIDEV=m
2597 +# CONFIG_SPI_TLE62X0 is not set
2598 # CONFIG_W1 is not set
2599 +# CONFIG_POWER_SUPPLY is not set
2600 # CONFIG_HWMON is not set
2601 +CONFIG_WATCHDOG=y
2602 +# CONFIG_WATCHDOG_NOWAYOUT is not set
2603 +
2604 +#
2605 +# Watchdog Device Drivers
2606 +#
2607 +# CONFIG_SOFT_WATCHDOG is not set
2608 +CONFIG_AT32AP700X_WDT=y
2609 +
2610 +#
2611 +# Sonics Silicon Backplane
2612 +#
2613 +CONFIG_SSB_POSSIBLE=y
2614 +# CONFIG_SSB is not set
2615
2616 #
2617 # Multifunction device drivers
2618 @@ -517,23 +687,104 @@
2619 #
2620 # Graphics support
2621 #
2622 -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
2623 +# CONFIG_VGASTATE is not set
2624 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
2625 +CONFIG_FB=y
2626 +# CONFIG_FIRMWARE_EDID is not set
2627 +# CONFIG_FB_DDC is not set
2628 +CONFIG_FB_CFB_FILLRECT=y
2629 +CONFIG_FB_CFB_COPYAREA=y
2630 +CONFIG_FB_CFB_IMAGEBLIT=y
2631 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
2632 +# CONFIG_FB_SYS_FILLRECT is not set
2633 +# CONFIG_FB_SYS_COPYAREA is not set
2634 +# CONFIG_FB_SYS_IMAGEBLIT is not set
2635 +# CONFIG_FB_SYS_FOPS is not set
2636 +CONFIG_FB_DEFERRED_IO=y
2637 +# CONFIG_FB_SVGALIB is not set
2638 +# CONFIG_FB_MACMODES is not set
2639 +# CONFIG_FB_BACKLIGHT is not set
2640 +# CONFIG_FB_MODE_HELPERS is not set
2641 +# CONFIG_FB_TILEBLITTING is not set
2642 +
2643 +#
2644 +# Frame buffer hardware drivers
2645 +#
2646 +# CONFIG_FB_S1D13XXX is not set
2647 +CONFIG_FB_ATMEL=y
2648 +# CONFIG_FB_VIRTUAL is not set
2649 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
2650 +CONFIG_LCD_CLASS_DEVICE=y
2651 +CONFIG_LCD_LTV350QV=y
2652 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
2653
2654 #
2655 # Display device support
2656 #
2657 # CONFIG_DISPLAY_SUPPORT is not set
2658 -# CONFIG_VGASTATE is not set
2659 -# CONFIG_FB is not set
2660 +# CONFIG_LOGO is not set
2661
2662 #
2663 # Sound
2664 #
2665 -# CONFIG_SOUND is not set
2666 +CONFIG_SOUND=m
2667 +
2668 +#
2669 +# Advanced Linux Sound Architecture
2670 +#
2671 +CONFIG_SND=m
2672 +CONFIG_SND_TIMER=m
2673 +CONFIG_SND_PCM=m
2674 +# CONFIG_SND_SEQUENCER is not set
2675 +CONFIG_SND_OSSEMUL=y
2676 +CONFIG_SND_MIXER_OSS=m
2677 +CONFIG_SND_PCM_OSS=m
2678 +CONFIG_SND_PCM_OSS_PLUGINS=y
2679 +# CONFIG_SND_DYNAMIC_MINORS is not set
2680 +# CONFIG_SND_SUPPORT_OLD_API is not set
2681 +# CONFIG_SND_VERBOSE_PROCFS is not set
2682 +# CONFIG_SND_VERBOSE_PRINTK is not set
2683 +# CONFIG_SND_DEBUG is not set
2684 +
2685 +#
2686 +# Generic devices
2687 +#
2688 +CONFIG_SND_AC97_CODEC=m
2689 +# CONFIG_SND_DUMMY is not set
2690 +# CONFIG_SND_MTPAV is not set
2691 +# CONFIG_SND_SERIAL_U16550 is not set
2692 +# CONFIG_SND_MPU401 is not set
2693 +
2694 +#
2695 +# AVR32 devices
2696 +#
2697 +CONFIG_SND_ATMEL_AC97=m
2698
2699 #
2700 -# USB support
2701 +# SPI devices
2702 #
2703 +CONFIG_SND_AT73C213=m
2704 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
2705 +
2706 +#
2707 +# System on Chip audio support
2708 +#
2709 +# CONFIG_SND_SOC is not set
2710 +
2711 +#
2712 +# SoC Audio support for SuperH
2713 +#
2714 +
2715 +#
2716 +# Open Sound System
2717 +#
2718 +CONFIG_SOUND_PRIME=m
2719 +# CONFIG_SOUND_MSNDCLAS is not set
2720 +# CONFIG_SOUND_MSNDPIN is not set
2721 +CONFIG_SOUND_AT32_ABDAC=m
2722 +CONFIG_AC97_BUS=m
2723 +# CONFIG_HID_SUPPORT is not set
2724 +CONFIG_USB_SUPPORT=y
2725 # CONFIG_USB_ARCH_HAS_HCD is not set
2726 # CONFIG_USB_ARCH_HAS_OHCI is not set
2727 # CONFIG_USB_ARCH_HAS_EHCI is not set
2728 @@ -545,63 +796,137 @@
2729 #
2730 # USB Gadget Support
2731 #
2732 -# CONFIG_USB_GADGET is not set
2733 -# CONFIG_MMC is not set
2734 -
2735 -#
2736 -# LED devices
2737 -#
2738 -# CONFIG_NEW_LEDS is not set
2739 +CONFIG_USB_GADGET=y
2740 +# CONFIG_USB_GADGET_DEBUG is not set
2741 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
2742 +# CONFIG_USB_GADGET_DEBUG_FS is not set
2743 +CONFIG_USB_GADGET_SELECTED=y
2744 +# CONFIG_USB_GADGET_AMD5536UDC is not set
2745 +CONFIG_USB_GADGET_ATMEL_USBA=y
2746 +CONFIG_USB_ATMEL_USBA=y
2747 +# CONFIG_USB_GADGET_FSL_USB2 is not set
2748 +# CONFIG_USB_GADGET_NET2280 is not set
2749 +# CONFIG_USB_GADGET_PXA2XX is not set
2750 +# CONFIG_USB_GADGET_M66592 is not set
2751 +# CONFIG_USB_GADGET_GOKU is not set
2752 +# CONFIG_USB_GADGET_LH7A40X is not set
2753 +# CONFIG_USB_GADGET_OMAP is not set
2754 +# CONFIG_USB_GADGET_S3C2410 is not set
2755 +# CONFIG_USB_GADGET_AT91 is not set
2756 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
2757 +CONFIG_USB_GADGET_DUALSPEED=y
2758 +CONFIG_USB_ZERO=m
2759 +CONFIG_USB_ETH=m
2760 +CONFIG_USB_ETH_RNDIS=y
2761 +CONFIG_USB_GADGETFS=m
2762 +CONFIG_USB_FILE_STORAGE=m
2763 +# CONFIG_USB_FILE_STORAGE_TEST is not set
2764 +CONFIG_USB_G_SERIAL=m
2765 +# CONFIG_USB_MIDI_GADGET is not set
2766 +CONFIG_MMC=y
2767 +# CONFIG_MMC_DEBUG is not set
2768 +# CONFIG_MMC_UNSAFE_RESUME is not set
2769 +
2770 +#
2771 +# MMC/SD Card Drivers
2772 +#
2773 +CONFIG_MMC_BLOCK=y
2774 +# CONFIG_MMC_BLOCK_BOUNCE is not set
2775 +# CONFIG_SDIO_UART is not set
2776 +
2777 +#
2778 +# MMC/SD Host Controller Drivers
2779 +#
2780 +CONFIG_MMC_ATMELMCI=y
2781 +CONFIG_MMC_SPI=m
2782 +CONFIG_NEW_LEDS=y
2783 +CONFIG_LEDS_CLASS=m
2784
2785 #
2786 # LED drivers
2787 #
2788 +CONFIG_LEDS_ATMEL_PWM=m
2789 +CONFIG_LEDS_GPIO=m
2790
2791 #
2792 # LED Triggers
2793 #
2794 +CONFIG_LEDS_TRIGGERS=y
2795 +CONFIG_LEDS_TRIGGER_TIMER=m
2796 +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
2797 +CONFIG_RTC_LIB=y
2798 +CONFIG_RTC_CLASS=y
2799 +CONFIG_RTC_HCTOSYS=y
2800 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
2801 +# CONFIG_RTC_DEBUG is not set
2802
2803 #
2804 -# InfiniBand support
2805 +# RTC interfaces
2806 #
2807 +CONFIG_RTC_INTF_SYSFS=y
2808 +CONFIG_RTC_INTF_PROC=y
2809 +CONFIG_RTC_INTF_DEV=y
2810 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
2811 +# CONFIG_RTC_DRV_TEST is not set
2812
2813 #
2814 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
2815 +# I2C RTC drivers
2816 #
2817 +# CONFIG_RTC_DRV_DS1307 is not set
2818 +# CONFIG_RTC_DRV_DS1374 is not set
2819 +# CONFIG_RTC_DRV_DS1672 is not set
2820 +# CONFIG_RTC_DRV_MAX6900 is not set
2821 +# CONFIG_RTC_DRV_RS5C372 is not set
2822 +# CONFIG_RTC_DRV_ISL1208 is not set
2823 +# CONFIG_RTC_DRV_X1205 is not set
2824 +# CONFIG_RTC_DRV_PCF8563 is not set
2825 +# CONFIG_RTC_DRV_PCF8583 is not set
2826 +# CONFIG_RTC_DRV_M41T80 is not set
2827
2828 #
2829 -# Real Time Clock
2830 +# SPI RTC drivers
2831 #
2832 -# CONFIG_RTC_CLASS is not set
2833 +# CONFIG_RTC_DRV_RS5C348 is not set
2834 +# CONFIG_RTC_DRV_MAX6902 is not set
2835
2836 #
2837 -# DMA Engine support
2838 +# Platform RTC drivers
2839 #
2840 -# CONFIG_DMA_ENGINE is not set
2841 +# CONFIG_RTC_DRV_DS1553 is not set
2842 +# CONFIG_RTC_DRV_STK17TA8 is not set
2843 +# CONFIG_RTC_DRV_DS1742 is not set
2844 +# CONFIG_RTC_DRV_M48T86 is not set
2845 +# CONFIG_RTC_DRV_M48T59 is not set
2846 +# CONFIG_RTC_DRV_V3020 is not set
2847
2848 #
2849 -# DMA Clients
2850 +# on-CPU RTC drivers
2851 #
2852 +CONFIG_RTC_DRV_AT32AP700X=y
2853
2854 #
2855 -# DMA Devices
2856 +# Userspace I/O
2857 #
2858 +# CONFIG_UIO is not set
2859
2860 #
2861 # File systems
2862 #
2863 -CONFIG_EXT2_FS=m
2864 +CONFIG_EXT2_FS=y
2865 # CONFIG_EXT2_FS_XATTR is not set
2866 # CONFIG_EXT2_FS_XIP is not set
2867 -# CONFIG_EXT3_FS is not set
2868 +CONFIG_EXT3_FS=y
2869 +# CONFIG_EXT3_FS_XATTR is not set
2870 # CONFIG_EXT4DEV_FS is not set
2871 +CONFIG_JBD=y
2872 +# CONFIG_JBD_DEBUG is not set
2873 # CONFIG_REISERFS_FS is not set
2874 # CONFIG_JFS_FS is not set
2875 # CONFIG_FS_POSIX_ACL is not set
2876 # CONFIG_XFS_FS is not set
2877 # CONFIG_GFS2_FS is not set
2878 # CONFIG_OCFS2_FS is not set
2879 -CONFIG_MINIX_FS=m
2880 +# CONFIG_MINIX_FS is not set
2881 # CONFIG_ROMFS_FS is not set
2882 CONFIG_INOTIFY=y
2883 CONFIG_INOTIFY_USER=y
2884 @@ -609,7 +934,7 @@
2885 # CONFIG_DNOTIFY is not set
2886 # CONFIG_AUTOFS_FS is not set
2887 # CONFIG_AUTOFS4_FS is not set
2888 -# CONFIG_FUSE_FS is not set
2889 +CONFIG_FUSE_FS=m
2890
2891 #
2892 # CD-ROM/DVD Filesystems
2893 @@ -637,8 +962,7 @@
2894 CONFIG_TMPFS=y
2895 # CONFIG_TMPFS_POSIX_ACL is not set
2896 # CONFIG_HUGETLB_PAGE is not set
2897 -CONFIG_RAMFS=y
2898 -CONFIG_CONFIGFS_FS=m
2899 +CONFIG_CONFIGFS_FS=y
2900
2901 #
2902 # Miscellaneous filesystems
2903 @@ -652,11 +976,12 @@
2904 # CONFIG_EFS_FS is not set
2905 CONFIG_JFFS2_FS=y
2906 CONFIG_JFFS2_FS_DEBUG=0
2907 -CONFIG_JFFS2_FS_WRITEBUFFER=y
2908 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
2909 # CONFIG_JFFS2_SUMMARY is not set
2910 # CONFIG_JFFS2_FS_XATTR is not set
2911 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2912 CONFIG_JFFS2_ZLIB=y
2913 +# CONFIG_JFFS2_LZO is not set
2914 CONFIG_JFFS2_RTIME=y
2915 # CONFIG_JFFS2_RUBIN is not set
2916 # CONFIG_CRAMFS is not set
2917 @@ -665,10 +990,7 @@
2918 # CONFIG_QNX4FS_FS is not set
2919 # CONFIG_SYSV_FS is not set
2920 # CONFIG_UFS_FS is not set
2921 -
2922 -#
2923 -# Network File Systems
2924 -#
2925 +CONFIG_NETWORK_FILESYSTEMS=y
2926 CONFIG_NFS_FS=y
2927 CONFIG_NFS_V3=y
2928 # CONFIG_NFS_V3_ACL is not set
2929 @@ -688,17 +1010,12 @@
2930 # CONFIG_NCP_FS is not set
2931 # CONFIG_CODA_FS is not set
2932 # CONFIG_AFS_FS is not set
2933 -# CONFIG_9P_FS is not set
2934
2935 #
2936 # Partition Types
2937 #
2938 # CONFIG_PARTITION_ADVANCED is not set
2939 CONFIG_MSDOS_PARTITION=y
2940 -
2941 -#
2942 -# Native Language Support
2943 -#
2944 CONFIG_NLS=m
2945 CONFIG_NLS_DEFAULT="iso8859-1"
2946 CONFIG_NLS_CODEPAGE_437=m
2947 @@ -739,17 +1056,18 @@
2948 # CONFIG_NLS_KOI8_R is not set
2949 # CONFIG_NLS_KOI8_U is not set
2950 CONFIG_NLS_UTF8=m
2951 -
2952 -#
2953 -# Distributed Lock Manager
2954 -#
2955 # CONFIG_DLM is not set
2956 +CONFIG_INSTRUMENTATION=y
2957 +CONFIG_PROFILING=y
2958 +CONFIG_OPROFILE=m
2959 +CONFIG_KPROBES=y
2960 +# CONFIG_MARKERS is not set
2961
2962 #
2963 # Kernel hacking
2964 #
2965 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2966 # CONFIG_PRINTK_TIME is not set
2967 +CONFIG_ENABLE_WARN_DEPRECATED=y
2968 CONFIG_ENABLE_MUST_CHECK=y
2969 CONFIG_MAGIC_SYSRQ=y
2970 # CONFIG_UNUSED_SYMBOLS is not set
2971 @@ -758,12 +1076,17 @@
2972 CONFIG_DEBUG_KERNEL=y
2973 # CONFIG_DEBUG_SHIRQ is not set
2974 CONFIG_DETECT_SOFTLOCKUP=y
2975 +CONFIG_SCHED_DEBUG=y
2976 # CONFIG_SCHEDSTATS is not set
2977 # CONFIG_TIMER_STATS is not set
2978 +# CONFIG_SLUB_DEBUG_ON is not set
2979 # CONFIG_DEBUG_RT_MUTEXES is not set
2980 # CONFIG_RT_MUTEX_TESTER is not set
2981 # CONFIG_DEBUG_SPINLOCK is not set
2982 # CONFIG_DEBUG_MUTEXES is not set
2983 +# CONFIG_DEBUG_LOCK_ALLOC is not set
2984 +# CONFIG_PROVE_LOCKING is not set
2985 +# CONFIG_LOCK_STAT is not set
2986 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
2987 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
2988 # CONFIG_DEBUG_KOBJECT is not set
2989 @@ -771,22 +1094,63 @@
2990 # CONFIG_DEBUG_INFO is not set
2991 # CONFIG_DEBUG_VM is not set
2992 # CONFIG_DEBUG_LIST is not set
2993 +# CONFIG_DEBUG_SG is not set
2994 CONFIG_FRAME_POINTER=y
2995 CONFIG_FORCED_INLINING=y
2996 +# CONFIG_BOOT_PRINTK_DELAY is not set
2997 # CONFIG_RCU_TORTURE_TEST is not set
2998 +# CONFIG_LKDTM is not set
2999 # CONFIG_FAULT_INJECTION is not set
3000 -# CONFIG_KPROBES is not set
3001 +# CONFIG_SAMPLES is not set
3002
3003 #
3004 # Security options
3005 #
3006 # CONFIG_KEYS is not set
3007 # CONFIG_SECURITY is not set
3008 -
3009 -#
3010 -# Cryptographic options
3011 -#
3012 -# CONFIG_CRYPTO is not set
3013 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
3014 +CONFIG_CRYPTO=y
3015 +CONFIG_CRYPTO_ALGAPI=m
3016 +CONFIG_CRYPTO_BLKCIPHER=m
3017 +CONFIG_CRYPTO_HASH=m
3018 +CONFIG_CRYPTO_MANAGER=m
3019 +CONFIG_CRYPTO_HMAC=m
3020 +# CONFIG_CRYPTO_XCBC is not set
3021 +# CONFIG_CRYPTO_NULL is not set
3022 +# CONFIG_CRYPTO_MD4 is not set
3023 +CONFIG_CRYPTO_MD5=m
3024 +CONFIG_CRYPTO_SHA1=m
3025 +# CONFIG_CRYPTO_SHA256 is not set
3026 +# CONFIG_CRYPTO_SHA512 is not set
3027 +# CONFIG_CRYPTO_WP512 is not set
3028 +# CONFIG_CRYPTO_TGR192 is not set
3029 +# CONFIG_CRYPTO_GF128MUL is not set
3030 +# CONFIG_CRYPTO_ECB is not set
3031 +CONFIG_CRYPTO_CBC=m
3032 +# CONFIG_CRYPTO_PCBC is not set
3033 +# CONFIG_CRYPTO_LRW is not set
3034 +# CONFIG_CRYPTO_XTS is not set
3035 +# CONFIG_CRYPTO_CRYPTD is not set
3036 +CONFIG_CRYPTO_DES=m
3037 +# CONFIG_CRYPTO_FCRYPT is not set
3038 +# CONFIG_CRYPTO_BLOWFISH is not set
3039 +# CONFIG_CRYPTO_TWOFISH is not set
3040 +# CONFIG_CRYPTO_SERPENT is not set
3041 +# CONFIG_CRYPTO_AES is not set
3042 +# CONFIG_CRYPTO_CAST5 is not set
3043 +# CONFIG_CRYPTO_CAST6 is not set
3044 +# CONFIG_CRYPTO_TEA is not set
3045 +# CONFIG_CRYPTO_ARC4 is not set
3046 +# CONFIG_CRYPTO_KHAZAD is not set
3047 +# CONFIG_CRYPTO_ANUBIS is not set
3048 +# CONFIG_CRYPTO_SEED is not set
3049 +CONFIG_CRYPTO_DEFLATE=m
3050 +# CONFIG_CRYPTO_MICHAEL_MIC is not set
3051 +# CONFIG_CRYPTO_CRC32C is not set
3052 +# CONFIG_CRYPTO_CAMELLIA is not set
3053 +# CONFIG_CRYPTO_TEST is not set
3054 +# CONFIG_CRYPTO_AUTHENC is not set
3055 +# CONFIG_CRYPTO_HW is not set
3056
3057 #
3058 # Library routines
3059 @@ -794,10 +1158,10 @@
3060 CONFIG_BITREVERSE=y
3061 CONFIG_CRC_CCITT=m
3062 # CONFIG_CRC16 is not set
3063 -# CONFIG_CRC_ITU_T is not set
3064 +CONFIG_CRC_ITU_T=m
3065 CONFIG_CRC32=y
3066 +CONFIG_CRC7=m
3067 # CONFIG_LIBCRC32C is not set
3068 -CONFIG_AUDIT_GENERIC=y
3069 CONFIG_ZLIB_INFLATE=y
3070 CONFIG_ZLIB_DEFLATE=y
3071 CONFIG_PLIST=y
3072 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1003_defconfig avr32-2.6/arch/avr32/configs/atstk1003_defconfig
3073 --- linux-2.6.24.3/arch/avr32/configs/atstk1003_defconfig 1970-01-01 01:00:00.000000000 +0100
3074 +++ avr32-2.6/arch/avr32/configs/atstk1003_defconfig 2008-04-23 20:12:35.000000000 +0200
3075 @@ -0,0 +1,1041 @@
3076 +#
3077 +# Automatically generated make config: don't edit
3078 +# Linux kernel version: 2.6.24
3079 +# Thu Mar 6 12:50:27 2008
3080 +#
3081 +CONFIG_AVR32=y
3082 +CONFIG_GENERIC_GPIO=y
3083 +CONFIG_GENERIC_HARDIRQS=y
3084 +CONFIG_STACKTRACE_SUPPORT=y
3085 +CONFIG_LOCKDEP_SUPPORT=y
3086 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
3087 +CONFIG_HARDIRQS_SW_RESEND=y
3088 +CONFIG_GENERIC_IRQ_PROBE=y
3089 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
3090 +CONFIG_GENERIC_TIME=y
3091 +CONFIG_GENERIC_CLOCKEVENTS=y
3092 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
3093 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
3094 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
3095 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
3096 +CONFIG_GENERIC_HWEIGHT=y
3097 +CONFIG_GENERIC_CALIBRATE_DELAY=y
3098 +CONFIG_GENERIC_BUG=y
3099 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
3100 +
3101 +#
3102 +# General setup
3103 +#
3104 +CONFIG_EXPERIMENTAL=y
3105 +CONFIG_BROKEN_ON_SMP=y
3106 +CONFIG_INIT_ENV_ARG_LIMIT=32
3107 +CONFIG_LOCALVERSION=""
3108 +# CONFIG_LOCALVERSION_AUTO is not set
3109 +CONFIG_SWAP=y
3110 +CONFIG_SYSVIPC=y
3111 +CONFIG_SYSVIPC_SYSCTL=y
3112 +CONFIG_POSIX_MQUEUE=y
3113 +CONFIG_BSD_PROCESS_ACCT=y
3114 +CONFIG_BSD_PROCESS_ACCT_V3=y
3115 +CONFIG_TASKSTATS=y
3116 +CONFIG_TASK_DELAY_ACCT=y
3117 +# CONFIG_TASK_XACCT is not set
3118 +# CONFIG_USER_NS is not set
3119 +# CONFIG_PID_NS is not set
3120 +CONFIG_AUDIT=y
3121 +# CONFIG_IKCONFIG is not set
3122 +CONFIG_LOG_BUF_SHIFT=14
3123 +# CONFIG_CGROUPS is not set
3124 +CONFIG_FAIR_GROUP_SCHED=y
3125 +CONFIG_FAIR_USER_SCHED=y
3126 +# CONFIG_FAIR_CGROUP_SCHED is not set
3127 +CONFIG_SYSFS_DEPRECATED=y
3128 +CONFIG_RELAY=y
3129 +CONFIG_BLK_DEV_INITRD=y
3130 +CONFIG_INITRAMFS_SOURCE=""
3131 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
3132 +CONFIG_SYSCTL=y
3133 +CONFIG_EMBEDDED=y
3134 +# CONFIG_SYSCTL_SYSCALL is not set
3135 +CONFIG_KALLSYMS=y
3136 +# CONFIG_KALLSYMS_ALL is not set
3137 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
3138 +CONFIG_HOTPLUG=y
3139 +CONFIG_PRINTK=y
3140 +CONFIG_BUG=y
3141 +CONFIG_ELF_CORE=y
3142 +# CONFIG_BASE_FULL is not set
3143 +CONFIG_FUTEX=y
3144 +CONFIG_ANON_INODES=y
3145 +CONFIG_EPOLL=y
3146 +CONFIG_SIGNALFD=y
3147 +CONFIG_EVENTFD=y
3148 +CONFIG_SHMEM=y
3149 +CONFIG_VM_EVENT_COUNTERS=y
3150 +# CONFIG_SLUB_DEBUG is not set
3151 +# CONFIG_SLAB is not set
3152 +CONFIG_SLUB=y
3153 +# CONFIG_SLOB is not set
3154 +CONFIG_SLABINFO=y
3155 +CONFIG_RT_MUTEXES=y
3156 +# CONFIG_TINY_SHMEM is not set
3157 +CONFIG_BASE_SMALL=1
3158 +CONFIG_MODULES=y
3159 +CONFIG_MODULE_UNLOAD=y
3160 +# CONFIG_MODULE_FORCE_UNLOAD is not set
3161 +# CONFIG_MODVERSIONS is not set
3162 +# CONFIG_MODULE_SRCVERSION_ALL is not set
3163 +# CONFIG_KMOD is not set
3164 +CONFIG_BLOCK=y
3165 +# CONFIG_LBD is not set
3166 +# CONFIG_BLK_DEV_IO_TRACE is not set
3167 +# CONFIG_LSF is not set
3168 +# CONFIG_BLK_DEV_BSG is not set
3169 +
3170 +#
3171 +# IO Schedulers
3172 +#
3173 +CONFIG_IOSCHED_NOOP=y
3174 +# CONFIG_IOSCHED_AS is not set
3175 +# CONFIG_IOSCHED_DEADLINE is not set
3176 +CONFIG_IOSCHED_CFQ=y
3177 +# CONFIG_DEFAULT_AS is not set
3178 +# CONFIG_DEFAULT_DEADLINE is not set
3179 +CONFIG_DEFAULT_CFQ=y
3180 +# CONFIG_DEFAULT_NOOP is not set
3181 +CONFIG_DEFAULT_IOSCHED="cfq"
3182 +
3183 +#
3184 +# System Type and features
3185 +#
3186 +CONFIG_TICK_ONESHOT=y
3187 +CONFIG_NO_HZ=y
3188 +CONFIG_HIGH_RES_TIMERS=y
3189 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
3190 +CONFIG_SUBARCH_AVR32B=y
3191 +CONFIG_MMU=y
3192 +CONFIG_PERFORMANCE_COUNTERS=y
3193 +CONFIG_PLATFORM_AT32AP=y
3194 +CONFIG_CPU_AT32AP700X=y
3195 +CONFIG_CPU_AT32AP7001=y
3196 +CONFIG_BOARD_ATSTK1000=y
3197 +# CONFIG_BOARD_ATNGW100 is not set
3198 +# CONFIG_BOARD_ATSTK1002 is not set
3199 +CONFIG_BOARD_ATSTK1003=y
3200 +# CONFIG_BOARD_ATSTK1004 is not set
3201 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
3202 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
3203 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
3204 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
3205 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
3206 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
3207 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
3208 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
3209 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
3210 +CONFIG_LOADER_U_BOOT=y
3211 +
3212 +#
3213 +# Atmel AVR32 AP options
3214 +#
3215 +# CONFIG_AP700X_32_BIT_SMC is not set
3216 +CONFIG_AP700X_16_BIT_SMC=y
3217 +# CONFIG_AP700X_8_BIT_SMC is not set
3218 +CONFIG_GPIO_DEV=y
3219 +CONFIG_LOAD_ADDRESS=0x10000000
3220 +CONFIG_ENTRY_ADDRESS=0x90000000
3221 +CONFIG_PHYS_OFFSET=0x10000000
3222 +CONFIG_PREEMPT_NONE=y
3223 +# CONFIG_PREEMPT_VOLUNTARY is not set
3224 +# CONFIG_PREEMPT is not set
3225 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
3226 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
3227 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
3228 +CONFIG_ARCH_FLATMEM_ENABLE=y
3229 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
3230 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
3231 +CONFIG_SELECT_MEMORY_MODEL=y
3232 +CONFIG_FLATMEM_MANUAL=y
3233 +# CONFIG_DISCONTIGMEM_MANUAL is not set
3234 +# CONFIG_SPARSEMEM_MANUAL is not set
3235 +CONFIG_FLATMEM=y
3236 +CONFIG_FLAT_NODE_MEM_MAP=y
3237 +# CONFIG_SPARSEMEM_STATIC is not set
3238 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
3239 +CONFIG_SPLIT_PTLOCK_CPUS=4
3240 +# CONFIG_RESOURCES_64BIT is not set
3241 +CONFIG_ZONE_DMA_FLAG=0
3242 +CONFIG_VIRT_TO_BUS=y
3243 +# CONFIG_OWNERSHIP_TRACE is not set
3244 +CONFIG_NMI_DEBUGGING=y
3245 +CONFIG_DW_DMAC=y
3246 +# CONFIG_HZ_100 is not set
3247 +CONFIG_HZ_250=y
3248 +# CONFIG_HZ_300 is not set
3249 +# CONFIG_HZ_1000 is not set
3250 +CONFIG_HZ=250
3251 +CONFIG_CMDLINE=""
3252 +
3253 +#
3254 +# Power management options
3255 +#
3256 +
3257 +#
3258 +# CPU Frequency scaling
3259 +#
3260 +CONFIG_CPU_FREQ=y
3261 +CONFIG_CPU_FREQ_TABLE=y
3262 +# CONFIG_CPU_FREQ_DEBUG is not set
3263 +# CONFIG_CPU_FREQ_STAT is not set
3264 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
3265 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
3266 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
3267 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
3268 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
3269 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
3270 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
3271 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
3272 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
3273 +CONFIG_CPU_FREQ_AT32AP=y
3274 +
3275 +#
3276 +# Bus options
3277 +#
3278 +# CONFIG_ARCH_SUPPORTS_MSI is not set
3279 +# CONFIG_PCCARD is not set
3280 +
3281 +#
3282 +# Executable file formats
3283 +#
3284 +CONFIG_BINFMT_ELF=y
3285 +# CONFIG_BINFMT_MISC is not set
3286 +
3287 +#
3288 +# Networking
3289 +#
3290 +CONFIG_NET=y
3291 +
3292 +#
3293 +# Networking options
3294 +#
3295 +CONFIG_PACKET=y
3296 +CONFIG_PACKET_MMAP=y
3297 +CONFIG_UNIX=y
3298 +# CONFIG_NET_KEY is not set
3299 +CONFIG_INET=y
3300 +# CONFIG_IP_MULTICAST is not set
3301 +# CONFIG_IP_ADVANCED_ROUTER is not set
3302 +CONFIG_IP_FIB_HASH=y
3303 +# CONFIG_IP_PNP is not set
3304 +# CONFIG_NET_IPIP is not set
3305 +# CONFIG_NET_IPGRE is not set
3306 +# CONFIG_ARPD is not set
3307 +# CONFIG_SYN_COOKIES is not set
3308 +# CONFIG_INET_AH is not set
3309 +# CONFIG_INET_ESP is not set
3310 +# CONFIG_INET_IPCOMP is not set
3311 +# CONFIG_INET_XFRM_TUNNEL is not set
3312 +# CONFIG_INET_TUNNEL is not set
3313 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
3314 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
3315 +# CONFIG_INET_XFRM_MODE_BEET is not set
3316 +# CONFIG_INET_LRO is not set
3317 +# CONFIG_INET_DIAG is not set
3318 +# CONFIG_TCP_CONG_ADVANCED is not set
3319 +CONFIG_TCP_CONG_CUBIC=y
3320 +CONFIG_DEFAULT_TCP_CONG="cubic"
3321 +# CONFIG_TCP_MD5SIG is not set
3322 +# CONFIG_IPV6 is not set
3323 +# CONFIG_INET6_XFRM_TUNNEL is not set
3324 +# CONFIG_INET6_TUNNEL is not set
3325 +# CONFIG_NETWORK_SECMARK is not set
3326 +# CONFIG_NETFILTER is not set
3327 +# CONFIG_IP_DCCP is not set
3328 +# CONFIG_IP_SCTP is not set
3329 +# CONFIG_TIPC is not set
3330 +# CONFIG_ATM is not set
3331 +# CONFIG_BRIDGE is not set
3332 +# CONFIG_VLAN_8021Q is not set
3333 +# CONFIG_DECNET is not set
3334 +# CONFIG_LLC2 is not set
3335 +# CONFIG_IPX is not set
3336 +# CONFIG_ATALK is not set
3337 +# CONFIG_X25 is not set
3338 +# CONFIG_LAPB is not set
3339 +# CONFIG_ECONET is not set
3340 +# CONFIG_WAN_ROUTER is not set
3341 +# CONFIG_NET_SCHED is not set
3342 +
3343 +#
3344 +# Network testing
3345 +#
3346 +# CONFIG_NET_PKTGEN is not set
3347 +# CONFIG_NET_TCPPROBE is not set
3348 +# CONFIG_HAMRADIO is not set
3349 +# CONFIG_IRDA is not set
3350 +# CONFIG_BT is not set
3351 +# CONFIG_AF_RXRPC is not set
3352 +
3353 +#
3354 +# Wireless
3355 +#
3356 +# CONFIG_CFG80211 is not set
3357 +# CONFIG_WIRELESS_EXT is not set
3358 +# CONFIG_MAC80211 is not set
3359 +# CONFIG_IEEE80211 is not set
3360 +# CONFIG_RFKILL is not set
3361 +# CONFIG_NET_9P is not set
3362 +
3363 +#
3364 +# Device Drivers
3365 +#
3366 +
3367 +#
3368 +# Generic Driver Options
3369 +#
3370 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
3371 +CONFIG_STANDALONE=y
3372 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
3373 +# CONFIG_FW_LOADER is not set
3374 +# CONFIG_DEBUG_DRIVER is not set
3375 +# CONFIG_DEBUG_DEVRES is not set
3376 +# CONFIG_SYS_HYPERVISOR is not set
3377 +# CONFIG_CONNECTOR is not set
3378 +CONFIG_MTD=y
3379 +# CONFIG_MTD_DEBUG is not set
3380 +# CONFIG_MTD_CONCAT is not set
3381 +CONFIG_MTD_PARTITIONS=y
3382 +# CONFIG_MTD_REDBOOT_PARTS is not set
3383 +CONFIG_MTD_CMDLINE_PARTS=y
3384 +
3385 +#
3386 +# User Modules And Translation Layers
3387 +#
3388 +CONFIG_MTD_CHAR=y
3389 +CONFIG_MTD_BLKDEVS=y
3390 +CONFIG_MTD_BLOCK=y
3391 +# CONFIG_FTL is not set
3392 +# CONFIG_NFTL is not set
3393 +# CONFIG_INFTL is not set
3394 +# CONFIG_RFD_FTL is not set
3395 +# CONFIG_SSFDC is not set
3396 +# CONFIG_MTD_OOPS is not set
3397 +
3398 +#
3399 +# RAM/ROM/Flash chip drivers
3400 +#
3401 +CONFIG_MTD_CFI=y
3402 +# CONFIG_MTD_JEDECPROBE is not set
3403 +CONFIG_MTD_GEN_PROBE=y
3404 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
3405 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
3406 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
3407 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
3408 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
3409 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
3410 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
3411 +CONFIG_MTD_CFI_I1=y
3412 +CONFIG_MTD_CFI_I2=y
3413 +# CONFIG_MTD_CFI_I4 is not set
3414 +# CONFIG_MTD_CFI_I8 is not set
3415 +# CONFIG_MTD_CFI_INTELEXT is not set
3416 +CONFIG_MTD_CFI_AMDSTD=y
3417 +# CONFIG_MTD_CFI_STAA is not set
3418 +CONFIG_MTD_CFI_UTIL=y
3419 +# CONFIG_MTD_RAM is not set
3420 +# CONFIG_MTD_ROM is not set
3421 +# CONFIG_MTD_ABSENT is not set
3422 +
3423 +#
3424 +# Mapping drivers for chip access
3425 +#
3426 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
3427 +CONFIG_MTD_PHYSMAP=y
3428 +CONFIG_MTD_PHYSMAP_START=0x8000000
3429 +CONFIG_MTD_PHYSMAP_LEN=0x0
3430 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
3431 +# CONFIG_MTD_PLATRAM is not set
3432 +
3433 +#
3434 +# Self-contained MTD device drivers
3435 +#
3436 +CONFIG_MTD_DATAFLASH=m
3437 +CONFIG_MTD_M25P80=m
3438 +# CONFIG_MTD_SLRAM is not set
3439 +# CONFIG_MTD_PHRAM is not set
3440 +# CONFIG_MTD_MTDRAM is not set
3441 +# CONFIG_MTD_BLOCK2MTD is not set
3442 +
3443 +#
3444 +# Disk-On-Chip Device Drivers
3445 +#
3446 +# CONFIG_MTD_DOC2000 is not set
3447 +# CONFIG_MTD_DOC2001 is not set
3448 +# CONFIG_MTD_DOC2001PLUS is not set
3449 +# CONFIG_MTD_NAND is not set
3450 +# CONFIG_MTD_ONENAND is not set
3451 +
3452 +#
3453 +# UBI - Unsorted block images
3454 +#
3455 +# CONFIG_MTD_UBI is not set
3456 +# CONFIG_PARPORT is not set
3457 +CONFIG_BLK_DEV=y
3458 +# CONFIG_BLK_DEV_COW_COMMON is not set
3459 +CONFIG_BLK_DEV_LOOP=m
3460 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
3461 +CONFIG_BLK_DEV_NBD=m
3462 +CONFIG_BLK_DEV_RAM=m
3463 +CONFIG_BLK_DEV_RAM_COUNT=16
3464 +CONFIG_BLK_DEV_RAM_SIZE=4096
3465 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
3466 +# CONFIG_CDROM_PKTCDVD is not set
3467 +# CONFIG_ATA_OVER_ETH is not set
3468 +CONFIG_MISC_DEVICES=y
3469 +CONFIG_ATMEL_PWM=m
3470 +CONFIG_ATMEL_TCLIB=y
3471 +CONFIG_ATMEL_TCB_CLKSRC=y
3472 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
3473 +# CONFIG_EEPROM_93CX6 is not set
3474 +CONFIG_ATMEL_SSC=m
3475 +# CONFIG_IDE is not set
3476 +
3477 +#
3478 +# SCSI device support
3479 +#
3480 +# CONFIG_RAID_ATTRS is not set
3481 +CONFIG_SCSI=m
3482 +CONFIG_SCSI_DMA=y
3483 +# CONFIG_SCSI_TGT is not set
3484 +# CONFIG_SCSI_NETLINK is not set
3485 +# CONFIG_SCSI_PROC_FS is not set
3486 +
3487 +#
3488 +# SCSI support type (disk, tape, CD-ROM)
3489 +#
3490 +CONFIG_BLK_DEV_SD=m
3491 +# CONFIG_CHR_DEV_ST is not set
3492 +# CONFIG_CHR_DEV_OSST is not set
3493 +CONFIG_BLK_DEV_SR=m
3494 +# CONFIG_BLK_DEV_SR_VENDOR is not set
3495 +# CONFIG_CHR_DEV_SG is not set
3496 +# CONFIG_CHR_DEV_SCH is not set
3497 +
3498 +#
3499 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
3500 +#
3501 +# CONFIG_SCSI_MULTI_LUN is not set
3502 +# CONFIG_SCSI_CONSTANTS is not set
3503 +# CONFIG_SCSI_LOGGING is not set
3504 +# CONFIG_SCSI_SCAN_ASYNC is not set
3505 +CONFIG_SCSI_WAIT_SCAN=m
3506 +
3507 +#
3508 +# SCSI Transports
3509 +#
3510 +# CONFIG_SCSI_SPI_ATTRS is not set
3511 +# CONFIG_SCSI_FC_ATTRS is not set
3512 +# CONFIG_SCSI_ISCSI_ATTRS is not set
3513 +# CONFIG_SCSI_SAS_LIBSAS is not set
3514 +# CONFIG_SCSI_SRP_ATTRS is not set
3515 +CONFIG_SCSI_LOWLEVEL=y
3516 +# CONFIG_ISCSI_TCP is not set
3517 +# CONFIG_SCSI_DEBUG is not set
3518 +CONFIG_ATA=m
3519 +# CONFIG_ATA_NONSTANDARD is not set
3520 +CONFIG_PATA_AT32=m
3521 +# CONFIG_PATA_PLATFORM is not set
3522 +# CONFIG_MD is not set
3523 +CONFIG_NETDEVICES=y
3524 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
3525 +# CONFIG_DUMMY is not set
3526 +# CONFIG_BONDING is not set
3527 +# CONFIG_MACVLAN is not set
3528 +# CONFIG_EQUALIZER is not set
3529 +# CONFIG_TUN is not set
3530 +# CONFIG_VETH is not set
3531 +# CONFIG_NET_ETHERNET is not set
3532 +# CONFIG_NETDEV_1000 is not set
3533 +# CONFIG_NETDEV_10000 is not set
3534 +
3535 +#
3536 +# Wireless LAN
3537 +#
3538 +# CONFIG_WLAN_PRE80211 is not set
3539 +# CONFIG_WLAN_80211 is not set
3540 +# CONFIG_WAN is not set
3541 +CONFIG_PPP=m
3542 +# CONFIG_PPP_MULTILINK is not set
3543 +# CONFIG_PPP_FILTER is not set
3544 +CONFIG_PPP_ASYNC=m
3545 +# CONFIG_PPP_SYNC_TTY is not set
3546 +CONFIG_PPP_DEFLATE=m
3547 +CONFIG_PPP_BSDCOMP=m
3548 +# CONFIG_PPP_MPPE is not set
3549 +# CONFIG_PPPOE is not set
3550 +# CONFIG_PPPOL2TP is not set
3551 +# CONFIG_SLIP is not set
3552 +CONFIG_SLHC=m
3553 +# CONFIG_SHAPER is not set
3554 +# CONFIG_NETCONSOLE is not set
3555 +# CONFIG_NETPOLL is not set
3556 +# CONFIG_NET_POLL_CONTROLLER is not set
3557 +# CONFIG_ISDN is not set
3558 +# CONFIG_PHONE is not set
3559 +
3560 +#
3561 +# Input device support
3562 +#
3563 +CONFIG_INPUT=m
3564 +# CONFIG_INPUT_FF_MEMLESS is not set
3565 +CONFIG_INPUT_POLLDEV=m
3566 +
3567 +#
3568 +# Userland interfaces
3569 +#
3570 +CONFIG_INPUT_MOUSEDEV=m
3571 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
3572 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
3573 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
3574 +# CONFIG_INPUT_JOYDEV is not set
3575 +# CONFIG_INPUT_EVDEV is not set
3576 +# CONFIG_INPUT_EVBUG is not set
3577 +
3578 +#
3579 +# Input Device Drivers
3580 +#
3581 +CONFIG_INPUT_KEYBOARD=y
3582 +# CONFIG_KEYBOARD_ATKBD is not set
3583 +# CONFIG_KEYBOARD_SUNKBD is not set
3584 +# CONFIG_KEYBOARD_LKKBD is not set
3585 +# CONFIG_KEYBOARD_XTKBD is not set
3586 +# CONFIG_KEYBOARD_NEWTON is not set
3587 +# CONFIG_KEYBOARD_STOWAWAY is not set
3588 +CONFIG_KEYBOARD_GPIO=m
3589 +CONFIG_INPUT_MOUSE=y
3590 +# CONFIG_MOUSE_PS2 is not set
3591 +# CONFIG_MOUSE_SERIAL is not set
3592 +# CONFIG_MOUSE_VSXXXAA is not set
3593 +CONFIG_MOUSE_GPIO=m
3594 +# CONFIG_INPUT_JOYSTICK is not set
3595 +# CONFIG_INPUT_TABLET is not set
3596 +# CONFIG_INPUT_TOUCHSCREEN is not set
3597 +# CONFIG_INPUT_MISC is not set
3598 +
3599 +#
3600 +# Hardware I/O ports
3601 +#
3602 +# CONFIG_SERIO is not set
3603 +# CONFIG_GAMEPORT is not set
3604 +
3605 +#
3606 +# Character devices
3607 +#
3608 +# CONFIG_VT is not set
3609 +# CONFIG_SERIAL_NONSTANDARD is not set
3610 +
3611 +#
3612 +# Serial drivers
3613 +#
3614 +# CONFIG_SERIAL_8250 is not set
3615 +
3616 +#
3617 +# Non-8250 serial port support
3618 +#
3619 +CONFIG_SERIAL_ATMEL=y
3620 +CONFIG_SERIAL_ATMEL_CONSOLE=y
3621 +CONFIG_SERIAL_ATMEL_PDC=y
3622 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
3623 +CONFIG_SERIAL_CORE=y
3624 +CONFIG_SERIAL_CORE_CONSOLE=y
3625 +CONFIG_UNIX98_PTYS=y
3626 +# CONFIG_LEGACY_PTYS is not set
3627 +# CONFIG_IPMI_HANDLER is not set
3628 +# CONFIG_HW_RANDOM is not set
3629 +# CONFIG_RTC is not set
3630 +# CONFIG_GEN_RTC is not set
3631 +# CONFIG_R3964 is not set
3632 +# CONFIG_RAW_DRIVER is not set
3633 +# CONFIG_TCG_TPM is not set
3634 +CONFIG_I2C=m
3635 +CONFIG_I2C_BOARDINFO=y
3636 +CONFIG_I2C_CHARDEV=m
3637 +
3638 +#
3639 +# I2C Algorithms
3640 +#
3641 +CONFIG_I2C_ALGOBIT=m
3642 +# CONFIG_I2C_ALGOPCF is not set
3643 +# CONFIG_I2C_ALGOPCA is not set
3644 +
3645 +#
3646 +# I2C Hardware Bus support
3647 +#
3648 +CONFIG_I2C_ATMELTWI=m
3649 +CONFIG_I2C_GPIO=m
3650 +# CONFIG_I2C_OCORES is not set
3651 +# CONFIG_I2C_PARPORT_LIGHT is not set
3652 +# CONFIG_I2C_SIMTEC is not set
3653 +# CONFIG_I2C_TAOS_EVM is not set
3654 +# CONFIG_I2C_STUB is not set
3655 +
3656 +#
3657 +# Miscellaneous I2C Chip support
3658 +#
3659 +# CONFIG_SENSORS_DS1337 is not set
3660 +# CONFIG_SENSORS_DS1374 is not set
3661 +# CONFIG_DS1682 is not set
3662 +# CONFIG_SENSORS_EEPROM is not set
3663 +# CONFIG_SENSORS_PCF8574 is not set
3664 +# CONFIG_SENSORS_PCA9539 is not set
3665 +# CONFIG_SENSORS_PCF8591 is not set
3666 +# CONFIG_SENSORS_MAX6875 is not set
3667 +# CONFIG_SENSORS_TSL2550 is not set
3668 +# CONFIG_I2C_DEBUG_CORE is not set
3669 +# CONFIG_I2C_DEBUG_ALGO is not set
3670 +# CONFIG_I2C_DEBUG_BUS is not set
3671 +# CONFIG_I2C_DEBUG_CHIP is not set
3672 +
3673 +#
3674 +# SPI support
3675 +#
3676 +CONFIG_SPI=y
3677 +# CONFIG_SPI_DEBUG is not set
3678 +CONFIG_SPI_MASTER=y
3679 +
3680 +#
3681 +# SPI Master Controller Drivers
3682 +#
3683 +CONFIG_SPI_ATMEL=y
3684 +# CONFIG_SPI_BITBANG is not set
3685 +
3686 +#
3687 +# SPI Protocol Masters
3688 +#
3689 +# CONFIG_SPI_AT25 is not set
3690 +CONFIG_SPI_SPIDEV=m
3691 +# CONFIG_SPI_TLE62X0 is not set
3692 +# CONFIG_W1 is not set
3693 +# CONFIG_POWER_SUPPLY is not set
3694 +# CONFIG_HWMON is not set
3695 +CONFIG_WATCHDOG=y
3696 +# CONFIG_WATCHDOG_NOWAYOUT is not set
3697 +
3698 +#
3699 +# Watchdog Device Drivers
3700 +#
3701 +# CONFIG_SOFT_WATCHDOG is not set
3702 +CONFIG_AT32AP700X_WDT=y
3703 +
3704 +#
3705 +# Sonics Silicon Backplane
3706 +#
3707 +CONFIG_SSB_POSSIBLE=y
3708 +# CONFIG_SSB is not set
3709 +
3710 +#
3711 +# Multifunction device drivers
3712 +#
3713 +# CONFIG_MFD_SM501 is not set
3714 +
3715 +#
3716 +# Multimedia devices
3717 +#
3718 +# CONFIG_VIDEO_DEV is not set
3719 +# CONFIG_DVB_CORE is not set
3720 +# CONFIG_DAB is not set
3721 +
3722 +#
3723 +# Graphics support
3724 +#
3725 +# CONFIG_VGASTATE is not set
3726 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
3727 +# CONFIG_FB is not set
3728 +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
3729 +
3730 +#
3731 +# Display device support
3732 +#
3733 +# CONFIG_DISPLAY_SUPPORT is not set
3734 +
3735 +#
3736 +# Sound
3737 +#
3738 +CONFIG_SOUND=m
3739 +
3740 +#
3741 +# Advanced Linux Sound Architecture
3742 +#
3743 +CONFIG_SND=m
3744 +CONFIG_SND_TIMER=m
3745 +CONFIG_SND_PCM=m
3746 +# CONFIG_SND_SEQUENCER is not set
3747 +CONFIG_SND_OSSEMUL=y
3748 +CONFIG_SND_MIXER_OSS=m
3749 +CONFIG_SND_PCM_OSS=m
3750 +CONFIG_SND_PCM_OSS_PLUGINS=y
3751 +# CONFIG_SND_DYNAMIC_MINORS is not set
3752 +CONFIG_SND_SUPPORT_OLD_API=y
3753 +CONFIG_SND_VERBOSE_PROCFS=y
3754 +# CONFIG_SND_VERBOSE_PRINTK is not set
3755 +# CONFIG_SND_DEBUG is not set
3756 +
3757 +#
3758 +# Generic devices
3759 +#
3760 +CONFIG_SND_AC97_CODEC=m
3761 +# CONFIG_SND_DUMMY is not set
3762 +# CONFIG_SND_MTPAV is not set
3763 +# CONFIG_SND_SERIAL_U16550 is not set
3764 +# CONFIG_SND_MPU401 is not set
3765 +
3766 +#
3767 +# AVR32 devices
3768 +#
3769 +CONFIG_SND_ATMEL_AC97=m
3770 +
3771 +#
3772 +# SPI devices
3773 +#
3774 +CONFIG_SND_AT73C213=m
3775 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
3776 +
3777 +#
3778 +# System on Chip audio support
3779 +#
3780 +# CONFIG_SND_SOC is not set
3781 +
3782 +#
3783 +# SoC Audio support for SuperH
3784 +#
3785 +
3786 +#
3787 +# Open Sound System
3788 +#
3789 +# CONFIG_SOUND_PRIME is not set
3790 +CONFIG_AC97_BUS=m
3791 +# CONFIG_HID_SUPPORT is not set
3792 +CONFIG_USB_SUPPORT=y
3793 +# CONFIG_USB_ARCH_HAS_HCD is not set
3794 +# CONFIG_USB_ARCH_HAS_OHCI is not set
3795 +# CONFIG_USB_ARCH_HAS_EHCI is not set
3796 +
3797 +#
3798 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
3799 +#
3800 +
3801 +#
3802 +# USB Gadget Support
3803 +#
3804 +CONFIG_USB_GADGET=y
3805 +# CONFIG_USB_GADGET_DEBUG is not set
3806 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
3807 +CONFIG_USB_GADGET_DEBUG_FS=y
3808 +CONFIG_USB_GADGET_SELECTED=y
3809 +# CONFIG_USB_GADGET_AMD5536UDC is not set
3810 +CONFIG_USB_GADGET_ATMEL_USBA=y
3811 +CONFIG_USB_ATMEL_USBA=y
3812 +# CONFIG_USB_GADGET_FSL_USB2 is not set
3813 +# CONFIG_USB_GADGET_NET2280 is not set
3814 +# CONFIG_USB_GADGET_PXA2XX is not set
3815 +# CONFIG_USB_GADGET_M66592 is not set
3816 +# CONFIG_USB_GADGET_GOKU is not set
3817 +# CONFIG_USB_GADGET_LH7A40X is not set
3818 +# CONFIG_USB_GADGET_OMAP is not set
3819 +# CONFIG_USB_GADGET_S3C2410 is not set
3820 +# CONFIG_USB_GADGET_AT91 is not set
3821 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
3822 +CONFIG_USB_GADGET_DUALSPEED=y
3823 +CONFIG_USB_ZERO=m
3824 +CONFIG_USB_ETH=m
3825 +CONFIG_USB_ETH_RNDIS=y
3826 +CONFIG_USB_GADGETFS=m
3827 +CONFIG_USB_FILE_STORAGE=m
3828 +# CONFIG_USB_FILE_STORAGE_TEST is not set
3829 +CONFIG_USB_G_SERIAL=m
3830 +# CONFIG_USB_MIDI_GADGET is not set
3831 +CONFIG_MMC=y
3832 +# CONFIG_MMC_DEBUG is not set
3833 +# CONFIG_MMC_UNSAFE_RESUME is not set
3834 +
3835 +#
3836 +# MMC/SD Card Drivers
3837 +#
3838 +CONFIG_MMC_BLOCK=y
3839 +# CONFIG_MMC_BLOCK_BOUNCE is not set
3840 +# CONFIG_SDIO_UART is not set
3841 +
3842 +#
3843 +# MMC/SD Host Controller Drivers
3844 +#
3845 +CONFIG_MMC_ATMELMCI=y
3846 +CONFIG_MMC_SPI=m
3847 +CONFIG_NEW_LEDS=y
3848 +CONFIG_LEDS_CLASS=y
3849 +
3850 +#
3851 +# LED drivers
3852 +#
3853 +CONFIG_LEDS_ATMEL_PWM=m
3854 +CONFIG_LEDS_GPIO=y
3855 +
3856 +#
3857 +# LED Triggers
3858 +#
3859 +CONFIG_LEDS_TRIGGERS=y
3860 +CONFIG_LEDS_TRIGGER_TIMER=y
3861 +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
3862 +CONFIG_RTC_LIB=y
3863 +CONFIG_RTC_CLASS=y
3864 +CONFIG_RTC_HCTOSYS=y
3865 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
3866 +# CONFIG_RTC_DEBUG is not set
3867 +
3868 +#
3869 +# RTC interfaces
3870 +#
3871 +CONFIG_RTC_INTF_SYSFS=y
3872 +CONFIG_RTC_INTF_PROC=y
3873 +CONFIG_RTC_INTF_DEV=y
3874 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
3875 +# CONFIG_RTC_DRV_TEST is not set
3876 +
3877 +#
3878 +# I2C RTC drivers
3879 +#
3880 +# CONFIG_RTC_DRV_DS1307 is not set
3881 +# CONFIG_RTC_DRV_DS1374 is not set
3882 +# CONFIG_RTC_DRV_DS1672 is not set
3883 +# CONFIG_RTC_DRV_MAX6900 is not set
3884 +# CONFIG_RTC_DRV_RS5C372 is not set
3885 +# CONFIG_RTC_DRV_ISL1208 is not set
3886 +# CONFIG_RTC_DRV_X1205 is not set
3887 +# CONFIG_RTC_DRV_PCF8563 is not set
3888 +# CONFIG_RTC_DRV_PCF8583 is not set
3889 +# CONFIG_RTC_DRV_M41T80 is not set
3890 +
3891 +#
3892 +# SPI RTC drivers
3893 +#
3894 +# CONFIG_RTC_DRV_RS5C348 is not set
3895 +# CONFIG_RTC_DRV_MAX6902 is not set
3896 +
3897 +#
3898 +# Platform RTC drivers
3899 +#
3900 +# CONFIG_RTC_DRV_DS1553 is not set
3901 +# CONFIG_RTC_DRV_STK17TA8 is not set
3902 +# CONFIG_RTC_DRV_DS1742 is not set
3903 +# CONFIG_RTC_DRV_M48T86 is not set
3904 +# CONFIG_RTC_DRV_M48T59 is not set
3905 +# CONFIG_RTC_DRV_V3020 is not set
3906 +
3907 +#
3908 +# on-CPU RTC drivers
3909 +#
3910 +CONFIG_RTC_DRV_AT32AP700X=y
3911 +
3912 +#
3913 +# Userspace I/O
3914 +#
3915 +CONFIG_UIO=m
3916 +
3917 +#
3918 +# File systems
3919 +#
3920 +CONFIG_EXT2_FS=m
3921 +# CONFIG_EXT2_FS_XATTR is not set
3922 +# CONFIG_EXT2_FS_XIP is not set
3923 +CONFIG_EXT3_FS=m
3924 +# CONFIG_EXT3_FS_XATTR is not set
3925 +# CONFIG_EXT4DEV_FS is not set
3926 +CONFIG_JBD=m
3927 +# CONFIG_JBD_DEBUG is not set
3928 +# CONFIG_REISERFS_FS is not set
3929 +# CONFIG_JFS_FS is not set
3930 +# CONFIG_FS_POSIX_ACL is not set
3931 +# CONFIG_XFS_FS is not set
3932 +# CONFIG_GFS2_FS is not set
3933 +# CONFIG_OCFS2_FS is not set
3934 +# CONFIG_MINIX_FS is not set
3935 +# CONFIG_ROMFS_FS is not set
3936 +CONFIG_INOTIFY=y
3937 +CONFIG_INOTIFY_USER=y
3938 +# CONFIG_QUOTA is not set
3939 +# CONFIG_DNOTIFY is not set
3940 +# CONFIG_AUTOFS_FS is not set
3941 +# CONFIG_AUTOFS4_FS is not set
3942 +CONFIG_FUSE_FS=m
3943 +
3944 +#
3945 +# CD-ROM/DVD Filesystems
3946 +#
3947 +# CONFIG_ISO9660_FS is not set
3948 +# CONFIG_UDF_FS is not set
3949 +
3950 +#
3951 +# DOS/FAT/NT Filesystems
3952 +#
3953 +CONFIG_FAT_FS=m
3954 +CONFIG_MSDOS_FS=m
3955 +CONFIG_VFAT_FS=m
3956 +CONFIG_FAT_DEFAULT_CODEPAGE=437
3957 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
3958 +# CONFIG_NTFS_FS is not set
3959 +
3960 +#
3961 +# Pseudo filesystems
3962 +#
3963 +CONFIG_PROC_FS=y
3964 +CONFIG_PROC_KCORE=y
3965 +CONFIG_PROC_SYSCTL=y
3966 +CONFIG_SYSFS=y
3967 +CONFIG_TMPFS=y
3968 +# CONFIG_TMPFS_POSIX_ACL is not set
3969 +# CONFIG_HUGETLB_PAGE is not set
3970 +CONFIG_CONFIGFS_FS=y
3971 +
3972 +#
3973 +# Miscellaneous filesystems
3974 +#
3975 +# CONFIG_ADFS_FS is not set
3976 +# CONFIG_AFFS_FS is not set
3977 +# CONFIG_HFS_FS is not set
3978 +# CONFIG_HFSPLUS_FS is not set
3979 +# CONFIG_BEFS_FS is not set
3980 +# CONFIG_BFS_FS is not set
3981 +# CONFIG_EFS_FS is not set
3982 +CONFIG_JFFS2_FS=y
3983 +CONFIG_JFFS2_FS_DEBUG=0
3984 +CONFIG_JFFS2_FS_WRITEBUFFER=y
3985 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
3986 +# CONFIG_JFFS2_SUMMARY is not set
3987 +# CONFIG_JFFS2_FS_XATTR is not set
3988 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
3989 +CONFIG_JFFS2_ZLIB=y
3990 +# CONFIG_JFFS2_LZO is not set
3991 +CONFIG_JFFS2_RTIME=y
3992 +# CONFIG_JFFS2_RUBIN is not set
3993 +# CONFIG_CRAMFS is not set
3994 +# CONFIG_VXFS_FS is not set
3995 +# CONFIG_HPFS_FS is not set
3996 +# CONFIG_QNX4FS_FS is not set
3997 +# CONFIG_SYSV_FS is not set
3998 +# CONFIG_UFS_FS is not set
3999 +# CONFIG_NETWORK_FILESYSTEMS is not set
4000 +
4001 +#
4002 +# Partition Types
4003 +#
4004 +# CONFIG_PARTITION_ADVANCED is not set
4005 +CONFIG_MSDOS_PARTITION=y
4006 +CONFIG_NLS=m
4007 +CONFIG_NLS_DEFAULT="iso8859-1"
4008 +CONFIG_NLS_CODEPAGE_437=m
4009 +# CONFIG_NLS_CODEPAGE_737 is not set
4010 +# CONFIG_NLS_CODEPAGE_775 is not set
4011 +# CONFIG_NLS_CODEPAGE_850 is not set
4012 +# CONFIG_NLS_CODEPAGE_852 is not set
4013 +# CONFIG_NLS_CODEPAGE_855 is not set
4014 +# CONFIG_NLS_CODEPAGE_857 is not set
4015 +# CONFIG_NLS_CODEPAGE_860 is not set
4016 +# CONFIG_NLS_CODEPAGE_861 is not set
4017 +# CONFIG_NLS_CODEPAGE_862 is not set
4018 +# CONFIG_NLS_CODEPAGE_863 is not set
4019 +# CONFIG_NLS_CODEPAGE_864 is not set
4020 +# CONFIG_NLS_CODEPAGE_865 is not set
4021 +# CONFIG_NLS_CODEPAGE_866 is not set
4022 +# CONFIG_NLS_CODEPAGE_869 is not set
4023 +# CONFIG_NLS_CODEPAGE_936 is not set
4024 +# CONFIG_NLS_CODEPAGE_950 is not set
4025 +# CONFIG_NLS_CODEPAGE_932 is not set
4026 +# CONFIG_NLS_CODEPAGE_949 is not set
4027 +# CONFIG_NLS_CODEPAGE_874 is not set
4028 +# CONFIG_NLS_ISO8859_8 is not set
4029 +# CONFIG_NLS_CODEPAGE_1250 is not set
4030 +# CONFIG_NLS_CODEPAGE_1251 is not set
4031 +# CONFIG_NLS_ASCII is not set
4032 +CONFIG_NLS_ISO8859_1=m
4033 +# CONFIG_NLS_ISO8859_2 is not set
4034 +# CONFIG_NLS_ISO8859_3 is not set
4035 +# CONFIG_NLS_ISO8859_4 is not set
4036 +# CONFIG_NLS_ISO8859_5 is not set
4037 +# CONFIG_NLS_ISO8859_6 is not set
4038 +# CONFIG_NLS_ISO8859_7 is not set
4039 +# CONFIG_NLS_ISO8859_9 is not set
4040 +# CONFIG_NLS_ISO8859_13 is not set
4041 +# CONFIG_NLS_ISO8859_14 is not set
4042 +# CONFIG_NLS_ISO8859_15 is not set
4043 +# CONFIG_NLS_KOI8_R is not set
4044 +# CONFIG_NLS_KOI8_U is not set
4045 +CONFIG_NLS_UTF8=m
4046 +# CONFIG_DLM is not set
4047 +CONFIG_INSTRUMENTATION=y
4048 +CONFIG_PROFILING=y
4049 +CONFIG_OPROFILE=m
4050 +CONFIG_KPROBES=y
4051 +# CONFIG_MARKERS is not set
4052 +
4053 +#
4054 +# Kernel hacking
4055 +#
4056 +# CONFIG_PRINTK_TIME is not set
4057 +CONFIG_ENABLE_WARN_DEPRECATED=y
4058 +CONFIG_ENABLE_MUST_CHECK=y
4059 +CONFIG_MAGIC_SYSRQ=y
4060 +# CONFIG_UNUSED_SYMBOLS is not set
4061 +CONFIG_DEBUG_FS=y
4062 +# CONFIG_HEADERS_CHECK is not set
4063 +CONFIG_DEBUG_KERNEL=y
4064 +# CONFIG_DEBUG_SHIRQ is not set
4065 +CONFIG_DETECT_SOFTLOCKUP=y
4066 +CONFIG_SCHED_DEBUG=y
4067 +# CONFIG_SCHEDSTATS is not set
4068 +# CONFIG_TIMER_STATS is not set
4069 +# CONFIG_DEBUG_RT_MUTEXES is not set
4070 +# CONFIG_RT_MUTEX_TESTER is not set
4071 +# CONFIG_DEBUG_SPINLOCK is not set
4072 +# CONFIG_DEBUG_MUTEXES is not set
4073 +# CONFIG_DEBUG_LOCK_ALLOC is not set
4074 +# CONFIG_PROVE_LOCKING is not set
4075 +# CONFIG_LOCK_STAT is not set
4076 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
4077 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
4078 +# CONFIG_DEBUG_KOBJECT is not set
4079 +CONFIG_DEBUG_BUGVERBOSE=y
4080 +# CONFIG_DEBUG_INFO is not set
4081 +# CONFIG_DEBUG_VM is not set
4082 +# CONFIG_DEBUG_LIST is not set
4083 +# CONFIG_DEBUG_SG is not set
4084 +CONFIG_FRAME_POINTER=y
4085 +CONFIG_FORCED_INLINING=y
4086 +# CONFIG_BOOT_PRINTK_DELAY is not set
4087 +# CONFIG_RCU_TORTURE_TEST is not set
4088 +# CONFIG_LKDTM is not set
4089 +# CONFIG_FAULT_INJECTION is not set
4090 +# CONFIG_SAMPLES is not set
4091 +
4092 +#
4093 +# Security options
4094 +#
4095 +# CONFIG_KEYS is not set
4096 +# CONFIG_SECURITY is not set
4097 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4098 +# CONFIG_CRYPTO is not set
4099 +
4100 +#
4101 +# Library routines
4102 +#
4103 +CONFIG_BITREVERSE=y
4104 +CONFIG_CRC_CCITT=m
4105 +# CONFIG_CRC16 is not set
4106 +CONFIG_CRC_ITU_T=m
4107 +CONFIG_CRC32=y
4108 +CONFIG_CRC7=m
4109 +# CONFIG_LIBCRC32C is not set
4110 +CONFIG_AUDIT_GENERIC=y
4111 +CONFIG_ZLIB_INFLATE=y
4112 +CONFIG_ZLIB_DEFLATE=y
4113 +CONFIG_PLIST=y
4114 +CONFIG_HAS_IOMEM=y
4115 +CONFIG_HAS_IOPORT=y
4116 +CONFIG_HAS_DMA=y
4117 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1004_defconfig avr32-2.6/arch/avr32/configs/atstk1004_defconfig
4118 --- linux-2.6.24.3/arch/avr32/configs/atstk1004_defconfig 1970-01-01 01:00:00.000000000 +0100
4119 +++ avr32-2.6/arch/avr32/configs/atstk1004_defconfig 2008-04-23 20:12:35.000000000 +0200
4120 @@ -0,0 +1,639 @@
4121 +#
4122 +# Automatically generated make config: don't edit
4123 +# Linux kernel version: 2.6.24
4124 +# Thu Mar 6 12:51:05 2008
4125 +#
4126 +CONFIG_AVR32=y
4127 +CONFIG_GENERIC_GPIO=y
4128 +CONFIG_GENERIC_HARDIRQS=y
4129 +CONFIG_STACKTRACE_SUPPORT=y
4130 +CONFIG_LOCKDEP_SUPPORT=y
4131 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
4132 +CONFIG_HARDIRQS_SW_RESEND=y
4133 +CONFIG_GENERIC_IRQ_PROBE=y
4134 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4135 +CONFIG_GENERIC_TIME=y
4136 +CONFIG_GENERIC_CLOCKEVENTS=y
4137 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4138 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
4139 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
4140 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
4141 +CONFIG_GENERIC_HWEIGHT=y
4142 +CONFIG_GENERIC_CALIBRATE_DELAY=y
4143 +CONFIG_GENERIC_BUG=y
4144 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
4145 +
4146 +#
4147 +# General setup
4148 +#
4149 +CONFIG_EXPERIMENTAL=y
4150 +CONFIG_BROKEN_ON_SMP=y
4151 +CONFIG_INIT_ENV_ARG_LIMIT=32
4152 +CONFIG_LOCALVERSION=""
4153 +# CONFIG_LOCALVERSION_AUTO is not set
4154 +# CONFIG_SYSVIPC is not set
4155 +# CONFIG_POSIX_MQUEUE is not set
4156 +# CONFIG_BSD_PROCESS_ACCT is not set
4157 +# CONFIG_TASKSTATS is not set
4158 +# CONFIG_USER_NS is not set
4159 +# CONFIG_PID_NS is not set
4160 +# CONFIG_AUDIT is not set
4161 +# CONFIG_IKCONFIG is not set
4162 +CONFIG_LOG_BUF_SHIFT=14
4163 +# CONFIG_CGROUPS is not set
4164 +# CONFIG_FAIR_GROUP_SCHED is not set
4165 +CONFIG_SYSFS_DEPRECATED=y
4166 +# CONFIG_RELAY is not set
4167 +# CONFIG_BLK_DEV_INITRD is not set
4168 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
4169 +CONFIG_SYSCTL=y
4170 +CONFIG_EMBEDDED=y
4171 +# CONFIG_SYSCTL_SYSCALL is not set
4172 +CONFIG_KALLSYMS=y
4173 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
4174 +CONFIG_HOTPLUG=y
4175 +CONFIG_PRINTK=y
4176 +CONFIG_BUG=y
4177 +CONFIG_ELF_CORE=y
4178 +# CONFIG_BASE_FULL is not set
4179 +# CONFIG_FUTEX is not set
4180 +# CONFIG_EPOLL is not set
4181 +# CONFIG_SIGNALFD is not set
4182 +# CONFIG_EVENTFD is not set
4183 +CONFIG_SHMEM=y
4184 +CONFIG_VM_EVENT_COUNTERS=y
4185 +# CONFIG_SLAB is not set
4186 +# CONFIG_SLUB is not set
4187 +CONFIG_SLOB=y
4188 +# CONFIG_TINY_SHMEM is not set
4189 +CONFIG_BASE_SMALL=1
4190 +# CONFIG_MODULES is not set
4191 +# CONFIG_BLOCK is not set
4192 +
4193 +#
4194 +# System Type and features
4195 +#
4196 +CONFIG_TICK_ONESHOT=y
4197 +CONFIG_NO_HZ=y
4198 +CONFIG_HIGH_RES_TIMERS=y
4199 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
4200 +CONFIG_SUBARCH_AVR32B=y
4201 +CONFIG_MMU=y
4202 +CONFIG_PERFORMANCE_COUNTERS=y
4203 +CONFIG_PLATFORM_AT32AP=y
4204 +CONFIG_CPU_AT32AP700X=y
4205 +CONFIG_CPU_AT32AP7002=y
4206 +CONFIG_BOARD_ATSTK1000=y
4207 +# CONFIG_BOARD_ATNGW100 is not set
4208 +# CONFIG_BOARD_ATSTK1002 is not set
4209 +# CONFIG_BOARD_ATSTK1003 is not set
4210 +CONFIG_BOARD_ATSTK1004=y
4211 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
4212 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
4213 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
4214 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
4215 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
4216 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
4217 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
4218 +CONFIG_LOADER_U_BOOT=y
4219 +
4220 +#
4221 +# Atmel AVR32 AP options
4222 +#
4223 +# CONFIG_AP700X_32_BIT_SMC is not set
4224 +CONFIG_AP700X_16_BIT_SMC=y
4225 +# CONFIG_AP700X_8_BIT_SMC is not set
4226 +# CONFIG_GPIO_DEV is not set
4227 +CONFIG_LOAD_ADDRESS=0x10000000
4228 +CONFIG_ENTRY_ADDRESS=0x90000000
4229 +CONFIG_PHYS_OFFSET=0x10000000
4230 +CONFIG_PREEMPT_NONE=y
4231 +# CONFIG_PREEMPT_VOLUNTARY is not set
4232 +# CONFIG_PREEMPT is not set
4233 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
4234 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
4235 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
4236 +CONFIG_ARCH_FLATMEM_ENABLE=y
4237 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
4238 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
4239 +CONFIG_SELECT_MEMORY_MODEL=y
4240 +CONFIG_FLATMEM_MANUAL=y
4241 +# CONFIG_DISCONTIGMEM_MANUAL is not set
4242 +# CONFIG_SPARSEMEM_MANUAL is not set
4243 +CONFIG_FLATMEM=y
4244 +CONFIG_FLAT_NODE_MEM_MAP=y
4245 +# CONFIG_SPARSEMEM_STATIC is not set
4246 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
4247 +CONFIG_SPLIT_PTLOCK_CPUS=4
4248 +# CONFIG_RESOURCES_64BIT is not set
4249 +CONFIG_ZONE_DMA_FLAG=0
4250 +CONFIG_VIRT_TO_BUS=y
4251 +# CONFIG_OWNERSHIP_TRACE is not set
4252 +# CONFIG_NMI_DEBUGGING is not set
4253 +# CONFIG_DW_DMAC is not set
4254 +# CONFIG_HZ_100 is not set
4255 +CONFIG_HZ_250=y
4256 +# CONFIG_HZ_300 is not set
4257 +# CONFIG_HZ_1000 is not set
4258 +CONFIG_HZ=250
4259 +CONFIG_CMDLINE=""
4260 +
4261 +#
4262 +# Power management options
4263 +#
4264 +
4265 +#
4266 +# CPU Frequency scaling
4267 +#
4268 +CONFIG_CPU_FREQ=y
4269 +CONFIG_CPU_FREQ_TABLE=y
4270 +# CONFIG_CPU_FREQ_DEBUG is not set
4271 +# CONFIG_CPU_FREQ_STAT is not set
4272 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
4273 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
4274 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
4275 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
4276 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
4277 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
4278 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
4279 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
4280 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
4281 +CONFIG_CPU_FREQ_AT32AP=y
4282 +
4283 +#
4284 +# Bus options
4285 +#
4286 +# CONFIG_ARCH_SUPPORTS_MSI is not set
4287 +# CONFIG_PCCARD is not set
4288 +
4289 +#
4290 +# Executable file formats
4291 +#
4292 +CONFIG_BINFMT_ELF=y
4293 +# CONFIG_BINFMT_MISC is not set
4294 +
4295 +#
4296 +# Networking
4297 +#
4298 +CONFIG_NET=y
4299 +
4300 +#
4301 +# Networking options
4302 +#
4303 +CONFIG_PACKET=y
4304 +CONFIG_PACKET_MMAP=y
4305 +CONFIG_UNIX=y
4306 +# CONFIG_NET_KEY is not set
4307 +CONFIG_INET=y
4308 +# CONFIG_IP_MULTICAST is not set
4309 +# CONFIG_IP_ADVANCED_ROUTER is not set
4310 +CONFIG_IP_FIB_HASH=y
4311 +# CONFIG_IP_PNP is not set
4312 +# CONFIG_NET_IPIP is not set
4313 +# CONFIG_NET_IPGRE is not set
4314 +# CONFIG_ARPD is not set
4315 +# CONFIG_SYN_COOKIES is not set
4316 +# CONFIG_INET_AH is not set
4317 +# CONFIG_INET_ESP is not set
4318 +# CONFIG_INET_IPCOMP is not set
4319 +# CONFIG_INET_XFRM_TUNNEL is not set
4320 +# CONFIG_INET_TUNNEL is not set
4321 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
4322 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
4323 +# CONFIG_INET_XFRM_MODE_BEET is not set
4324 +# CONFIG_INET_LRO is not set
4325 +# CONFIG_INET_DIAG is not set
4326 +# CONFIG_TCP_CONG_ADVANCED is not set
4327 +CONFIG_TCP_CONG_CUBIC=y
4328 +CONFIG_DEFAULT_TCP_CONG="cubic"
4329 +# CONFIG_TCP_MD5SIG is not set
4330 +# CONFIG_IPV6 is not set
4331 +# CONFIG_INET6_XFRM_TUNNEL is not set
4332 +# CONFIG_INET6_TUNNEL is not set
4333 +# CONFIG_NETWORK_SECMARK is not set
4334 +# CONFIG_NETFILTER is not set
4335 +# CONFIG_IP_DCCP is not set
4336 +# CONFIG_IP_SCTP is not set
4337 +# CONFIG_TIPC is not set
4338 +# CONFIG_ATM is not set
4339 +# CONFIG_BRIDGE is not set
4340 +# CONFIG_VLAN_8021Q is not set
4341 +# CONFIG_DECNET is not set
4342 +# CONFIG_LLC2 is not set
4343 +# CONFIG_IPX is not set
4344 +# CONFIG_ATALK is not set
4345 +# CONFIG_X25 is not set
4346 +# CONFIG_LAPB is not set
4347 +# CONFIG_ECONET is not set
4348 +# CONFIG_WAN_ROUTER is not set
4349 +# CONFIG_NET_SCHED is not set
4350 +
4351 +#
4352 +# Network testing
4353 +#
4354 +# CONFIG_NET_PKTGEN is not set
4355 +# CONFIG_HAMRADIO is not set
4356 +# CONFIG_IRDA is not set
4357 +# CONFIG_BT is not set
4358 +# CONFIG_AF_RXRPC is not set
4359 +
4360 +#
4361 +# Wireless
4362 +#
4363 +# CONFIG_CFG80211 is not set
4364 +# CONFIG_WIRELESS_EXT is not set
4365 +# CONFIG_MAC80211 is not set
4366 +# CONFIG_IEEE80211 is not set
4367 +# CONFIG_RFKILL is not set
4368 +# CONFIG_NET_9P is not set
4369 +
4370 +#
4371 +# Device Drivers
4372 +#
4373 +
4374 +#
4375 +# Generic Driver Options
4376 +#
4377 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
4378 +CONFIG_STANDALONE=y
4379 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
4380 +# CONFIG_FW_LOADER is not set
4381 +# CONFIG_SYS_HYPERVISOR is not set
4382 +# CONFIG_CONNECTOR is not set
4383 +CONFIG_MTD=y
4384 +# CONFIG_MTD_DEBUG is not set
4385 +# CONFIG_MTD_CONCAT is not set
4386 +CONFIG_MTD_PARTITIONS=y
4387 +# CONFIG_MTD_REDBOOT_PARTS is not set
4388 +CONFIG_MTD_CMDLINE_PARTS=y
4389 +
4390 +#
4391 +# User Modules And Translation Layers
4392 +#
4393 +CONFIG_MTD_CHAR=y
4394 +# CONFIG_MTD_OOPS is not set
4395 +
4396 +#
4397 +# RAM/ROM/Flash chip drivers
4398 +#
4399 +CONFIG_MTD_CFI=y
4400 +# CONFIG_MTD_JEDECPROBE is not set
4401 +CONFIG_MTD_GEN_PROBE=y
4402 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
4403 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
4404 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
4405 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
4406 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
4407 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
4408 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
4409 +CONFIG_MTD_CFI_I1=y
4410 +CONFIG_MTD_CFI_I2=y
4411 +# CONFIG_MTD_CFI_I4 is not set
4412 +# CONFIG_MTD_CFI_I8 is not set
4413 +# CONFIG_MTD_CFI_INTELEXT is not set
4414 +CONFIG_MTD_CFI_AMDSTD=y
4415 +# CONFIG_MTD_CFI_STAA is not set
4416 +CONFIG_MTD_CFI_UTIL=y
4417 +# CONFIG_MTD_RAM is not set
4418 +# CONFIG_MTD_ROM is not set
4419 +# CONFIG_MTD_ABSENT is not set
4420 +
4421 +#
4422 +# Mapping drivers for chip access
4423 +#
4424 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
4425 +CONFIG_MTD_PHYSMAP=y
4426 +CONFIG_MTD_PHYSMAP_START=0x8000000
4427 +CONFIG_MTD_PHYSMAP_LEN=0x0
4428 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
4429 +# CONFIG_MTD_PLATRAM is not set
4430 +
4431 +#
4432 +# Self-contained MTD device drivers
4433 +#
4434 +# CONFIG_MTD_DATAFLASH is not set
4435 +# CONFIG_MTD_M25P80 is not set
4436 +# CONFIG_MTD_SLRAM is not set
4437 +# CONFIG_MTD_PHRAM is not set
4438 +# CONFIG_MTD_MTDRAM is not set
4439 +
4440 +#
4441 +# Disk-On-Chip Device Drivers
4442 +#
4443 +# CONFIG_MTD_DOC2000 is not set
4444 +# CONFIG_MTD_DOC2001 is not set
4445 +# CONFIG_MTD_DOC2001PLUS is not set
4446 +# CONFIG_MTD_NAND is not set
4447 +# CONFIG_MTD_ONENAND is not set
4448 +
4449 +#
4450 +# UBI - Unsorted block images
4451 +#
4452 +# CONFIG_MTD_UBI is not set
4453 +# CONFIG_PARPORT is not set
4454 +CONFIG_MISC_DEVICES=y
4455 +# CONFIG_ATMEL_PWM is not set
4456 +CONFIG_ATMEL_TCLIB=y
4457 +CONFIG_ATMEL_TCB_CLKSRC=y
4458 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
4459 +# CONFIG_EEPROM_93CX6 is not set
4460 +# CONFIG_ATMEL_SSC is not set
4461 +
4462 +#
4463 +# SCSI device support
4464 +#
4465 +# CONFIG_SCSI_DMA is not set
4466 +# CONFIG_SCSI_NETLINK is not set
4467 +# CONFIG_NETDEVICES is not set
4468 +# CONFIG_ISDN is not set
4469 +# CONFIG_PHONE is not set
4470 +
4471 +#
4472 +# Input device support
4473 +#
4474 +# CONFIG_INPUT is not set
4475 +
4476 +#
4477 +# Hardware I/O ports
4478 +#
4479 +# CONFIG_SERIO is not set
4480 +# CONFIG_GAMEPORT is not set
4481 +
4482 +#
4483 +# Character devices
4484 +#
4485 +# CONFIG_VT is not set
4486 +# CONFIG_SERIAL_NONSTANDARD is not set
4487 +
4488 +#
4489 +# Serial drivers
4490 +#
4491 +# CONFIG_SERIAL_8250 is not set
4492 +
4493 +#
4494 +# Non-8250 serial port support
4495 +#
4496 +CONFIG_SERIAL_ATMEL=y
4497 +CONFIG_SERIAL_ATMEL_CONSOLE=y
4498 +# CONFIG_SERIAL_ATMEL_PDC is not set
4499 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
4500 +CONFIG_SERIAL_CORE=y
4501 +CONFIG_SERIAL_CORE_CONSOLE=y
4502 +CONFIG_UNIX98_PTYS=y
4503 +# CONFIG_LEGACY_PTYS is not set
4504 +# CONFIG_IPMI_HANDLER is not set
4505 +# CONFIG_HW_RANDOM is not set
4506 +# CONFIG_RTC is not set
4507 +# CONFIG_GEN_RTC is not set
4508 +# CONFIG_R3964 is not set
4509 +# CONFIG_TCG_TPM is not set
4510 +# CONFIG_I2C is not set
4511 +
4512 +#
4513 +# SPI support
4514 +#
4515 +CONFIG_SPI=y
4516 +CONFIG_SPI_MASTER=y
4517 +
4518 +#
4519 +# SPI Master Controller Drivers
4520 +#
4521 +CONFIG_SPI_ATMEL=y
4522 +# CONFIG_SPI_BITBANG is not set
4523 +
4524 +#
4525 +# SPI Protocol Masters
4526 +#
4527 +# CONFIG_SPI_AT25 is not set
4528 +# CONFIG_SPI_SPIDEV is not set
4529 +# CONFIG_SPI_TLE62X0 is not set
4530 +# CONFIG_W1 is not set
4531 +# CONFIG_POWER_SUPPLY is not set
4532 +# CONFIG_HWMON is not set
4533 +CONFIG_WATCHDOG=y
4534 +# CONFIG_WATCHDOG_NOWAYOUT is not set
4535 +
4536 +#
4537 +# Watchdog Device Drivers
4538 +#
4539 +# CONFIG_SOFT_WATCHDOG is not set
4540 +CONFIG_AT32AP700X_WDT=y
4541 +
4542 +#
4543 +# Sonics Silicon Backplane
4544 +#
4545 +CONFIG_SSB_POSSIBLE=y
4546 +# CONFIG_SSB is not set
4547 +
4548 +#
4549 +# Multifunction device drivers
4550 +#
4551 +# CONFIG_MFD_SM501 is not set
4552 +
4553 +#
4554 +# Multimedia devices
4555 +#
4556 +# CONFIG_VIDEO_DEV is not set
4557 +# CONFIG_DVB_CORE is not set
4558 +# CONFIG_DAB is not set
4559 +
4560 +#
4561 +# Graphics support
4562 +#
4563 +# CONFIG_VGASTATE is not set
4564 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
4565 +CONFIG_FB=y
4566 +# CONFIG_FIRMWARE_EDID is not set
4567 +# CONFIG_FB_DDC is not set
4568 +CONFIG_FB_CFB_FILLRECT=y
4569 +CONFIG_FB_CFB_COPYAREA=y
4570 +CONFIG_FB_CFB_IMAGEBLIT=y
4571 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
4572 +# CONFIG_FB_SYS_FILLRECT is not set
4573 +# CONFIG_FB_SYS_COPYAREA is not set
4574 +# CONFIG_FB_SYS_IMAGEBLIT is not set
4575 +# CONFIG_FB_SYS_FOPS is not set
4576 +CONFIG_FB_DEFERRED_IO=y
4577 +# CONFIG_FB_SVGALIB is not set
4578 +# CONFIG_FB_MACMODES is not set
4579 +# CONFIG_FB_BACKLIGHT is not set
4580 +# CONFIG_FB_MODE_HELPERS is not set
4581 +# CONFIG_FB_TILEBLITTING is not set
4582 +
4583 +#
4584 +# Frame buffer hardware drivers
4585 +#
4586 +# CONFIG_FB_S1D13XXX is not set
4587 +CONFIG_FB_ATMEL=y
4588 +# CONFIG_FB_VIRTUAL is not set
4589 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
4590 +CONFIG_LCD_CLASS_DEVICE=y
4591 +CONFIG_LCD_LTV350QV=y
4592 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
4593 +
4594 +#
4595 +# Display device support
4596 +#
4597 +# CONFIG_DISPLAY_SUPPORT is not set
4598 +# CONFIG_LOGO is not set
4599 +
4600 +#
4601 +# Sound
4602 +#
4603 +# CONFIG_SOUND is not set
4604 +CONFIG_USB_SUPPORT=y
4605 +# CONFIG_USB_ARCH_HAS_HCD is not set
4606 +# CONFIG_USB_ARCH_HAS_OHCI is not set
4607 +# CONFIG_USB_ARCH_HAS_EHCI is not set
4608 +
4609 +#
4610 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
4611 +#
4612 +
4613 +#
4614 +# USB Gadget Support
4615 +#
4616 +CONFIG_USB_GADGET=y
4617 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
4618 +CONFIG_USB_GADGET_SELECTED=y
4619 +# CONFIG_USB_GADGET_AMD5536UDC is not set
4620 +CONFIG_USB_GADGET_ATMEL_USBA=y
4621 +CONFIG_USB_ATMEL_USBA=y
4622 +# CONFIG_USB_GADGET_FSL_USB2 is not set
4623 +# CONFIG_USB_GADGET_NET2280 is not set
4624 +# CONFIG_USB_GADGET_PXA2XX is not set
4625 +# CONFIG_USB_GADGET_M66592 is not set
4626 +# CONFIG_USB_GADGET_GOKU is not set
4627 +# CONFIG_USB_GADGET_LH7A40X is not set
4628 +# CONFIG_USB_GADGET_OMAP is not set
4629 +# CONFIG_USB_GADGET_S3C2410 is not set
4630 +# CONFIG_USB_GADGET_AT91 is not set
4631 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
4632 +CONFIG_USB_GADGET_DUALSPEED=y
4633 +# CONFIG_USB_ZERO is not set
4634 +CONFIG_USB_ETH=y
4635 +# CONFIG_USB_ETH_RNDIS is not set
4636 +# CONFIG_USB_GADGETFS is not set
4637 +# CONFIG_USB_FILE_STORAGE is not set
4638 +# CONFIG_USB_G_SERIAL is not set
4639 +# CONFIG_USB_MIDI_GADGET is not set
4640 +# CONFIG_MMC is not set
4641 +# CONFIG_NEW_LEDS is not set
4642 +CONFIG_RTC_LIB=y
4643 +CONFIG_RTC_CLASS=y
4644 +CONFIG_RTC_HCTOSYS=y
4645 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
4646 +# CONFIG_RTC_DEBUG is not set
4647 +
4648 +#
4649 +# RTC interfaces
4650 +#
4651 +CONFIG_RTC_INTF_SYSFS=y
4652 +# CONFIG_RTC_INTF_PROC is not set
4653 +CONFIG_RTC_INTF_DEV=y
4654 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
4655 +# CONFIG_RTC_DRV_TEST is not set
4656 +
4657 +#
4658 +# SPI RTC drivers
4659 +#
4660 +# CONFIG_RTC_DRV_RS5C348 is not set
4661 +# CONFIG_RTC_DRV_MAX6902 is not set
4662 +
4663 +#
4664 +# Platform RTC drivers
4665 +#
4666 +# CONFIG_RTC_DRV_DS1553 is not set
4667 +# CONFIG_RTC_DRV_STK17TA8 is not set
4668 +# CONFIG_RTC_DRV_DS1742 is not set
4669 +# CONFIG_RTC_DRV_M48T86 is not set
4670 +# CONFIG_RTC_DRV_M48T59 is not set
4671 +# CONFIG_RTC_DRV_V3020 is not set
4672 +
4673 +#
4674 +# on-CPU RTC drivers
4675 +#
4676 +CONFIG_RTC_DRV_AT32AP700X=y
4677 +
4678 +#
4679 +# Userspace I/O
4680 +#
4681 +# CONFIG_UIO is not set
4682 +
4683 +#
4684 +# File systems
4685 +#
4686 +# CONFIG_INOTIFY is not set
4687 +# CONFIG_QUOTA is not set
4688 +# CONFIG_DNOTIFY is not set
4689 +# CONFIG_AUTOFS_FS is not set
4690 +# CONFIG_AUTOFS4_FS is not set
4691 +# CONFIG_FUSE_FS is not set
4692 +
4693 +#
4694 +# Pseudo filesystems
4695 +#
4696 +CONFIG_PROC_FS=y
4697 +CONFIG_PROC_KCORE=y
4698 +CONFIG_PROC_SYSCTL=y
4699 +CONFIG_SYSFS=y
4700 +CONFIG_TMPFS=y
4701 +# CONFIG_TMPFS_POSIX_ACL is not set
4702 +# CONFIG_HUGETLB_PAGE is not set
4703 +# CONFIG_CONFIGFS_FS is not set
4704 +
4705 +#
4706 +# Miscellaneous filesystems
4707 +#
4708 +CONFIG_JFFS2_FS=y
4709 +CONFIG_JFFS2_FS_DEBUG=0
4710 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
4711 +# CONFIG_JFFS2_SUMMARY is not set
4712 +# CONFIG_JFFS2_FS_XATTR is not set
4713 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
4714 +CONFIG_JFFS2_ZLIB=y
4715 +# CONFIG_JFFS2_LZO is not set
4716 +CONFIG_JFFS2_RTIME=y
4717 +# CONFIG_JFFS2_RUBIN is not set
4718 +# CONFIG_NETWORK_FILESYSTEMS is not set
4719 +# CONFIG_NLS is not set
4720 +# CONFIG_DLM is not set
4721 +# CONFIG_INSTRUMENTATION is not set
4722 +
4723 +#
4724 +# Kernel hacking
4725 +#
4726 +# CONFIG_PRINTK_TIME is not set
4727 +CONFIG_ENABLE_WARN_DEPRECATED=y
4728 +CONFIG_ENABLE_MUST_CHECK=y
4729 +CONFIG_MAGIC_SYSRQ=y
4730 +# CONFIG_UNUSED_SYMBOLS is not set
4731 +# CONFIG_DEBUG_FS is not set
4732 +# CONFIG_HEADERS_CHECK is not set
4733 +# CONFIG_DEBUG_KERNEL is not set
4734 +# CONFIG_DEBUG_BUGVERBOSE is not set
4735 +# CONFIG_SAMPLES is not set
4736 +
4737 +#
4738 +# Security options
4739 +#
4740 +# CONFIG_KEYS is not set
4741 +# CONFIG_SECURITY is not set
4742 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4743 +# CONFIG_CRYPTO is not set
4744 +
4745 +#
4746 +# Library routines
4747 +#
4748 +CONFIG_BITREVERSE=y
4749 +# CONFIG_CRC_CCITT is not set
4750 +# CONFIG_CRC16 is not set
4751 +# CONFIG_CRC_ITU_T is not set
4752 +CONFIG_CRC32=y
4753 +# CONFIG_CRC7 is not set
4754 +# CONFIG_LIBCRC32C is not set
4755 +CONFIG_ZLIB_INFLATE=y
4756 +CONFIG_ZLIB_DEFLATE=y
4757 +CONFIG_HAS_IOMEM=y
4758 +CONFIG_HAS_IOPORT=y
4759 +CONFIG_HAS_DMA=y
4760 diff -urN linux-2.6.24.3/arch/avr32/drivers/dw-dmac.c avr32-2.6/arch/avr32/drivers/dw-dmac.c
4761 --- linux-2.6.24.3/arch/avr32/drivers/dw-dmac.c 1970-01-01 01:00:00.000000000 +0100
4762 +++ avr32-2.6/arch/avr32/drivers/dw-dmac.c 2008-04-23 19:33:28.000000000 +0200
4763 @@ -0,0 +1,761 @@
4764 +/*
4765 + * Driver for the Synopsys DesignWare DMA Controller
4766 + *
4767 + * Copyright (C) 2005-2006 Atmel Corporation
4768 + *
4769 + * This program is free software; you can redistribute it and/or modify
4770 + * it under the terms of the GNU General Public License version 2 as
4771 + * published by the Free Software Foundation.
4772 + */
4773 +#include <linux/clk.h>
4774 +#include <linux/device.h>
4775 +#include <linux/dma-mapping.h>
4776 +#include <linux/dmapool.h>
4777 +#include <linux/init.h>
4778 +#include <linux/interrupt.h>
4779 +#include <linux/module.h>
4780 +#include <linux/platform_device.h>
4781 +
4782 +#include <asm/dma-controller.h>
4783 +#include <asm/io.h>
4784 +
4785 +#include "dw-dmac.h"
4786 +
4787 +#define DMAC_NR_CHANNELS 3
4788 +#define DMAC_MAX_BLOCKSIZE 4095
4789 +
4790 +enum {
4791 + CH_STATE_FREE = 0,
4792 + CH_STATE_ALLOCATED,
4793 + CH_STATE_BUSY,
4794 +};
4795 +
4796 +struct dw_dma_lli {
4797 + dma_addr_t sar;
4798 + dma_addr_t dar;
4799 + dma_addr_t llp;
4800 + u32 ctllo;
4801 + u32 ctlhi;
4802 + u32 sstat;
4803 + u32 dstat;
4804 +};
4805 +
4806 +struct dw_dma_block {
4807 + struct dw_dma_lli *lli_vaddr;
4808 + dma_addr_t lli_dma_addr;
4809 +};
4810 +
4811 +struct dw_dma_channel {
4812 + unsigned int state;
4813 + int is_cyclic;
4814 + struct dma_request_sg *req_sg;
4815 + struct dma_request_cyclic *req_cyclic;
4816 + unsigned int nr_blocks;
4817 + int direction;
4818 + struct dw_dma_block *block;
4819 +};
4820 +
4821 +struct dw_dma_controller {
4822 + spinlock_t lock;
4823 + void * __iomem regs;
4824 + struct dma_pool *lli_pool;
4825 + struct clk *hclk;
4826 + struct dma_controller dma;
4827 + struct dw_dma_channel channel[DMAC_NR_CHANNELS];
4828 +};
4829 +#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
4830 +
4831 +#define dmac_writel_hi(dmac, reg, value) \
4832 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
4833 +#define dmac_readl_hi(dmac, reg) \
4834 + __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
4835 +#define dmac_writel_lo(dmac, reg, value) \
4836 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
4837 +#define dmac_readl_lo(dmac, reg) \
4838 + __raw_readl((dmac)->regs + DW_DMAC_##reg)
4839 +#define dmac_chan_writel_hi(dmac, chan, reg, value) \
4840 + __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
4841 + + DW_DMAC_CHAN_##reg + 4))
4842 +#define dmac_chan_readl_hi(dmac, chan, reg) \
4843 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
4844 +#define dmac_chan_writel_lo(dmac, chan, reg, value) \
4845 + __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4846 +#define dmac_chan_readl_lo(dmac, chan, reg) \
4847 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4848 +#define set_channel_bit(dmac, reg, chan) \
4849 + dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
4850 +#define clear_channel_bit(dmac, reg, chan) \
4851 + dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
4852 +
4853 +static int dmac_alloc_channel(struct dma_controller *_dmac)
4854 +{
4855 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4856 + struct dw_dma_channel *chan;
4857 + unsigned long flags;
4858 + int i;
4859 +
4860 + spin_lock_irqsave(&dmac->lock, flags);
4861 + for (i = 0; i < DMAC_NR_CHANNELS; i++)
4862 + if (dmac->channel[i].state == CH_STATE_FREE)
4863 + break;
4864 +
4865 + if (i < DMAC_NR_CHANNELS) {
4866 + chan = &dmac->channel[i];
4867 + chan->state = CH_STATE_ALLOCATED;
4868 + } else {
4869 + i = -EBUSY;
4870 + }
4871 +
4872 + spin_unlock_irqrestore(&dmac->lock, flags);
4873 +
4874 + return i;
4875 +}
4876 +
4877 +static void dmac_release_channel(struct dma_controller *_dmac, int channel)
4878 +{
4879 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4880 +
4881 + BUG_ON(channel >= DMAC_NR_CHANNELS
4882 + || dmac->channel[channel].state != CH_STATE_ALLOCATED);
4883 +
4884 + dmac->channel[channel].state = CH_STATE_FREE;
4885 +}
4886 +
4887 +static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
4888 + unsigned int nr_blocks)
4889 +{
4890 + struct dw_dma_block *block;
4891 + void *p;
4892 + unsigned int i;
4893 +
4894 + block = kmalloc(nr_blocks * sizeof(*block),
4895 + GFP_KERNEL);
4896 + if (unlikely(!block))
4897 + return NULL;
4898 +
4899 + for (i = 0; i < nr_blocks; i++) {
4900 + p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
4901 + &block[i].lli_dma_addr);
4902 + block[i].lli_vaddr = p;
4903 + if (unlikely(!p))
4904 + goto fail;
4905 + }
4906 +
4907 + return block;
4908 +
4909 +fail:
4910 + for (i = 0; i < nr_blocks; i++) {
4911 + if (!block[i].lli_vaddr)
4912 + break;
4913 + dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
4914 + block[i].lli_dma_addr);
4915 + }
4916 + kfree(block);
4917 + return NULL;
4918 +}
4919 +
4920 +static void cleanup_channel(struct dw_dma_controller *dmac,
4921 + struct dw_dma_channel *chan)
4922 +{
4923 + unsigned int i;
4924 +
4925 + if (chan->nr_blocks > 1) {
4926 + for (i = 0; i < chan->nr_blocks; i++)
4927 + dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
4928 + chan->block[i].lli_dma_addr);
4929 + kfree(chan->block);
4930 + }
4931 +
4932 + chan->state = CH_STATE_ALLOCATED;
4933 +}
4934 +
4935 +static int dmac_prepare_request_sg(struct dma_controller *_dmac,
4936 + struct dma_request_sg *req)
4937 +{
4938 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4939 + struct dw_dma_channel *chan;
4940 + unsigned long ctlhi, ctllo, cfghi, cfglo;
4941 + unsigned long block_size;
4942 + unsigned int nr_blocks;
4943 + int ret, i, direction;
4944 + unsigned long flags;
4945 +
4946 + spin_lock_irqsave(&dmac->lock, flags);
4947 +
4948 + ret = -EINVAL;
4949 + if (req->req.channel >= DMAC_NR_CHANNELS
4950 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
4951 + || req->block_size > DMAC_MAX_BLOCKSIZE) {
4952 + spin_unlock_irqrestore(&dmac->lock, flags);
4953 + return -EINVAL;
4954 + }
4955 +
4956 + chan = &dmac->channel[req->req.channel];
4957 + chan->state = CH_STATE_BUSY;
4958 + chan->req_sg = req;
4959 + chan->is_cyclic = 0;
4960 +
4961 + /*
4962 + * We have marked the channel as busy, so no need to keep the
4963 + * lock as long as we only touch the channel-specific
4964 + * registers
4965 + */
4966 + spin_unlock_irqrestore(&dmac->lock, flags);
4967 +
4968 + /*
4969 + * There may be limitations in the driver and/or the DMA
4970 + * controller that prevents us from sending a whole
4971 + * scatterlist item in one go. Taking this into account,
4972 + * calculate the number of block transfers we need to set up.
4973 + *
4974 + * FIXME: Let the peripheral driver know about the maximum
4975 + * block size we support. We really don't want to use a
4976 + * different block size than what was suggested by the
4977 + * peripheral.
4978 + *
4979 + * Each block will get its own Linked List Item (LLI) below.
4980 + */
4981 + block_size = req->block_size;
4982 + nr_blocks = req->nr_blocks;
4983 + pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
4984 + block_size, nr_blocks, req->nr_sg);
4985 +
4986 + BUG_ON(nr_blocks == 0);
4987 + chan->nr_blocks = nr_blocks;
4988 +
4989 + ret = -EINVAL;
4990 + cfglo = cfghi = 0;
4991 + switch (req->direction) {
4992 + case DMA_DIR_MEM_TO_PERIPH:
4993 + direction = DMA_TO_DEVICE;
4994 + cfghi = req->periph_id << (43 - 32);
4995 + break;
4996 +
4997 + case DMA_DIR_PERIPH_TO_MEM:
4998 + direction = DMA_FROM_DEVICE;
4999 + cfghi = req->periph_id << (39 - 32);
5000 + break;
5001 + default:
5002 + goto out_unclaim_channel;
5003 + }
5004 +
5005 + chan->direction = direction;
5006 +
5007 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5008 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5009 +
5010 + ctlhi = block_size >> req->width;
5011 + ctllo = ((req->direction << 20)
5012 + // | (1 << 14) | (1 << 11) // source/dest burst trans len
5013 + | (req->width << 4) | (req->width << 1)
5014 + | (1 << 0)); // interrupt enable
5015 +
5016 + if (nr_blocks == 1) {
5017 + /* Only one block: No need to use block chaining */
5018 + if (direction == DMA_TO_DEVICE) {
5019 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
5020 + req->sg->dma_address);
5021 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
5022 + req->data_reg);
5023 + ctllo |= 2 << 7; // no dst increment
5024 + } else {
5025 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
5026 + req->data_reg);
5027 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
5028 + req->sg->dma_address);
5029 + ctllo |= 2 << 9; // no src increment
5030 + }
5031 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
5032 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
5033 + pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
5034 + } else {
5035 + struct dw_dma_lli *lli, *lli_prev = NULL;
5036 + int j = 0, offset = 0;
5037 +
5038 + ret = -ENOMEM;
5039 + chan->block = allocate_blocks(dmac, nr_blocks);
5040 + if (!chan->block)
5041 + goto out_unclaim_channel;
5042 +
5043 + if (direction == DMA_TO_DEVICE)
5044 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5045 + else
5046 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5047 +
5048 + /*
5049 + * Map scatterlist items to blocks. One scatterlist
5050 + * item may need more than one block for the reasons
5051 + * mentioned above.
5052 + */
5053 + for (i = 0; i < nr_blocks; i++) {
5054 + lli = chan->block[i].lli_vaddr;
5055 + if (lli_prev) {
5056 + lli_prev->llp = chan->block[i].lli_dma_addr;
5057 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5058 + i - 1, chan->block[i - 1].lli_vaddr,
5059 + chan->block[i - 1].lli_dma_addr,
5060 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5061 + lli_prev->ctllo, lli_prev->ctlhi);
5062 + }
5063 + lli->llp = 0;
5064 + lli->ctllo = ctllo;
5065 + lli->ctlhi = ctlhi;
5066 + if (direction == DMA_TO_DEVICE) {
5067 + lli->sar = req->sg[j].dma_address + offset;
5068 + lli->dar = req->data_reg;
5069 + } else {
5070 + lli->sar = req->data_reg;
5071 + lli->dar = req->sg[j].dma_address + offset;
5072 + }
5073 + lli_prev = lli;
5074 +
5075 + offset += block_size;
5076 + if (offset > req->sg[j].length) {
5077 + j++;
5078 + offset = 0;
5079 + }
5080 + }
5081 +
5082 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5083 + i - 1, chan->block[i - 1].lli_vaddr,
5084 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5085 + lli_prev->dar, lli_prev->llp,
5086 + lli_prev->ctllo, lli_prev->ctlhi);
5087 +
5088 + /*
5089 + * SAR, DAR and CTL are initialized from the LLI. We
5090 + * only have to enable the LLI bits in CTL.
5091 + */
5092 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
5093 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5094 + chan->block[0].lli_dma_addr);
5095 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5096 + }
5097 +
5098 + set_channel_bit(dmac, MASK_XFER, req->req.channel);
5099 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5100 + if (req->req.block_complete)
5101 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5102 + else
5103 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5104 +
5105 + return 0;
5106 +
5107 +out_unclaim_channel:
5108 + chan->state = CH_STATE_ALLOCATED;
5109 + return ret;
5110 +}
5111 +
5112 +static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
5113 + struct dma_request_cyclic *req)
5114 +{
5115 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5116 + struct dw_dma_channel *chan;
5117 + unsigned long ctlhi, ctllo, cfghi, cfglo;
5118 + unsigned long block_size;
5119 + int ret, i, direction;
5120 + unsigned long flags;
5121 +
5122 + spin_lock_irqsave(&dmac->lock, flags);
5123 +
5124 + block_size = (req->buffer_size/req->periods) >> req->width;
5125 +
5126 + ret = -EINVAL;
5127 + if (req->req.channel >= DMAC_NR_CHANNELS
5128 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
5129 + || (req->periods == 0)
5130 + || block_size > DMAC_MAX_BLOCKSIZE) {
5131 + spin_unlock_irqrestore(&dmac->lock, flags);
5132 + return -EINVAL;
5133 + }
5134 +
5135 + chan = &dmac->channel[req->req.channel];
5136 + chan->state = CH_STATE_BUSY;
5137 + chan->is_cyclic = 1;
5138 + chan->req_cyclic = req;
5139 +
5140 + /*
5141 + * We have marked the channel as busy, so no need to keep the
5142 + * lock as long as we only touch the channel-specific
5143 + * registers
5144 + */
5145 + spin_unlock_irqrestore(&dmac->lock, flags);
5146 +
5147 + /*
5148 + Setup
5149 + */
5150 + BUG_ON(req->buffer_size % req->periods);
5151 + /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
5152 +
5153 + chan->nr_blocks = req->periods;
5154 +
5155 + ret = -EINVAL;
5156 + cfglo = cfghi = 0;
5157 + switch (req->direction) {
5158 + case DMA_DIR_MEM_TO_PERIPH:
5159 + direction = DMA_TO_DEVICE;
5160 + cfghi = req->periph_id << (43 - 32);
5161 + break;
5162 +
5163 + case DMA_DIR_PERIPH_TO_MEM:
5164 + direction = DMA_FROM_DEVICE;
5165 + cfghi = req->periph_id << (39 - 32);
5166 + break;
5167 + default:
5168 + goto out_unclaim_channel;
5169 + }
5170 +
5171 + chan->direction = direction;
5172 +
5173 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5174 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5175 +
5176 + ctlhi = block_size;
5177 + ctllo = ((req->direction << 20)
5178 + | (req->width << 4) | (req->width << 1)
5179 + | (1 << 0)); // interrupt enable
5180 +
5181 + {
5182 + struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
5183 +
5184 + ret = -ENOMEM;
5185 + chan->block = allocate_blocks(dmac, req->periods);
5186 + if (!chan->block)
5187 + goto out_unclaim_channel;
5188 +
5189 + if (direction == DMA_TO_DEVICE)
5190 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5191 + else
5192 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5193 +
5194 + /*
5195 + * Set up a linked list items where each period gets
5196 + * an item. The linked list item for the last period
5197 + * points back to the star of the buffer making a
5198 + * cyclic buffer.
5199 + */
5200 + for (i = 0; i < req->periods; i++) {
5201 + lli = chan->block[i].lli_vaddr;
5202 + if (lli_prev) {
5203 + lli_prev->llp = chan->block[i].lli_dma_addr;
5204 + /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5205 + i - 1, chan->block[i - 1].lli_vaddr,
5206 + chan->block[i - 1].lli_dma_addr,
5207 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5208 + lli_prev->ctllo, lli_prev->ctlhi);*/
5209 + }
5210 + lli->llp = 0;
5211 + lli->ctllo = ctllo;
5212 + lli->ctlhi = ctlhi;
5213 + if (direction == DMA_TO_DEVICE) {
5214 + lli->sar = req->buffer_start + i*(block_size << req->width);
5215 + lli->dar = req->data_reg;
5216 + } else {
5217 + lli->sar = req->data_reg;
5218 + lli->dar = req->buffer_start + i*(block_size << req->width);
5219 + }
5220 + lli_prev = lli;
5221 + }
5222 + lli->llp = chan->block[0].lli_dma_addr;
5223 +
5224 + /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5225 + i - 1, chan->block[i - 1].lli_vaddr,
5226 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5227 + lli_prev->dar, lli_prev->llp,
5228 + lli_prev->ctllo, lli_prev->ctlhi); */
5229 +
5230 + /*
5231 + * SAR, DAR and CTL are initialized from the LLI. We
5232 + * only have to enable the LLI bits in CTL.
5233 + */
5234 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5235 + chan->block[0].lli_dma_addr);
5236 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5237 + }
5238 +
5239 + clear_channel_bit(dmac, MASK_XFER, req->req.channel);
5240 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5241 + if (req->req.block_complete)
5242 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5243 + else
5244 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5245 +
5246 + return 0;
5247 +
5248 +out_unclaim_channel:
5249 + chan->state = CH_STATE_ALLOCATED;
5250 + return ret;
5251 +}
5252 +
5253 +static int dmac_start_request(struct dma_controller *_dmac,
5254 + unsigned int channel)
5255 +{
5256 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5257 +
5258 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5259 +
5260 + set_channel_bit(dmac, CH_EN, channel);
5261 +
5262 + return 0;
5263 +}
5264 +
5265 +static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
5266 + unsigned int channel)
5267 +{
5268 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5269 + struct dw_dma_channel *chan;
5270 + dma_addr_t current_pos;
5271 +
5272 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5273 +
5274 + chan = &dmac->channel[channel];
5275 +
5276 + switch (chan->direction) {
5277 + case DMA_TO_DEVICE:
5278 + current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
5279 + break;
5280 + case DMA_FROM_DEVICE:
5281 + current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
5282 + break;
5283 + default:
5284 + return 0;
5285 + }
5286 +
5287 +
5288 + if (!current_pos) {
5289 + if (chan->is_cyclic) {
5290 + current_pos = chan->req_cyclic->buffer_start;
5291 + } else {
5292 + current_pos = chan->req_sg->sg->dma_address;
5293 + }
5294 + }
5295 +
5296 + return current_pos;
5297 +}
5298 +
5299 +
5300 +static int dmac_stop_request(struct dma_controller *_dmac,
5301 + unsigned int channel)
5302 +{
5303 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5304 + struct dw_dma_channel *chan;
5305 +
5306 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5307 +
5308 + chan = &dmac->channel[channel];
5309 + pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
5310 + chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
5311 + dmac_chan_readl_lo(dmac, channel, DAR),
5312 + dmac_chan_readl_lo(dmac, channel, LLP),
5313 + dmac_chan_readl_hi(dmac, channel, CTL),
5314 + dmac_chan_readl_lo(dmac, channel, CTL));
5315 +
5316 + if (chan->state == CH_STATE_BUSY) {
5317 + clear_channel_bit(dmac, CH_EN, channel);
5318 + cleanup_channel(dmac, &dmac->channel[channel]);
5319 + }
5320 +
5321 + return 0;
5322 +}
5323 +
5324 +
5325 +static void dmac_block_complete(struct dw_dma_controller *dmac)
5326 +{
5327 + struct dw_dma_channel *chan;
5328 + unsigned long status, chanid;
5329 +
5330 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5331 +
5332 + while (status) {
5333 + struct dma_request *req;
5334 + chanid = __ffs(status);
5335 + chan = &dmac->channel[chanid];
5336 +
5337 + if (chan->is_cyclic) {
5338 + BUG_ON(!chan->req_cyclic
5339 + || !chan->req_cyclic->req.block_complete);
5340 + req = &chan->req_cyclic->req;
5341 + } else {
5342 + BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
5343 + req = &chan->req_sg->req;
5344 + }
5345 + dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
5346 + req->block_complete(req);
5347 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5348 + }
5349 +}
5350 +
5351 +static void dmac_xfer_complete(struct dw_dma_controller *dmac)
5352 +{
5353 + struct dw_dma_channel *chan;
5354 + struct dma_request *req;
5355 + unsigned long status, chanid;
5356 +
5357 + status = dmac_readl_lo(dmac, STATUS_XFER);
5358 +
5359 + while (status) {
5360 + chanid = __ffs(status);
5361 + chan = &dmac->channel[chanid];
5362 +
5363 + dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
5364 +
5365 + req = &chan->req_sg->req;
5366 + BUG_ON(!req);
5367 + cleanup_channel(dmac, chan);
5368 + if (req->xfer_complete)
5369 + req->xfer_complete(req);
5370 +
5371 + status = dmac_readl_lo(dmac, STATUS_XFER);
5372 + }
5373 +}
5374 +
5375 +static void dmac_error(struct dw_dma_controller *dmac)
5376 +{
5377 + struct dw_dma_channel *chan;
5378 + unsigned long status, chanid;
5379 +
5380 + status = dmac_readl_lo(dmac, STATUS_ERROR);
5381 +
5382 + while (status) {
5383 + struct dma_request *req;
5384 +
5385 + chanid = __ffs(status);
5386 + chan = &dmac->channel[chanid];
5387 +
5388 + dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
5389 + clear_channel_bit(dmac, CH_EN, chanid);
5390 +
5391 + if (chan->is_cyclic) {
5392 + BUG_ON(!chan->req_cyclic);
5393 + req = &chan->req_cyclic->req;
5394 + } else {
5395 + BUG_ON(!chan->req_sg);
5396 + req = &chan->req_sg->req;
5397 + }
5398 +
5399 + cleanup_channel(dmac, chan);
5400 + if (req->error)
5401 + req->error(req);
5402 +
5403 + status = dmac_readl_lo(dmac, STATUS_XFER);
5404 + }
5405 +}
5406 +
5407 +static irqreturn_t dmac_interrupt(int irq, void *dev_id)
5408 +{
5409 + struct dw_dma_controller *dmac = dev_id;
5410 + unsigned long status;
5411 + int ret = IRQ_NONE;
5412 +
5413 + spin_lock(&dmac->lock);
5414 +
5415 + status = dmac_readl_lo(dmac, STATUS_INT);
5416 +
5417 + while (status) {
5418 + ret = IRQ_HANDLED;
5419 + if (status & 0x10)
5420 + dmac_error(dmac);
5421 + if (status & 0x02)
5422 + dmac_block_complete(dmac);
5423 + if (status & 0x01)
5424 + dmac_xfer_complete(dmac);
5425 +
5426 + status = dmac_readl_lo(dmac, STATUS_INT);
5427 + }
5428 +
5429 + spin_unlock(&dmac->lock);
5430 + return ret;
5431 +}
5432 +
5433 +static int __devinit dmac_probe(struct platform_device *pdev)
5434 +{
5435 + struct dw_dma_controller *dmac;
5436 + struct resource *regs;
5437 + int ret;
5438 +
5439 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5440 + if (!regs)
5441 + return -ENXIO;
5442 +
5443 + dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
5444 + if (!dmac)
5445 + return -ENOMEM;
5446 + memset(dmac, 0, sizeof(*dmac));
5447 +
5448 + dmac->hclk = clk_get(&pdev->dev, "hclk");
5449 + if (IS_ERR(dmac->hclk)) {
5450 + ret = PTR_ERR(dmac->hclk);
5451 + goto out_free_dmac;
5452 + }
5453 + clk_enable(dmac->hclk);
5454 +
5455 + ret = -ENOMEM;
5456 + dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
5457 + sizeof(struct dw_dma_lli), 4, 0);
5458 + if (!dmac->lli_pool)
5459 + goto out_disable_clk;
5460 +
5461 + spin_lock_init(&dmac->lock);
5462 + dmac->dma.dev = &pdev->dev;
5463 + dmac->dma.alloc_channel = dmac_alloc_channel;
5464 + dmac->dma.release_channel = dmac_release_channel;
5465 + dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
5466 + dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
5467 + dmac->dma.start_request = dmac_start_request;
5468 + dmac->dma.stop_request = dmac_stop_request;
5469 + dmac->dma.get_current_pos = dmac_get_current_pos;
5470 +
5471 + dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
5472 + if (!dmac->regs)
5473 + goto out_free_pool;
5474 +
5475 + ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
5476 + IRQF_SAMPLE_RANDOM, pdev->name, dmac);
5477 + if (ret)
5478 + goto out_unmap_regs;
5479 +
5480 + /* Enable the DMA controller */
5481 + dmac_writel_lo(dmac, CFG, 1);
5482 +
5483 + register_dma_controller(&dmac->dma);
5484 +
5485 + printk(KERN_INFO
5486 + "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
5487 + dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
5488 +
5489 + return 0;
5490 +
5491 +out_unmap_regs:
5492 + iounmap(dmac->regs);
5493 +out_free_pool:
5494 + dma_pool_destroy(dmac->lli_pool);
5495 +out_disable_clk:
5496 + clk_disable(dmac->hclk);
5497 + clk_put(dmac->hclk);
5498 +out_free_dmac:
5499 + kfree(dmac);
5500 + return ret;
5501 +}
5502 +
5503 +static struct platform_driver dmac_driver = {
5504 + .probe = dmac_probe,
5505 + .driver = {
5506 + .name = "dmaca",
5507 + },
5508 +};
5509 +
5510 +static int __init dmac_init(void)
5511 +{
5512 + return platform_driver_register(&dmac_driver);
5513 +}
5514 +subsys_initcall(dmac_init);
5515 +
5516 +static void __exit dmac_exit(void)
5517 +{
5518 + platform_driver_unregister(&dmac_driver);
5519 +}
5520 +module_exit(dmac_exit);
5521 +
5522 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
5523 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
5524 +MODULE_LICENSE("GPL");
5525 diff -urN linux-2.6.24.3/arch/avr32/drivers/dw-dmac.h avr32-2.6/arch/avr32/drivers/dw-dmac.h
5526 --- linux-2.6.24.3/arch/avr32/drivers/dw-dmac.h 1970-01-01 01:00:00.000000000 +0100
5527 +++ avr32-2.6/arch/avr32/drivers/dw-dmac.h 2008-04-23 19:33:28.000000000 +0200
5528 @@ -0,0 +1,42 @@
5529 +/*
5530 + * Driver for the Synopsys DesignWare DMA Controller
5531 + *
5532 + * Copyright (C) 2005-2006 Atmel Corporation
5533 + *
5534 + * This program is free software; you can redistribute it and/or modify
5535 + * it under the terms of the GNU General Public License version 2 as
5536 + * published by the Free Software Foundation.
5537 + */
5538 +#ifndef __AVR32_DW_DMAC_H__
5539 +#define __AVR32_DW_DMAC_H__
5540 +
5541 +#define DW_DMAC_CFG 0x398
5542 +#define DW_DMAC_CH_EN 0x3a0
5543 +
5544 +#define DW_DMAC_STATUS_XFER 0x2e8
5545 +#define DW_DMAC_STATUS_BLOCK 0x2f0
5546 +#define DW_DMAC_STATUS_ERROR 0x308
5547 +
5548 +#define DW_DMAC_MASK_XFER 0x310
5549 +#define DW_DMAC_MASK_BLOCK 0x318
5550 +#define DW_DMAC_MASK_ERROR 0x330
5551 +
5552 +#define DW_DMAC_CLEAR_XFER 0x338
5553 +#define DW_DMAC_CLEAR_BLOCK 0x340
5554 +#define DW_DMAC_CLEAR_ERROR 0x358
5555 +
5556 +#define DW_DMAC_STATUS_INT 0x360
5557 +
5558 +#define DW_DMAC_CHAN_SAR 0x000
5559 +#define DW_DMAC_CHAN_DAR 0x008
5560 +#define DW_DMAC_CHAN_LLP 0x010
5561 +#define DW_DMAC_CHAN_CTL 0x018
5562 +#define DW_DMAC_CHAN_SSTAT 0x020
5563 +#define DW_DMAC_CHAN_DSTAT 0x028
5564 +#define DW_DMAC_CHAN_SSTATAR 0x030
5565 +#define DW_DMAC_CHAN_DSTATAR 0x038
5566 +#define DW_DMAC_CHAN_CFG 0x040
5567 +#define DW_DMAC_CHAN_SGR 0x048
5568 +#define DW_DMAC_CHAN_DSR 0x050
5569 +
5570 +#endif /* __AVR32_DW_DMAC_H__ */
5571 diff -urN linux-2.6.24.3/arch/avr32/drivers/Makefile avr32-2.6/arch/avr32/drivers/Makefile
5572 --- linux-2.6.24.3/arch/avr32/drivers/Makefile 1970-01-01 01:00:00.000000000 +0100
5573 +++ avr32-2.6/arch/avr32/drivers/Makefile 2008-04-23 19:33:28.000000000 +0200
5574 @@ -0,0 +1 @@
5575 +obj-$(CONFIG_DW_DMAC) += dw-dmac.o
5576 diff -urN linux-2.6.24.3/arch/avr32/Kconfig avr32-2.6/arch/avr32/Kconfig
5577 --- linux-2.6.24.3/arch/avr32/Kconfig 2008-02-26 01:20:20.000000000 +0100
5578 +++ avr32-2.6/arch/avr32/Kconfig 2008-04-23 20:12:35.000000000 +0200
5579 @@ -45,6 +45,9 @@
5580 config GENERIC_TIME
5581 def_bool y
5582
5583 +config GENERIC_CLOCKEVENTS
5584 + def_bool y
5585 +
5586 config RWSEM_XCHGADD_ALGORITHM
5587 def_bool n
5588
5589 @@ -54,6 +57,9 @@
5590 config ARCH_HAS_ILOG2_U64
5591 def_bool n
5592
5593 +config ARCH_SUPPORTS_OPROFILE
5594 + def_bool y
5595 +
5596 config GENERIC_HWEIGHT
5597 def_bool y
5598
5599 @@ -68,6 +74,8 @@
5600
5601 menu "System Type and features"
5602
5603 +source "kernel/time/Kconfig"
5604 +
5605 config SUBARCH_AVR32B
5606 bool
5607 config MMU
5608 @@ -81,19 +89,23 @@
5609 select MMU
5610 select PERFORMANCE_COUNTERS
5611
5612 -choice
5613 - prompt "AVR32 CPU type"
5614 - default CPU_AT32AP7000
5615 +#
5616 +# CPU types
5617 +#
5618
5619 -config CPU_AT32AP7000
5620 - bool "AT32AP7000"
5621 +# AP7000 derivatives
5622 +config CPU_AT32AP700X
5623 + bool
5624 select PLATFORM_AT32AP
5625 -endchoice
5626 -
5627 -#
5628 -# CPU Daughterboards for ATSTK1000
5629 -config BOARD_ATSTK1002
5630 +config CPU_AT32AP7000
5631 + bool
5632 + select CPU_AT32AP700X
5633 +config CPU_AT32AP7001
5634 + bool
5635 + select CPU_AT32AP700X
5636 +config CPU_AT32AP7002
5637 bool
5638 + select CPU_AT32AP700X
5639
5640 choice
5641 prompt "AVR32 board type"
5642 @@ -101,15 +113,18 @@
5643
5644 config BOARD_ATSTK1000
5645 bool "ATSTK1000 evaluation board"
5646 - select BOARD_ATSTK1002 if CPU_AT32AP7000
5647
5648 config BOARD_ATNGW100
5649 bool "ATNGW100 Network Gateway"
5650 + select CPU_AT32AP7000
5651 endchoice
5652
5653 if BOARD_ATSTK1000
5654 source "arch/avr32/boards/atstk1000/Kconfig"
5655 endif
5656 +if BOARD_ATNGW100
5657 +source "arch/avr32/boards/atngw100/Kconfig"
5658 +endif
5659
5660 choice
5661 prompt "Boot loader type"
5662 @@ -123,15 +138,15 @@
5663
5664 config LOAD_ADDRESS
5665 hex
5666 - default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5667 + default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5668
5669 config ENTRY_ADDRESS
5670 hex
5671 - default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5672 + default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5673
5674 config PHYS_OFFSET
5675 hex
5676 - default 0x10000000 if CPU_AT32AP7000=y
5677 + default 0x10000000 if CPU_AT32AP700X=y
5678
5679 source "kernel/Kconfig.preempt"
5680
5681 @@ -163,6 +178,20 @@
5682 enabling Nexus-compliant debuggers to keep track of the PID of the
5683 currently executing task.
5684
5685 +config NMI_DEBUGGING
5686 + bool "NMI Debugging"
5687 + default n
5688 + help
5689 + Say Y here and pass the nmi_debug command-line parameter to
5690 + the kernel to turn on NMI debugging. Depending on the value
5691 + of the nmi_debug option, various pieces of information will
5692 + be dumped to the console when a Non-Maskable Interrupt
5693 + happens.
5694 +
5695 +config DW_DMAC
5696 + tristate "Synopsys DesignWare DMA Controller support"
5697 + default y if CPU_AT32AP7000
5698 +
5699 # FPU emulation goes here
5700
5701 source "kernel/Kconfig.hz"
5702 @@ -219,6 +248,8 @@
5703
5704 source "fs/Kconfig"
5705
5706 +source "kernel/Kconfig.instrumentation"
5707 +
5708 source "arch/avr32/Kconfig.debug"
5709
5710 source "security/Kconfig"
5711 diff -urN linux-2.6.24.3/arch/avr32/Kconfig.debug avr32-2.6/arch/avr32/Kconfig.debug
5712 --- linux-2.6.24.3/arch/avr32/Kconfig.debug 2008-02-26 01:20:20.000000000 +0100
5713 +++ avr32-2.6/arch/avr32/Kconfig.debug 2008-04-23 19:33:28.000000000 +0200
5714 @@ -6,14 +6,4 @@
5715
5716 source "lib/Kconfig.debug"
5717
5718 -config KPROBES
5719 - bool "Kprobes"
5720 - depends on DEBUG_KERNEL
5721 - help
5722 - Kprobes allows you to trap at almost any kernel address and
5723 - execute a callback function. register_kprobe() establishes
5724 - a probepoint and specifies the callback. Kprobes is useful
5725 - for kernel debugging, non-intrusive instrumentation and testing.
5726 - If in doubt, say "N".
5727 -
5728 endmenu
5729 diff -urN linux-2.6.24.3/arch/avr32/kernel/cpu.c avr32-2.6/arch/avr32/kernel/cpu.c
5730 --- linux-2.6.24.3/arch/avr32/kernel/cpu.c 2008-02-26 01:20:20.000000000 +0100
5731 +++ avr32-2.6/arch/avr32/kernel/cpu.c 2008-04-23 19:33:28.000000000 +0200
5732 @@ -13,6 +13,7 @@
5733 #include <linux/percpu.h>
5734 #include <linux/param.h>
5735 #include <linux/errno.h>
5736 +#include <linux/clk.h>
5737
5738 #include <asm/setup.h>
5739 #include <asm/sysreg.h>
5740 @@ -187,9 +188,20 @@
5741
5742 subsys_initcall(topology_init);
5743
5744 +struct chip_id_map {
5745 + u16 mid;
5746 + u16 pn;
5747 + const char *name;
5748 +};
5749 +
5750 +static const struct chip_id_map chip_names[] = {
5751 + { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
5752 +};
5753 +#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
5754 +
5755 static const char *cpu_names[] = {
5756 "Morgan",
5757 - "AP7000",
5758 + "AP7",
5759 };
5760 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
5761
5762 @@ -206,12 +218,32 @@
5763 "MPU"
5764 };
5765
5766 +static const char *cpu_feature_flags[] = {
5767 + "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
5768 +};
5769 +
5770 +static const char *get_chip_name(struct avr32_cpuinfo *cpu)
5771 +{
5772 + unsigned int i;
5773 + unsigned int mid = avr32_get_manufacturer_id(cpu);
5774 + unsigned int pn = avr32_get_product_number(cpu);
5775 +
5776 + for (i = 0; i < NR_CHIP_NAMES; i++) {
5777 + if (chip_names[i].mid == mid && chip_names[i].pn == pn)
5778 + return chip_names[i].name;
5779 + }
5780 +
5781 + return "(unknown)";
5782 +}
5783 +
5784 void __init setup_processor(void)
5785 {
5786 unsigned long config0, config1;
5787 unsigned long features;
5788 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
5789 + unsigned device_id;
5790 unsigned tmp;
5791 + unsigned i;
5792
5793 config0 = sysreg_read(CONFIG0);
5794 config1 = sysreg_read(CONFIG1);
5795 @@ -221,11 +253,14 @@
5796 arch_rev = SYSREG_BFEXT(AR, config0);
5797 mmu_type = SYSREG_BFEXT(MMUT, config0);
5798
5799 + device_id = ocd_read(DID);
5800 +
5801 boot_cpu_data.arch_type = arch_id;
5802 boot_cpu_data.cpu_type = cpu_id;
5803 boot_cpu_data.arch_revision = arch_rev;
5804 boot_cpu_data.cpu_revision = cpu_rev;
5805 boot_cpu_data.tlb_config = mmu_type;
5806 + boot_cpu_data.device_id = device_id;
5807
5808 tmp = SYSREG_BFEXT(ILSZ, config1);
5809 if (tmp) {
5810 @@ -247,41 +282,34 @@
5811 return;
5812 }
5813
5814 - printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
5815 + printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
5816 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5817 + printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
5818 cpu_names[cpu_id], cpu_id, cpu_rev,
5819 arch_names[arch_id], arch_rev);
5820 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
5821
5822 printk ("CPU: features:");
5823 features = 0;
5824 - if (config0 & SYSREG_BIT(CONFIG0_R)) {
5825 + if (config0 & SYSREG_BIT(CONFIG0_R))
5826 features |= AVR32_FEATURE_RMW;
5827 - printk(" rmw");
5828 - }
5829 - if (config0 & SYSREG_BIT(CONFIG0_D)) {
5830 + if (config0 & SYSREG_BIT(CONFIG0_D))
5831 features |= AVR32_FEATURE_DSP;
5832 - printk(" dsp");
5833 - }
5834 - if (config0 & SYSREG_BIT(CONFIG0_S)) {
5835 + if (config0 & SYSREG_BIT(CONFIG0_S))
5836 features |= AVR32_FEATURE_SIMD;
5837 - printk(" simd");
5838 - }
5839 - if (config0 & SYSREG_BIT(CONFIG0_O)) {
5840 + if (config0 & SYSREG_BIT(CONFIG0_O))
5841 features |= AVR32_FEATURE_OCD;
5842 - printk(" ocd");
5843 - }
5844 - if (config0 & SYSREG_BIT(CONFIG0_P)) {
5845 + if (config0 & SYSREG_BIT(CONFIG0_P))
5846 features |= AVR32_FEATURE_PCTR;
5847 - printk(" perfctr");
5848 - }
5849 - if (config0 & SYSREG_BIT(CONFIG0_J)) {
5850 + if (config0 & SYSREG_BIT(CONFIG0_J))
5851 features |= AVR32_FEATURE_JAVA;
5852 - printk(" java");
5853 - }
5854 - if (config0 & SYSREG_BIT(CONFIG0_F)) {
5855 + if (config0 & SYSREG_BIT(CONFIG0_F))
5856 features |= AVR32_FEATURE_FPU;
5857 - printk(" fpu");
5858 - }
5859 +
5860 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5861 + if (features & (1 << i))
5862 + printk(" %s", cpu_feature_flags[i]);
5863 +
5864 printk("\n");
5865 boot_cpu_data.features = features;
5866 }
5867 @@ -291,6 +319,8 @@
5868 {
5869 unsigned int icache_size, dcache_size;
5870 unsigned int cpu = smp_processor_id();
5871 + unsigned int freq;
5872 + unsigned int i;
5873
5874 icache_size = boot_cpu_data.icache.ways *
5875 boot_cpu_data.icache.sets *
5876 @@ -301,15 +331,21 @@
5877
5878 seq_printf(m, "processor\t: %d\n", cpu);
5879
5880 + seq_printf(m, "chip type\t: %s revision %c\n",
5881 + get_chip_name(&boot_cpu_data),
5882 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5883 if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
5884 - seq_printf(m, "cpu family\t: %s revision %d\n",
5885 + seq_printf(m, "cpu arch\t: %s revision %d\n",
5886 arch_names[boot_cpu_data.arch_type],
5887 boot_cpu_data.arch_revision);
5888 if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
5889 - seq_printf(m, "cpu type\t: %s revision %d\n",
5890 + seq_printf(m, "cpu core\t: %s revision %d\n",
5891 cpu_names[boot_cpu_data.cpu_type],
5892 boot_cpu_data.cpu_revision);
5893
5894 + freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
5895 + seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
5896 +
5897 seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
5898 icache_size >> 10,
5899 boot_cpu_data.icache.ways,
5900 @@ -320,7 +356,13 @@
5901 boot_cpu_data.dcache.ways,
5902 boot_cpu_data.dcache.sets,
5903 boot_cpu_data.dcache.linesz);
5904 - seq_printf(m, "bogomips\t: %lu.%02lu\n",
5905 +
5906 + seq_printf(m, "features\t:");
5907 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5908 + if (boot_cpu_data.features & (1 << i))
5909 + seq_printf(m, " %s", cpu_feature_flags[i]);
5910 +
5911 + seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
5912 boot_cpu_data.loops_per_jiffy / (500000/HZ),
5913 (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
5914
5915 @@ -343,7 +385,7 @@
5916
5917 }
5918
5919 -struct seq_operations cpuinfo_op = {
5920 +const struct seq_operations cpuinfo_op = {
5921 .start = c_start,
5922 .next = c_next,
5923 .stop = c_stop,
5924 diff -urN linux-2.6.24.3/arch/avr32/kernel/dma-controller.c avr32-2.6/arch/avr32/kernel/dma-controller.c
5925 --- linux-2.6.24.3/arch/avr32/kernel/dma-controller.c 1970-01-01 01:00:00.000000000 +0100
5926 +++ avr32-2.6/arch/avr32/kernel/dma-controller.c 2008-04-23 19:33:28.000000000 +0200
5927 @@ -0,0 +1,34 @@
5928 +/*
5929 + * Preliminary DMA controller framework for AVR32
5930 + *
5931 + * Copyright (C) 2005-2006 Atmel Corporation
5932 + *
5933 + * This program is free software; you can redistribute it and/or modify
5934 + * it under the terms of the GNU General Public License version 2 as
5935 + * published by the Free Software Foundation.
5936 + */
5937 +#include <asm/dma-controller.h>
5938 +
5939 +static LIST_HEAD(controllers);
5940 +
5941 +int register_dma_controller(struct dma_controller *dmac)
5942 +{
5943 + static int next_id;
5944 +
5945 + dmac->id = next_id++;
5946 + list_add_tail(&dmac->list, &controllers);
5947 +
5948 + return 0;
5949 +}
5950 +EXPORT_SYMBOL(register_dma_controller);
5951 +
5952 +struct dma_controller *find_dma_controller(int id)
5953 +{
5954 + struct dma_controller *dmac;
5955 +
5956 + list_for_each_entry(dmac, &controllers, list)
5957 + if (dmac->id == id)
5958 + return dmac;
5959 + return NULL;
5960 +}
5961 +EXPORT_SYMBOL(find_dma_controller);
5962 diff -urN linux-2.6.24.3/arch/avr32/kernel/entry-avr32b.S avr32-2.6/arch/avr32/kernel/entry-avr32b.S
5963 --- linux-2.6.24.3/arch/avr32/kernel/entry-avr32b.S 2008-02-26 01:20:20.000000000 +0100
5964 +++ avr32-2.6/arch/avr32/kernel/entry-avr32b.S 2008-04-23 20:12:35.000000000 +0200
5965 @@ -741,26 +741,6 @@
5966
5967 .section .irq.text,"ax",@progbits
5968
5969 -.global cpu_idle_sleep
5970 -cpu_idle_sleep:
5971 - mask_interrupts
5972 - get_thread_info r8
5973 - ld.w r9, r8[TI_flags]
5974 - bld r9, TIF_NEED_RESCHED
5975 - brcs cpu_idle_enable_int_and_exit
5976 - sbr r9, TIF_CPU_GOING_TO_SLEEP
5977 - st.w r8[TI_flags], r9
5978 - unmask_interrupts
5979 - sleep 0
5980 -cpu_idle_skip_sleep:
5981 - mask_interrupts
5982 - ld.w r9, r8[TI_flags]
5983 - cbr r9, TIF_CPU_GOING_TO_SLEEP
5984 - st.w r8[TI_flags], r9
5985 -cpu_idle_enable_int_and_exit:
5986 - unmask_interrupts
5987 - retal r12
5988 -
5989 .global irq_level0
5990 .global irq_level1
5991 .global irq_level2
5992 diff -urN linux-2.6.24.3/arch/avr32/kernel/irq.c avr32-2.6/arch/avr32/kernel/irq.c
5993 --- linux-2.6.24.3/arch/avr32/kernel/irq.c 2008-02-26 01:20:20.000000000 +0100
5994 +++ avr32-2.6/arch/avr32/kernel/irq.c 2008-04-23 19:33:28.000000000 +0200
5995 @@ -25,6 +25,17 @@
5996 printk("unexpected IRQ %u\n", irq);
5997 }
5998
5999 +/* May be overridden by platform code */
6000 +int __weak nmi_enable(void)
6001 +{
6002 + return -ENOSYS;
6003 +}
6004 +
6005 +void __weak nmi_disable(void)
6006 +{
6007 +
6008 +}
6009 +
6010 #ifdef CONFIG_PROC_FS
6011 int show_interrupts(struct seq_file *p, void *v)
6012 {
6013 diff -urN linux-2.6.24.3/arch/avr32/kernel/kprobes.c avr32-2.6/arch/avr32/kernel/kprobes.c
6014 --- linux-2.6.24.3/arch/avr32/kernel/kprobes.c 2008-02-26 01:20:20.000000000 +0100
6015 +++ avr32-2.6/arch/avr32/kernel/kprobes.c 2008-04-23 19:33:28.000000000 +0200
6016 @@ -48,6 +48,7 @@
6017 void __kprobes arch_arm_kprobe(struct kprobe *p)
6018 {
6019 pr_debug("arming kprobe at %p\n", p->addr);
6020 + ocd_enable(NULL);
6021 *p->addr = BREAKPOINT_INSTRUCTION;
6022 flush_icache_range((unsigned long)p->addr,
6023 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
6024 @@ -56,6 +57,7 @@
6025 void __kprobes arch_disarm_kprobe(struct kprobe *p)
6026 {
6027 pr_debug("disarming kprobe at %p\n", p->addr);
6028 + ocd_disable(NULL);
6029 *p->addr = p->opcode;
6030 flush_icache_range((unsigned long)p->addr,
6031 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
6032 @@ -260,9 +262,6 @@
6033
6034 int __init arch_init_kprobes(void)
6035 {
6036 - printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
6037 - ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6038 -
6039 /* TODO: Register kretprobe trampoline */
6040 return 0;
6041 }
6042 diff -urN linux-2.6.24.3/arch/avr32/kernel/Makefile avr32-2.6/arch/avr32/kernel/Makefile
6043 --- linux-2.6.24.3/arch/avr32/kernel/Makefile 2008-02-26 01:20:20.000000000 +0100
6044 +++ avr32-2.6/arch/avr32/kernel/Makefile 2008-04-23 19:33:28.000000000 +0200
6045 @@ -6,9 +6,11 @@
6046
6047 obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o
6048 obj-y += syscall_table.o syscall-stubs.o irq.o
6049 -obj-y += setup.o traps.o semaphore.o ptrace.o
6050 +obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o
6051 obj-y += signal.o sys_avr32.o process.o time.o
6052 obj-y += init_task.o switch_to.o cpu.o
6053 +obj-y += dma-controller.o
6054 obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
6055 obj-$(CONFIG_KPROBES) += kprobes.o
6056 obj-$(CONFIG_STACKTRACE) += stacktrace.o
6057 +obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o
6058 diff -urN linux-2.6.24.3/arch/avr32/kernel/nmi_debug.c avr32-2.6/arch/avr32/kernel/nmi_debug.c
6059 --- linux-2.6.24.3/arch/avr32/kernel/nmi_debug.c 1970-01-01 01:00:00.000000000 +0100
6060 +++ avr32-2.6/arch/avr32/kernel/nmi_debug.c 2008-04-23 19:33:28.000000000 +0200
6061 @@ -0,0 +1,82 @@
6062 +/*
6063 + * Copyright (C) 2007 Atmel Corporation
6064 + *
6065 + * This program is free software; you can redistribute it and/or modify
6066 + * it under the terms of the GNU General Public License version 2 as
6067 + * published by the Free Software Foundation.
6068 + */
6069 +#include <linux/delay.h>
6070 +#include <linux/kdebug.h>
6071 +#include <linux/notifier.h>
6072 +#include <linux/sched.h>
6073 +
6074 +#include <asm/irq.h>
6075 +
6076 +enum nmi_action {
6077 + NMI_SHOW_STATE = 1 << 0,
6078 + NMI_SHOW_REGS = 1 << 1,
6079 + NMI_DIE = 1 << 2,
6080 + NMI_DEBOUNCE = 1 << 3,
6081 +};
6082 +
6083 +static unsigned long nmi_actions;
6084 +
6085 +static int nmi_debug_notify(struct notifier_block *self,
6086 + unsigned long val, void *data)
6087 +{
6088 + struct die_args *args = data;
6089 +
6090 + if (likely(val != DIE_NMI))
6091 + return NOTIFY_DONE;
6092 +
6093 + if (nmi_actions & NMI_SHOW_STATE)
6094 + show_state();
6095 + if (nmi_actions & NMI_SHOW_REGS)
6096 + show_regs(args->regs);
6097 + if (nmi_actions & NMI_DEBOUNCE)
6098 + mdelay(10);
6099 + if (nmi_actions & NMI_DIE)
6100 + return NOTIFY_BAD;
6101 +
6102 + return NOTIFY_OK;
6103 +}
6104 +
6105 +static struct notifier_block nmi_debug_nb = {
6106 + .notifier_call = nmi_debug_notify,
6107 +};
6108 +
6109 +static int __init nmi_debug_setup(char *str)
6110 +{
6111 + char *p, *sep;
6112 +
6113 + register_die_notifier(&nmi_debug_nb);
6114 + if (nmi_enable()) {
6115 + printk(KERN_WARNING "Unable to enable NMI.\n");
6116 + return 0;
6117 + }
6118 +
6119 + if (*str != '=')
6120 + return 0;
6121 +
6122 + for (p = str + 1; *p; p = sep + 1) {
6123 + sep = strchr(p, ',');
6124 + if (sep)
6125 + *sep = 0;
6126 + if (strcmp(p, "state") == 0)
6127 + nmi_actions |= NMI_SHOW_STATE;
6128 + else if (strcmp(p, "regs") == 0)
6129 + nmi_actions |= NMI_SHOW_REGS;
6130 + else if (strcmp(p, "debounce") == 0)
6131 + nmi_actions |= NMI_DEBOUNCE;
6132 + else if (strcmp(p, "die") == 0)
6133 + nmi_actions |= NMI_DIE;
6134 + else
6135 + printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
6136 + p);
6137 + if (!sep)
6138 + break;
6139 + }
6140 +
6141 + return 0;
6142 +}
6143 +__setup("nmi_debug", nmi_debug_setup);
6144 diff -urN linux-2.6.24.3/arch/avr32/kernel/ocd.c avr32-2.6/arch/avr32/kernel/ocd.c
6145 --- linux-2.6.24.3/arch/avr32/kernel/ocd.c 1970-01-01 01:00:00.000000000 +0100
6146 +++ avr32-2.6/arch/avr32/kernel/ocd.c 2008-04-23 19:33:28.000000000 +0200
6147 @@ -0,0 +1,163 @@
6148 +/*
6149 + * Copyright (C) 2007 Atmel Corporation
6150 + *
6151 + * This program is free software; you can redistribute it and/or modify
6152 + * it under the terms of the GNU General Public License version 2 as
6153 + * published by the Free Software Foundation.
6154 + */
6155 +#include <linux/init.h>
6156 +#include <linux/sched.h>
6157 +#include <linux/spinlock.h>
6158 +
6159 +#include <asm/ocd.h>
6160 +
6161 +static long ocd_count;
6162 +static spinlock_t ocd_lock;
6163 +
6164 +/**
6165 + * ocd_enable - enable on-chip debugging
6166 + * @child: task to be debugged
6167 + *
6168 + * If @child is non-NULL, ocd_enable() first checks if debugging has
6169 + * already been enabled for @child, and if it has, does nothing.
6170 + *
6171 + * If @child is NULL (e.g. when debugging the kernel), or debugging
6172 + * has not already been enabled for it, ocd_enable() increments the
6173 + * reference count and enables the debugging hardware.
6174 + */
6175 +void ocd_enable(struct task_struct *child)
6176 +{
6177 + u32 dc;
6178 +
6179 + if (child)
6180 + pr_debug("ocd_enable: child=%s [%u]\n",
6181 + child->comm, child->pid);
6182 + else
6183 + pr_debug("ocd_enable (no child)\n");
6184 +
6185 + if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
6186 + spin_lock(&ocd_lock);
6187 + ocd_count++;
6188 + dc = ocd_read(DC);
6189 + dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
6190 + ocd_write(DC, dc);
6191 + spin_unlock(&ocd_lock);
6192 + }
6193 +}
6194 +
6195 +/**
6196 + * ocd_disable - disable on-chip debugging
6197 + * @child: task that was being debugged, but isn't anymore
6198 + *
6199 + * If @child is non-NULL, ocd_disable() checks if debugging is enabled
6200 + * for @child, and if it isn't, does nothing.
6201 + *
6202 + * If @child is NULL (e.g. when debugging the kernel), or debugging is
6203 + * enabled, ocd_disable() decrements the reference count, and if it
6204 + * reaches zero, disables the debugging hardware.
6205 + */
6206 +void ocd_disable(struct task_struct *child)
6207 +{
6208 + u32 dc;
6209 +
6210 + if (!child)
6211 + pr_debug("ocd_disable (no child)\n");
6212 + else if (test_tsk_thread_flag(child, TIF_DEBUG))
6213 + pr_debug("ocd_disable: child=%s [%u]\n",
6214 + child->comm, child->pid);
6215 +
6216 + if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
6217 + spin_lock(&ocd_lock);
6218 + ocd_count--;
6219 +
6220 + WARN_ON(ocd_count < 0);
6221 +
6222 + if (ocd_count <= 0) {
6223 + dc = ocd_read(DC);
6224 + dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6225 + ocd_write(DC, dc);
6226 + }
6227 + spin_unlock(&ocd_lock);
6228 + }
6229 +}
6230 +
6231 +#ifdef CONFIG_DEBUG_FS
6232 +#include <linux/debugfs.h>
6233 +#include <linux/module.h>
6234 +
6235 +static struct dentry *ocd_debugfs_root;
6236 +static struct dentry *ocd_debugfs_DC;
6237 +static struct dentry *ocd_debugfs_DS;
6238 +static struct dentry *ocd_debugfs_count;
6239 +
6240 +static u64 ocd_DC_get(void *data)
6241 +{
6242 + return ocd_read(DC);
6243 +}
6244 +static void ocd_DC_set(void *data, u64 val)
6245 +{
6246 + ocd_write(DC, val);
6247 +}
6248 +DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
6249 +
6250 +static u64 ocd_DS_get(void *data)
6251 +{
6252 + return ocd_read(DS);
6253 +}
6254 +DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
6255 +
6256 +static u64 ocd_count_get(void *data)
6257 +{
6258 + return ocd_count;
6259 +}
6260 +DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
6261 +
6262 +static void ocd_debugfs_init(void)
6263 +{
6264 + struct dentry *root;
6265 +
6266 + root = debugfs_create_dir("ocd", NULL);
6267 + if (IS_ERR(root) || !root)
6268 + goto err_root;
6269 + ocd_debugfs_root = root;
6270 +
6271 + ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
6272 + root, NULL, &fops_DC);
6273 + if (!ocd_debugfs_DC)
6274 + goto err_DC;
6275 +
6276 + ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
6277 + NULL, &fops_DS);
6278 + if (!ocd_debugfs_DS)
6279 + goto err_DS;
6280 +
6281 + ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
6282 + NULL, &fops_count);
6283 + if (!ocd_debugfs_count)
6284 + goto err_count;
6285 +
6286 + return;
6287 +
6288 +err_count:
6289 + debugfs_remove(ocd_debugfs_DS);
6290 +err_DS:
6291 + debugfs_remove(ocd_debugfs_DC);
6292 +err_DC:
6293 + debugfs_remove(ocd_debugfs_root);
6294 +err_root:
6295 + printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
6296 +}
6297 +#else
6298 +static inline void ocd_debugfs_init(void)
6299 +{
6300 +
6301 +}
6302 +#endif
6303 +
6304 +static int __init ocd_init(void)
6305 +{
6306 + spin_lock_init(&ocd_lock);
6307 + ocd_debugfs_init();
6308 + return 0;
6309 +}
6310 +arch_initcall(ocd_init);
6311 diff -urN linux-2.6.24.3/arch/avr32/kernel/process.c avr32-2.6/arch/avr32/kernel/process.c
6312 --- linux-2.6.24.3/arch/avr32/kernel/process.c 2008-02-26 01:20:20.000000000 +0100
6313 +++ avr32-2.6/arch/avr32/kernel/process.c 2008-04-23 20:12:35.000000000 +0200
6314 @@ -11,17 +11,18 @@
6315 #include <linux/fs.h>
6316 #include <linux/ptrace.h>
6317 #include <linux/reboot.h>
6318 +#include <linux/tick.h>
6319 #include <linux/uaccess.h>
6320 #include <linux/unistd.h>
6321
6322 #include <asm/sysreg.h>
6323 #include <asm/ocd.h>
6324
6325 +#include <asm/arch/pm.h>
6326 +
6327 void (*pm_power_off)(void) = NULL;
6328 EXPORT_SYMBOL(pm_power_off);
6329
6330 -extern void cpu_idle_sleep(void);
6331 -
6332 /*
6333 * This file handles the architecture-dependent parts of process handling..
6334 */
6335 @@ -30,8 +31,10 @@
6336 {
6337 /* endless idle loop with no priority at all */
6338 while (1) {
6339 + tick_nohz_stop_sched_tick();
6340 while (!need_resched())
6341 cpu_idle_sleep();
6342 + tick_nohz_restart_sched_tick();
6343 preempt_enable_no_resched();
6344 schedule();
6345 preempt_disable();
6346 @@ -103,7 +106,7 @@
6347 */
6348 void exit_thread(void)
6349 {
6350 - /* nothing to do */
6351 + ocd_disable(current);
6352 }
6353
6354 void flush_thread(void)
6355 @@ -345,6 +348,10 @@
6356 p->thread.cpu_context.ksp = (unsigned long)childregs;
6357 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
6358
6359 + clear_tsk_thread_flag(p, TIF_DEBUG);
6360 + if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
6361 + ocd_enable(p);
6362 +
6363 return 0;
6364 }
6365
6366 diff -urN linux-2.6.24.3/arch/avr32/kernel/ptrace.c avr32-2.6/arch/avr32/kernel/ptrace.c
6367 --- linux-2.6.24.3/arch/avr32/kernel/ptrace.c 2008-02-26 01:20:20.000000000 +0100
6368 +++ avr32-2.6/arch/avr32/kernel/ptrace.c 2008-04-23 19:33:28.000000000 +0200
6369 @@ -58,6 +58,7 @@
6370 {
6371 clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
6372 clear_tsk_thread_flag(child, TIF_BREAKPOINT);
6373 + ocd_disable(child);
6374 }
6375
6376 /*
6377 @@ -144,10 +145,6 @@
6378 {
6379 int ret;
6380
6381 - pr_debug("ptrace: Enabling monitor mode...\n");
6382 - ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
6383 - | (1 << OCD_DC_DBE_BIT));
6384 -
6385 switch (request) {
6386 /* Read the word at location addr in the child process */
6387 case PTRACE_PEEKTEXT:
6388 diff -urN linux-2.6.24.3/arch/avr32/kernel/setup.c avr32-2.6/arch/avr32/kernel/setup.c
6389 --- linux-2.6.24.3/arch/avr32/kernel/setup.c 2008-02-26 01:20:20.000000000 +0100
6390 +++ avr32-2.6/arch/avr32/kernel/setup.c 2008-04-23 20:12:35.000000000 +0200
6391 @@ -273,6 +273,8 @@
6392 printk(KERN_WARNING
6393 "Failed to allocate framebuffer memory\n");
6394 fbmem_size = 0;
6395 + } else {
6396 + memset(__va(fbmem_start), 0, fbmem_size);
6397 }
6398 }
6399
6400 diff -urN linux-2.6.24.3/arch/avr32/kernel/signal.c avr32-2.6/arch/avr32/kernel/signal.c
6401 --- linux-2.6.24.3/arch/avr32/kernel/signal.c 2008-02-26 01:20:20.000000000 +0100
6402 +++ avr32-2.6/arch/avr32/kernel/signal.c 2008-04-23 19:33:28.000000000 +0200
6403 @@ -270,19 +270,12 @@
6404 if (!user_mode(regs))
6405 return 0;
6406
6407 - if (try_to_freeze()) {
6408 - signr = 0;
6409 - if (!signal_pending(current))
6410 - goto no_signal;
6411 - }
6412 -
6413 if (test_thread_flag(TIF_RESTORE_SIGMASK))
6414 oldset = &current->saved_sigmask;
6415 else if (!oldset)
6416 oldset = &current->blocked;
6417
6418 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
6419 -no_signal:
6420 if (syscall) {
6421 switch (regs->r12) {
6422 case -ERESTART_RESTARTBLOCK:
6423 diff -urN linux-2.6.24.3/arch/avr32/kernel/time.c avr32-2.6/arch/avr32/kernel/time.c
6424 --- linux-2.6.24.3/arch/avr32/kernel/time.c 2008-02-26 01:20:20.000000000 +0100
6425 +++ avr32-2.6/arch/avr32/kernel/time.c 2008-04-23 20:12:35.000000000 +0200
6426 @@ -1,16 +1,12 @@
6427 /*
6428 * Copyright (C) 2004-2007 Atmel Corporation
6429 *
6430 - * Based on MIPS implementation arch/mips/kernel/time.c
6431 - * Copyright 2001 MontaVista Software Inc.
6432 - *
6433 * This program is free software; you can redistribute it and/or modify
6434 * it under the terms of the GNU General Public License version 2 as
6435 * published by the Free Software Foundation.
6436 */
6437 -
6438 #include <linux/clk.h>
6439 -#include <linux/clocksource.h>
6440 +#include <linux/clockchips.h>
6441 #include <linux/time.h>
6442 #include <linux/module.h>
6443 #include <linux/interrupt.h>
6444 @@ -27,207 +23,133 @@
6445 #include <asm/io.h>
6446 #include <asm/sections.h>
6447
6448 -/* how many counter cycles in a jiffy? */
6449 -static u32 cycles_per_jiffy;
6450 +#include <asm/arch/pm.h>
6451
6452 -/* the count value for the next timer interrupt */
6453 -static u32 expirelo;
6454
6455 -cycle_t __weak read_cycle_count(void)
6456 +static cycle_t read_cycle_count(void)
6457 {
6458 return (cycle_t)sysreg_read(COUNT);
6459 }
6460
6461 -struct clocksource __weak clocksource_avr32 = {
6462 - .name = "avr32",
6463 - .rating = 350,
6464 +/*
6465 + * The architectural cycle count registers are a fine clocksource unless
6466 + * the system idle loop use sleep states like "idle": the CPU cycles
6467 + * measured by COUNT (and COMPARE) don't happen during sleep states.
6468 + * Their duration also changes if cpufreq changes the CPU clock rate.
6469 + * So we rate the clocksource using COUNT as very low quality.
6470 + */
6471 +static struct clocksource counter = {
6472 + .name = "avr32_counter",
6473 + .rating = 50,
6474 .read = read_cycle_count,
6475 .mask = CLOCKSOURCE_MASK(32),
6476 .shift = 16,
6477 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
6478 };
6479
6480 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
6481 -
6482 -struct irqaction timer_irqaction = {
6483 - .handler = timer_interrupt,
6484 - .flags = IRQF_DISABLED,
6485 - .name = "timer",
6486 -};
6487 -
6488 -/*
6489 - * By default we provide the null RTC ops
6490 - */
6491 -static unsigned long null_rtc_get_time(void)
6492 +static irqreturn_t timer_interrupt(int irq, void *dev_id)
6493 {
6494 - return mktime(2007, 1, 1, 0, 0, 0);
6495 -}
6496 -
6497 -static int null_rtc_set_time(unsigned long sec)
6498 -{
6499 - return 0;
6500 -}
6501 + struct clock_event_device *evdev = dev_id;
6502
6503 -static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
6504 -static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
6505 -
6506 -static void avr32_timer_ack(void)
6507 -{
6508 - u32 count;
6509 -
6510 - /* Ack this timer interrupt and set the next one */
6511 - expirelo += cycles_per_jiffy;
6512 - /* setting COMPARE to 0 stops the COUNT-COMPARE */
6513 - if (expirelo == 0) {
6514 - sysreg_write(COMPARE, expirelo + 1);
6515 - } else {
6516 - sysreg_write(COMPARE, expirelo);
6517 - }
6518 + /*
6519 + * Disable the interrupt until the clockevent subsystem
6520 + * reprograms it.
6521 + */
6522 + sysreg_write(COMPARE, 0);
6523
6524 - /* Check to see if we have missed any timer interrupts */
6525 - count = sysreg_read(COUNT);
6526 - if ((count - expirelo) < 0x7fffffff) {
6527 - expirelo = count + cycles_per_jiffy;
6528 - sysreg_write(COMPARE, expirelo);
6529 - }
6530 + evdev->event_handler(evdev);
6531 + return IRQ_HANDLED;
6532 }
6533
6534 -int __weak avr32_hpt_init(void)
6535 -{
6536 - int ret;
6537 - unsigned long mult, shift, count_hz;
6538 -
6539 - count_hz = clk_get_rate(boot_cpu_data.clk);
6540 - shift = clocksource_avr32.shift;
6541 - mult = clocksource_hz2mult(count_hz, shift);
6542 - clocksource_avr32.mult = mult;
6543 -
6544 - {
6545 - u64 tmp;
6546 -
6547 - tmp = TICK_NSEC;
6548 - tmp <<= shift;
6549 - tmp += mult / 2;
6550 - do_div(tmp, mult);
6551 -
6552 - cycles_per_jiffy = tmp;
6553 - }
6554 +static struct irqaction timer_irqaction = {
6555 + .handler = timer_interrupt,
6556 + .flags = IRQF_TIMER | IRQF_DISABLED,
6557 + .name = "avr32_comparator",
6558 +};
6559
6560 - ret = setup_irq(0, &timer_irqaction);
6561 - if (ret) {
6562 - pr_debug("timer: could not request IRQ 0: %d\n", ret);
6563 - return -ENODEV;
6564 - }
6565 +static int comparator_next_event(unsigned long delta,
6566 + struct clock_event_device *evdev)
6567 +{
6568 + unsigned long flags;
6569
6570 - printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
6571 - "%lu.%03lu MHz\n",
6572 - ((count_hz + 500) / 1000) / 1000,
6573 - ((count_hz + 500) / 1000) % 1000);
6574 + raw_local_irq_save(flags);
6575
6576 - return 0;
6577 -}
6578 + /* The time to read COUNT then update COMPARE must be less
6579 + * than the min_delta_ns value for this clockevent source.
6580 + */
6581 + sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
6582
6583 -/*
6584 - * Taken from MIPS c0_hpt_timer_init().
6585 - *
6586 - * The reason COUNT is written twice is probably to make sure we don't get any
6587 - * timer interrupts while we are messing with the counter.
6588 - */
6589 -int __weak avr32_hpt_start(void)
6590 -{
6591 - u32 count = sysreg_read(COUNT);
6592 - expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
6593 - sysreg_write(COUNT, expirelo - cycles_per_jiffy);
6594 - sysreg_write(COMPARE, expirelo);
6595 - sysreg_write(COUNT, count);
6596 + raw_local_irq_restore(flags);
6597
6598 return 0;
6599 }
6600
6601 -/*
6602 - * local_timer_interrupt() does profiling and process accounting on a
6603 - * per-CPU basis.
6604 - *
6605 - * In UP mode, it is invoked from the (global) timer_interrupt.
6606 - */
6607 -void local_timer_interrupt(int irq, void *dev_id)
6608 +static void comparator_mode(enum clock_event_mode mode,
6609 + struct clock_event_device *evdev)
6610 {
6611 - if (current->pid)
6612 - profile_tick(CPU_PROFILING);
6613 - update_process_times(user_mode(get_irq_regs()));
6614 + switch (mode) {
6615 + case CLOCK_EVT_MODE_ONESHOT:
6616 + pr_debug("%s: start\n", evdev->name);
6617 + /* FALLTHROUGH */
6618 + case CLOCK_EVT_MODE_RESUME:
6619 + cpu_disable_idle_sleep();
6620 + break;
6621 + case CLOCK_EVT_MODE_UNUSED:
6622 + case CLOCK_EVT_MODE_SHUTDOWN:
6623 + sysreg_write(COMPARE, 0);
6624 + pr_debug("%s: stop\n", evdev->name);
6625 + cpu_enable_idle_sleep();
6626 + break;
6627 + default:
6628 + BUG();
6629 + }
6630 }
6631
6632 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
6633 -{
6634 - /* ack timer interrupt and try to set next interrupt */
6635 - avr32_timer_ack();
6636 -
6637 - /*
6638 - * Call the generic timer interrupt handler
6639 - */
6640 - write_seqlock(&xtime_lock);
6641 - do_timer(1);
6642 - write_sequnlock(&xtime_lock);
6643 -
6644 - /*
6645 - * In UP mode, we call local_timer_interrupt() to do profiling
6646 - * and process accounting.
6647 - *
6648 - * SMP is not supported yet.
6649 - */
6650 - local_timer_interrupt(irq, dev_id);
6651 -
6652 - return IRQ_HANDLED;
6653 -}
6654 +static struct clock_event_device comparator = {
6655 + .name = "avr32_comparator",
6656 + .features = CLOCK_EVT_FEAT_ONESHOT,
6657 + .shift = 16,
6658 + .rating = 50,
6659 + .cpumask = CPU_MASK_CPU0,
6660 + .set_next_event = comparator_next_event,
6661 + .set_mode = comparator_mode,
6662 +};
6663
6664 void __init time_init(void)
6665 {
6666 + unsigned long counter_hz;
6667 int ret;
6668
6669 - /*
6670 - * Make sure we don't get any COMPARE interrupts before we can
6671 - * handle them.
6672 - */
6673 - sysreg_write(COMPARE, 0);
6674 -
6675 - xtime.tv_sec = rtc_get_time();
6676 + xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
6677 xtime.tv_nsec = 0;
6678
6679 set_normalized_timespec(&wall_to_monotonic,
6680 -xtime.tv_sec, -xtime.tv_nsec);
6681
6682 - ret = avr32_hpt_init();
6683 - if (ret) {
6684 - pr_debug("timer: failed setup: %d\n", ret);
6685 - return;
6686 - }
6687 + /* figure rate for counter */
6688 + counter_hz = clk_get_rate(boot_cpu_data.clk);
6689 + counter.mult = clocksource_hz2mult(counter_hz, counter.shift);
6690
6691 - ret = clocksource_register(&clocksource_avr32);
6692 + ret = clocksource_register(&counter);
6693 if (ret)
6694 pr_debug("timer: could not register clocksource: %d\n", ret);
6695
6696 - ret = avr32_hpt_start();
6697 - if (ret) {
6698 - pr_debug("timer: failed starting: %d\n", ret);
6699 - return;
6700 - }
6701 -}
6702 + /* setup COMPARE clockevent */
6703 + comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
6704 + comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
6705 + comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
6706
6707 -static struct sysdev_class timer_class = {
6708 - set_kset_name("timer"),
6709 -};
6710 + sysreg_write(COMPARE, 0);
6711 + timer_irqaction.dev_id = &comparator;
6712
6713 -static struct sys_device timer_device = {
6714 - .id = 0,
6715 - .cls = &timer_class,
6716 -};
6717 + ret = setup_irq(0, &timer_irqaction);
6718 + if (ret)
6719 + pr_debug("timer: could not request IRQ 0: %d\n", ret);
6720 + else {
6721 + clockevents_register_device(&comparator);
6722
6723 -static int __init init_timer_sysfs(void)
6724 -{
6725 - int err = sysdev_class_register(&timer_class);
6726 - if (!err)
6727 - err = sysdev_register(&timer_device);
6728 - return err;
6729 + pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
6730 + ((counter_hz + 500) / 1000) / 1000,
6731 + ((counter_hz + 500) / 1000) % 1000);
6732 + }
6733 }
6734 -
6735 -device_initcall(init_timer_sysfs);
6736 diff -urN linux-2.6.24.3/arch/avr32/kernel/traps.c avr32-2.6/arch/avr32/kernel/traps.c
6737 --- linux-2.6.24.3/arch/avr32/kernel/traps.c 2008-02-26 01:20:20.000000000 +0100
6738 +++ avr32-2.6/arch/avr32/kernel/traps.c 2008-04-23 19:33:28.000000000 +0200
6739 @@ -9,6 +9,7 @@
6740 #include <linux/bug.h>
6741 #include <linux/init.h>
6742 #include <linux/kallsyms.h>
6743 +#include <linux/kdebug.h>
6744 #include <linux/module.h>
6745 #include <linux/notifier.h>
6746 #include <linux/sched.h>
6747 @@ -107,9 +108,23 @@
6748
6749 asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
6750 {
6751 - printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
6752 - show_regs_log_lvl(regs, KERN_ALERT);
6753 - show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
6754 + int ret;
6755 +
6756 + nmi_enter();
6757 +
6758 + ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
6759 + switch (ret) {
6760 + case NOTIFY_OK:
6761 + case NOTIFY_STOP:
6762 + return;
6763 + case NOTIFY_BAD:
6764 + die("Fatal Non-Maskable Interrupt", regs, SIGINT);
6765 + default:
6766 + break;
6767 + }
6768 +
6769 + printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
6770 + nmi_disable();
6771 }
6772
6773 asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
6774 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap7000.c avr32-2.6/arch/avr32/mach-at32ap/at32ap7000.c
6775 --- linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap7000.c 2008-02-26 01:20:20.000000000 +0100
6776 +++ avr32-2.6/arch/avr32/mach-at32ap/at32ap7000.c 1970-01-01 01:00:00.000000000 +0100
6777 @@ -1,1730 +0,0 @@
6778 -/*
6779 - * Copyright (C) 2005-2006 Atmel Corporation
6780 - *
6781 - * This program is free software; you can redistribute it and/or modify
6782 - * it under the terms of the GNU General Public License version 2 as
6783 - * published by the Free Software Foundation.
6784 - */
6785 -#include <linux/clk.h>
6786 -#include <linux/fb.h>
6787 -#include <linux/init.h>
6788 -#include <linux/platform_device.h>
6789 -#include <linux/dma-mapping.h>
6790 -#include <linux/spi/spi.h>
6791 -
6792 -#include <asm/io.h>
6793 -
6794 -#include <asm/arch/at32ap7000.h>
6795 -#include <asm/arch/board.h>
6796 -#include <asm/arch/portmux.h>
6797 -
6798 -#include <video/atmel_lcdc.h>
6799 -
6800 -#include "clock.h"
6801 -#include "hmatrix.h"
6802 -#include "pio.h"
6803 -#include "pm.h"
6804 -
6805 -
6806 -#define PBMEM(base) \
6807 - { \
6808 - .start = base, \
6809 - .end = base + 0x3ff, \
6810 - .flags = IORESOURCE_MEM, \
6811 - }
6812 -#define IRQ(num) \
6813 - { \
6814 - .start = num, \
6815 - .end = num, \
6816 - .flags = IORESOURCE_IRQ, \
6817 - }
6818 -#define NAMED_IRQ(num, _name) \
6819 - { \
6820 - .start = num, \
6821 - .end = num, \
6822 - .name = _name, \
6823 - .flags = IORESOURCE_IRQ, \
6824 - }
6825 -
6826 -/* REVISIT these assume *every* device supports DMA, but several
6827 - * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
6828 - */
6829 -#define DEFINE_DEV(_name, _id) \
6830 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6831 -static struct platform_device _name##_id##_device = { \
6832 - .name = #_name, \
6833 - .id = _id, \
6834 - .dev = { \
6835 - .dma_mask = &_name##_id##_dma_mask, \
6836 - .coherent_dma_mask = DMA_32BIT_MASK, \
6837 - }, \
6838 - .resource = _name##_id##_resource, \
6839 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6840 -}
6841 -#define DEFINE_DEV_DATA(_name, _id) \
6842 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6843 -static struct platform_device _name##_id##_device = { \
6844 - .name = #_name, \
6845 - .id = _id, \
6846 - .dev = { \
6847 - .dma_mask = &_name##_id##_dma_mask, \
6848 - .platform_data = &_name##_id##_data, \
6849 - .coherent_dma_mask = DMA_32BIT_MASK, \
6850 - }, \
6851 - .resource = _name##_id##_resource, \
6852 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6853 -}
6854 -
6855 -#define select_peripheral(pin, periph, flags) \
6856 - at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
6857 -
6858 -#define DEV_CLK(_name, devname, bus, _index) \
6859 -static struct clk devname##_##_name = { \
6860 - .name = #_name, \
6861 - .dev = &devname##_device.dev, \
6862 - .parent = &bus##_clk, \
6863 - .mode = bus##_clk_mode, \
6864 - .get_rate = bus##_clk_get_rate, \
6865 - .index = _index, \
6866 -}
6867 -
6868 -static DEFINE_SPINLOCK(pm_lock);
6869 -
6870 -unsigned long at32ap7000_osc_rates[3] = {
6871 - [0] = 32768,
6872 - /* FIXME: these are ATSTK1002-specific */
6873 - [1] = 20000000,
6874 - [2] = 12000000,
6875 -};
6876 -
6877 -static unsigned long osc_get_rate(struct clk *clk)
6878 -{
6879 - return at32ap7000_osc_rates[clk->index];
6880 -}
6881 -
6882 -static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
6883 -{
6884 - unsigned long div, mul, rate;
6885 -
6886 - if (!(control & PM_BIT(PLLEN)))
6887 - return 0;
6888 -
6889 - div = PM_BFEXT(PLLDIV, control) + 1;
6890 - mul = PM_BFEXT(PLLMUL, control) + 1;
6891 -
6892 - rate = clk->parent->get_rate(clk->parent);
6893 - rate = (rate + div / 2) / div;
6894 - rate *= mul;
6895 -
6896 - return rate;
6897 -}
6898 -
6899 -static unsigned long pll0_get_rate(struct clk *clk)
6900 -{
6901 - u32 control;
6902 -
6903 - control = pm_readl(PLL0);
6904 -
6905 - return pll_get_rate(clk, control);
6906 -}
6907 -
6908 -static unsigned long pll1_get_rate(struct clk *clk)
6909 -{
6910 - u32 control;
6911 -
6912 - control = pm_readl(PLL1);
6913 -
6914 - return pll_get_rate(clk, control);
6915 -}
6916 -
6917 -/*
6918 - * The AT32AP7000 has five primary clock sources: One 32kHz
6919 - * oscillator, two crystal oscillators and two PLLs.
6920 - */
6921 -static struct clk osc32k = {
6922 - .name = "osc32k",
6923 - .get_rate = osc_get_rate,
6924 - .users = 1,
6925 - .index = 0,
6926 -};
6927 -static struct clk osc0 = {
6928 - .name = "osc0",
6929 - .get_rate = osc_get_rate,
6930 - .users = 1,
6931 - .index = 1,
6932 -};
6933 -static struct clk osc1 = {
6934 - .name = "osc1",
6935 - .get_rate = osc_get_rate,
6936 - .index = 2,
6937 -};
6938 -static struct clk pll0 = {
6939 - .name = "pll0",
6940 - .get_rate = pll0_get_rate,
6941 - .parent = &osc0,
6942 -};
6943 -static struct clk pll1 = {
6944 - .name = "pll1",
6945 - .get_rate = pll1_get_rate,
6946 - .parent = &osc0,
6947 -};
6948 -
6949 -/*
6950 - * The main clock can be either osc0 or pll0. The boot loader may
6951 - * have chosen one for us, so we don't really know which one until we
6952 - * have a look at the SM.
6953 - */
6954 -static struct clk *main_clock;
6955 -
6956 -/*
6957 - * Synchronous clocks are generated from the main clock. The clocks
6958 - * must satisfy the constraint
6959 - * fCPU >= fHSB >= fPB
6960 - * i.e. each clock must not be faster than its parent.
6961 - */
6962 -static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
6963 -{
6964 - return main_clock->get_rate(main_clock) >> shift;
6965 -};
6966 -
6967 -static void cpu_clk_mode(struct clk *clk, int enabled)
6968 -{
6969 - unsigned long flags;
6970 - u32 mask;
6971 -
6972 - spin_lock_irqsave(&pm_lock, flags);
6973 - mask = pm_readl(CPU_MASK);
6974 - if (enabled)
6975 - mask |= 1 << clk->index;
6976 - else
6977 - mask &= ~(1 << clk->index);
6978 - pm_writel(CPU_MASK, mask);
6979 - spin_unlock_irqrestore(&pm_lock, flags);
6980 -}
6981 -
6982 -static unsigned long cpu_clk_get_rate(struct clk *clk)
6983 -{
6984 - unsigned long cksel, shift = 0;
6985 -
6986 - cksel = pm_readl(CKSEL);
6987 - if (cksel & PM_BIT(CPUDIV))
6988 - shift = PM_BFEXT(CPUSEL, cksel) + 1;
6989 -
6990 - return bus_clk_get_rate(clk, shift);
6991 -}
6992 -
6993 -static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
6994 -{
6995 - u32 control;
6996 - unsigned long parent_rate, child_div, actual_rate, div;
6997 -
6998 - parent_rate = clk->parent->get_rate(clk->parent);
6999 - control = pm_readl(CKSEL);
7000 -
7001 - if (control & PM_BIT(HSBDIV))
7002 - child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
7003 - else
7004 - child_div = 1;
7005 -
7006 - if (rate > 3 * (parent_rate / 4) || child_div == 1) {
7007 - actual_rate = parent_rate;
7008 - control &= ~PM_BIT(CPUDIV);
7009 - } else {
7010 - unsigned int cpusel;
7011 - div = (parent_rate + rate / 2) / rate;
7012 - if (div > child_div)
7013 - div = child_div;
7014 - cpusel = (div > 1) ? (fls(div) - 2) : 0;
7015 - control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
7016 - actual_rate = parent_rate / (1 << (cpusel + 1));
7017 - }
7018 -
7019 - pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
7020 - clk->name, rate, actual_rate);
7021 -
7022 - if (apply)
7023 - pm_writel(CKSEL, control);
7024 -
7025 - return actual_rate;
7026 -}
7027 -
7028 -static void hsb_clk_mode(struct clk *clk, int enabled)
7029 -{
7030 - unsigned long flags;
7031 - u32 mask;
7032 -
7033 - spin_lock_irqsave(&pm_lock, flags);
7034 - mask = pm_readl(HSB_MASK);
7035 - if (enabled)
7036 - mask |= 1 << clk->index;
7037 - else
7038 - mask &= ~(1 << clk->index);
7039 - pm_writel(HSB_MASK, mask);
7040 - spin_unlock_irqrestore(&pm_lock, flags);
7041 -}
7042 -
7043 -static unsigned long hsb_clk_get_rate(struct clk *clk)
7044 -{
7045 - unsigned long cksel, shift = 0;
7046 -
7047 - cksel = pm_readl(CKSEL);
7048 - if (cksel & PM_BIT(HSBDIV))
7049 - shift = PM_BFEXT(HSBSEL, cksel) + 1;
7050 -
7051 - return bus_clk_get_rate(clk, shift);
7052 -}
7053 -
7054 -static void pba_clk_mode(struct clk *clk, int enabled)
7055 -{
7056 - unsigned long flags;
7057 - u32 mask;
7058 -
7059 - spin_lock_irqsave(&pm_lock, flags);
7060 - mask = pm_readl(PBA_MASK);
7061 - if (enabled)
7062 - mask |= 1 << clk->index;
7063 - else
7064 - mask &= ~(1 << clk->index);
7065 - pm_writel(PBA_MASK, mask);
7066 - spin_unlock_irqrestore(&pm_lock, flags);
7067 -}
7068 -
7069 -static unsigned long pba_clk_get_rate(struct clk *clk)
7070 -{
7071 - unsigned long cksel, shift = 0;
7072 -
7073 - cksel = pm_readl(CKSEL);
7074 - if (cksel & PM_BIT(PBADIV))
7075 - shift = PM_BFEXT(PBASEL, cksel) + 1;
7076 -
7077 - return bus_clk_get_rate(clk, shift);
7078 -}
7079 -
7080 -static void pbb_clk_mode(struct clk *clk, int enabled)
7081 -{
7082 - unsigned long flags;
7083 - u32 mask;
7084 -
7085 - spin_lock_irqsave(&pm_lock, flags);
7086 - mask = pm_readl(PBB_MASK);
7087 - if (enabled)
7088 - mask |= 1 << clk->index;
7089 - else
7090 - mask &= ~(1 << clk->index);
7091 - pm_writel(PBB_MASK, mask);
7092 - spin_unlock_irqrestore(&pm_lock, flags);
7093 -}
7094 -
7095 -static unsigned long pbb_clk_get_rate(struct clk *clk)
7096 -{
7097 - unsigned long cksel, shift = 0;
7098 -
7099 - cksel = pm_readl(CKSEL);
7100 - if (cksel & PM_BIT(PBBDIV))
7101 - shift = PM_BFEXT(PBBSEL, cksel) + 1;
7102 -
7103 - return bus_clk_get_rate(clk, shift);
7104 -}
7105 -
7106 -static struct clk cpu_clk = {
7107 - .name = "cpu",
7108 - .get_rate = cpu_clk_get_rate,
7109 - .set_rate = cpu_clk_set_rate,
7110 - .users = 1,
7111 -};
7112 -static struct clk hsb_clk = {
7113 - .name = "hsb",
7114 - .parent = &cpu_clk,
7115 - .get_rate = hsb_clk_get_rate,
7116 -};
7117 -static struct clk pba_clk = {
7118 - .name = "pba",
7119 - .parent = &hsb_clk,
7120 - .mode = hsb_clk_mode,
7121 - .get_rate = pba_clk_get_rate,
7122 - .index = 1,
7123 -};
7124 -static struct clk pbb_clk = {
7125 - .name = "pbb",
7126 - .parent = &hsb_clk,
7127 - .mode = hsb_clk_mode,
7128 - .get_rate = pbb_clk_get_rate,
7129 - .users = 1,
7130 - .index = 2,
7131 -};
7132 -
7133 -/* --------------------------------------------------------------------
7134 - * Generic Clock operations
7135 - * -------------------------------------------------------------------- */
7136 -
7137 -static void genclk_mode(struct clk *clk, int enabled)
7138 -{
7139 - u32 control;
7140 -
7141 - control = pm_readl(GCCTRL(clk->index));
7142 - if (enabled)
7143 - control |= PM_BIT(CEN);
7144 - else
7145 - control &= ~PM_BIT(CEN);
7146 - pm_writel(GCCTRL(clk->index), control);
7147 -}
7148 -
7149 -static unsigned long genclk_get_rate(struct clk *clk)
7150 -{
7151 - u32 control;
7152 - unsigned long div = 1;
7153 -
7154 - control = pm_readl(GCCTRL(clk->index));
7155 - if (control & PM_BIT(DIVEN))
7156 - div = 2 * (PM_BFEXT(DIV, control) + 1);
7157 -
7158 - return clk->parent->get_rate(clk->parent) / div;
7159 -}
7160 -
7161 -static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
7162 -{
7163 - u32 control;
7164 - unsigned long parent_rate, actual_rate, div;
7165 -
7166 - parent_rate = clk->parent->get_rate(clk->parent);
7167 - control = pm_readl(GCCTRL(clk->index));
7168 -
7169 - if (rate > 3 * parent_rate / 4) {
7170 - actual_rate = parent_rate;
7171 - control &= ~PM_BIT(DIVEN);
7172 - } else {
7173 - div = (parent_rate + rate) / (2 * rate) - 1;
7174 - control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
7175 - actual_rate = parent_rate / (2 * (div + 1));
7176 - }
7177 -
7178 - dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
7179 - clk->name, rate, actual_rate);
7180 -
7181 - if (apply)
7182 - pm_writel(GCCTRL(clk->index), control);
7183 -
7184 - return actual_rate;
7185 -}
7186 -
7187 -int genclk_set_parent(struct clk *clk, struct clk *parent)
7188 -{
7189 - u32 control;
7190 -
7191 - dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
7192 - clk->name, parent->name, clk->parent->name);
7193 -
7194 - control = pm_readl(GCCTRL(clk->index));
7195 -
7196 - if (parent == &osc1 || parent == &pll1)
7197 - control |= PM_BIT(OSCSEL);
7198 - else if (parent == &osc0 || parent == &pll0)
7199 - control &= ~PM_BIT(OSCSEL);
7200 - else
7201 - return -EINVAL;
7202 -
7203 - if (parent == &pll0 || parent == &pll1)
7204 - control |= PM_BIT(PLLSEL);
7205 - else
7206 - control &= ~PM_BIT(PLLSEL);
7207 -
7208 - pm_writel(GCCTRL(clk->index), control);
7209 - clk->parent = parent;
7210 -
7211 - return 0;
7212 -}
7213 -
7214 -static void __init genclk_init_parent(struct clk *clk)
7215 -{
7216 - u32 control;
7217 - struct clk *parent;
7218 -
7219 - BUG_ON(clk->index > 7);
7220 -
7221 - control = pm_readl(GCCTRL(clk->index));
7222 - if (control & PM_BIT(OSCSEL))
7223 - parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
7224 - else
7225 - parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
7226 -
7227 - clk->parent = parent;
7228 -}
7229 -
7230 -/* --------------------------------------------------------------------
7231 - * System peripherals
7232 - * -------------------------------------------------------------------- */
7233 -static struct resource at32_pm0_resource[] = {
7234 - {
7235 - .start = 0xfff00000,
7236 - .end = 0xfff0007f,
7237 - .flags = IORESOURCE_MEM,
7238 - },
7239 - IRQ(20),
7240 -};
7241 -
7242 -static struct resource at32ap700x_rtc0_resource[] = {
7243 - {
7244 - .start = 0xfff00080,
7245 - .end = 0xfff000af,
7246 - .flags = IORESOURCE_MEM,
7247 - },
7248 - IRQ(21),
7249 -};
7250 -
7251 -static struct resource at32_wdt0_resource[] = {
7252 - {
7253 - .start = 0xfff000b0,
7254 - .end = 0xfff000cf,
7255 - .flags = IORESOURCE_MEM,
7256 - },
7257 -};
7258 -
7259 -static struct resource at32_eic0_resource[] = {
7260 - {
7261 - .start = 0xfff00100,
7262 - .end = 0xfff0013f,
7263 - .flags = IORESOURCE_MEM,
7264 - },
7265 - IRQ(19),
7266 -};
7267 -
7268 -DEFINE_DEV(at32_pm, 0);
7269 -DEFINE_DEV(at32ap700x_rtc, 0);
7270 -DEFINE_DEV(at32_wdt, 0);
7271 -DEFINE_DEV(at32_eic, 0);
7272 -
7273 -/*
7274 - * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
7275 - * is always running.
7276 - */
7277 -static struct clk at32_pm_pclk = {
7278 - .name = "pclk",
7279 - .dev = &at32_pm0_device.dev,
7280 - .parent = &pbb_clk,
7281 - .mode = pbb_clk_mode,
7282 - .get_rate = pbb_clk_get_rate,
7283 - .users = 1,
7284 - .index = 0,
7285 -};
7286 -
7287 -static struct resource intc0_resource[] = {
7288 - PBMEM(0xfff00400),
7289 -};
7290 -struct platform_device at32_intc0_device = {
7291 - .name = "intc",
7292 - .id = 0,
7293 - .resource = intc0_resource,
7294 - .num_resources = ARRAY_SIZE(intc0_resource),
7295 -};
7296 -DEV_CLK(pclk, at32_intc0, pbb, 1);
7297 -
7298 -static struct clk ebi_clk = {
7299 - .name = "ebi",
7300 - .parent = &hsb_clk,
7301 - .mode = hsb_clk_mode,
7302 - .get_rate = hsb_clk_get_rate,
7303 - .users = 1,
7304 -};
7305 -static struct clk hramc_clk = {
7306 - .name = "hramc",
7307 - .parent = &hsb_clk,
7308 - .mode = hsb_clk_mode,
7309 - .get_rate = hsb_clk_get_rate,
7310 - .users = 1,
7311 - .index = 3,
7312 -};
7313 -
7314 -static struct resource smc0_resource[] = {
7315 - PBMEM(0xfff03400),
7316 -};
7317 -DEFINE_DEV(smc, 0);
7318 -DEV_CLK(pclk, smc0, pbb, 13);
7319 -DEV_CLK(mck, smc0, hsb, 0);
7320 -
7321 -static struct platform_device pdc_device = {
7322 - .name = "pdc",
7323 - .id = 0,
7324 -};
7325 -DEV_CLK(hclk, pdc, hsb, 4);
7326 -DEV_CLK(pclk, pdc, pba, 16);
7327 -
7328 -static struct clk pico_clk = {
7329 - .name = "pico",
7330 - .parent = &cpu_clk,
7331 - .mode = cpu_clk_mode,
7332 - .get_rate = cpu_clk_get_rate,
7333 - .users = 1,
7334 -};
7335 -
7336 -static struct resource dmaca0_resource[] = {
7337 - {
7338 - .start = 0xff200000,
7339 - .end = 0xff20ffff,
7340 - .flags = IORESOURCE_MEM,
7341 - },
7342 - IRQ(2),
7343 -};
7344 -DEFINE_DEV(dmaca, 0);
7345 -DEV_CLK(hclk, dmaca0, hsb, 10);
7346 -
7347 -/* --------------------------------------------------------------------
7348 - * HMATRIX
7349 - * -------------------------------------------------------------------- */
7350 -
7351 -static struct clk hmatrix_clk = {
7352 - .name = "hmatrix_clk",
7353 - .parent = &pbb_clk,
7354 - .mode = pbb_clk_mode,
7355 - .get_rate = pbb_clk_get_rate,
7356 - .index = 2,
7357 - .users = 1,
7358 -};
7359 -#define HMATRIX_BASE ((void __iomem *)0xfff00800)
7360 -
7361 -#define hmatrix_readl(reg) \
7362 - __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
7363 -#define hmatrix_writel(reg,value) \
7364 - __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
7365 -
7366 -/*
7367 - * Set bits in the HMATRIX Special Function Register (SFR) used by the
7368 - * External Bus Interface (EBI). This can be used to enable special
7369 - * features like CompactFlash support, NAND Flash support, etc. on
7370 - * certain chipselects.
7371 - */
7372 -static inline void set_ebi_sfr_bits(u32 mask)
7373 -{
7374 - u32 sfr;
7375 -
7376 - clk_enable(&hmatrix_clk);
7377 - sfr = hmatrix_readl(SFR4);
7378 - sfr |= mask;
7379 - hmatrix_writel(SFR4, sfr);
7380 - clk_disable(&hmatrix_clk);
7381 -}
7382 -
7383 -/* --------------------------------------------------------------------
7384 - * System Timer/Counter (TC)
7385 - * -------------------------------------------------------------------- */
7386 -static struct resource at32_systc0_resource[] = {
7387 - PBMEM(0xfff00c00),
7388 - IRQ(22),
7389 -};
7390 -struct platform_device at32_systc0_device = {
7391 - .name = "systc",
7392 - .id = 0,
7393 - .resource = at32_systc0_resource,
7394 - .num_resources = ARRAY_SIZE(at32_systc0_resource),
7395 -};
7396 -DEV_CLK(pclk, at32_systc0, pbb, 3);
7397 -
7398 -/* --------------------------------------------------------------------
7399 - * PIO
7400 - * -------------------------------------------------------------------- */
7401 -
7402 -static struct resource pio0_resource[] = {
7403 - PBMEM(0xffe02800),
7404 - IRQ(13),
7405 -};
7406 -DEFINE_DEV(pio, 0);
7407 -DEV_CLK(mck, pio0, pba, 10);
7408 -
7409 -static struct resource pio1_resource[] = {
7410 - PBMEM(0xffe02c00),
7411 - IRQ(14),
7412 -};
7413 -DEFINE_DEV(pio, 1);
7414 -DEV_CLK(mck, pio1, pba, 11);
7415 -
7416 -static struct resource pio2_resource[] = {
7417 - PBMEM(0xffe03000),
7418 - IRQ(15),
7419 -};
7420 -DEFINE_DEV(pio, 2);
7421 -DEV_CLK(mck, pio2, pba, 12);
7422 -
7423 -static struct resource pio3_resource[] = {
7424 - PBMEM(0xffe03400),
7425 - IRQ(16),
7426 -};
7427 -DEFINE_DEV(pio, 3);
7428 -DEV_CLK(mck, pio3, pba, 13);
7429 -
7430 -static struct resource pio4_resource[] = {
7431 - PBMEM(0xffe03800),
7432 - IRQ(17),
7433 -};
7434 -DEFINE_DEV(pio, 4);
7435 -DEV_CLK(mck, pio4, pba, 14);
7436 -
7437 -void __init at32_add_system_devices(void)
7438 -{
7439 - platform_device_register(&at32_pm0_device);
7440 - platform_device_register(&at32_intc0_device);
7441 - platform_device_register(&at32ap700x_rtc0_device);
7442 - platform_device_register(&at32_wdt0_device);
7443 - platform_device_register(&at32_eic0_device);
7444 - platform_device_register(&smc0_device);
7445 - platform_device_register(&pdc_device);
7446 - platform_device_register(&dmaca0_device);
7447 -
7448 - platform_device_register(&at32_systc0_device);
7449 -
7450 - platform_device_register(&pio0_device);
7451 - platform_device_register(&pio1_device);
7452 - platform_device_register(&pio2_device);
7453 - platform_device_register(&pio3_device);
7454 - platform_device_register(&pio4_device);
7455 -}
7456 -
7457 -/* --------------------------------------------------------------------
7458 - * USART
7459 - * -------------------------------------------------------------------- */
7460 -
7461 -static struct atmel_uart_data atmel_usart0_data = {
7462 - .use_dma_tx = 1,
7463 - .use_dma_rx = 1,
7464 -};
7465 -static struct resource atmel_usart0_resource[] = {
7466 - PBMEM(0xffe00c00),
7467 - IRQ(6),
7468 -};
7469 -DEFINE_DEV_DATA(atmel_usart, 0);
7470 -DEV_CLK(usart, atmel_usart0, pba, 3);
7471 -
7472 -static struct atmel_uart_data atmel_usart1_data = {
7473 - .use_dma_tx = 1,
7474 - .use_dma_rx = 1,
7475 -};
7476 -static struct resource atmel_usart1_resource[] = {
7477 - PBMEM(0xffe01000),
7478 - IRQ(7),
7479 -};
7480 -DEFINE_DEV_DATA(atmel_usart, 1);
7481 -DEV_CLK(usart, atmel_usart1, pba, 4);
7482 -
7483 -static struct atmel_uart_data atmel_usart2_data = {
7484 - .use_dma_tx = 1,
7485 - .use_dma_rx = 1,
7486 -};
7487 -static struct resource atmel_usart2_resource[] = {
7488 - PBMEM(0xffe01400),
7489 - IRQ(8),
7490 -};
7491 -DEFINE_DEV_DATA(atmel_usart, 2);
7492 -DEV_CLK(usart, atmel_usart2, pba, 5);
7493 -
7494 -static struct atmel_uart_data atmel_usart3_data = {
7495 - .use_dma_tx = 1,
7496 - .use_dma_rx = 1,
7497 -};
7498 -static struct resource atmel_usart3_resource[] = {
7499 - PBMEM(0xffe01800),
7500 - IRQ(9),
7501 -};
7502 -DEFINE_DEV_DATA(atmel_usart, 3);
7503 -DEV_CLK(usart, atmel_usart3, pba, 6);
7504 -
7505 -static inline void configure_usart0_pins(void)
7506 -{
7507 - select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
7508 - select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
7509 -}
7510 -
7511 -static inline void configure_usart1_pins(void)
7512 -{
7513 - select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
7514 - select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
7515 -}
7516 -
7517 -static inline void configure_usart2_pins(void)
7518 -{
7519 - select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
7520 - select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
7521 -}
7522 -
7523 -static inline void configure_usart3_pins(void)
7524 -{
7525 - select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
7526 - select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
7527 -}
7528 -
7529 -static struct platform_device *__initdata at32_usarts[4];
7530 -
7531 -void __init at32_map_usart(unsigned int hw_id, unsigned int line)
7532 -{
7533 - struct platform_device *pdev;
7534 -
7535 - switch (hw_id) {
7536 - case 0:
7537 - pdev = &atmel_usart0_device;
7538 - configure_usart0_pins();
7539 - break;
7540 - case 1:
7541 - pdev = &atmel_usart1_device;
7542 - configure_usart1_pins();
7543 - break;
7544 - case 2:
7545 - pdev = &atmel_usart2_device;
7546 - configure_usart2_pins();
7547 - break;
7548 - case 3:
7549 - pdev = &atmel_usart3_device;
7550 - configure_usart3_pins();
7551 - break;
7552 - default:
7553 - return;
7554 - }
7555 -
7556 - if (PXSEG(pdev->resource[0].start) == P4SEG) {
7557 - /* Addresses in the P4 segment are permanently mapped 1:1 */
7558 - struct atmel_uart_data *data = pdev->dev.platform_data;
7559 - data->regs = (void __iomem *)pdev->resource[0].start;
7560 - }
7561 -
7562 - pdev->id = line;
7563 - at32_usarts[line] = pdev;
7564 -}
7565 -
7566 -struct platform_device *__init at32_add_device_usart(unsigned int id)
7567 -{
7568 - platform_device_register(at32_usarts[id]);
7569 - return at32_usarts[id];
7570 -}
7571 -
7572 -struct platform_device *atmel_default_console_device;
7573 -
7574 -void __init at32_setup_serial_console(unsigned int usart_id)
7575 -{
7576 - atmel_default_console_device = at32_usarts[usart_id];
7577 -}
7578 -
7579 -/* --------------------------------------------------------------------
7580 - * Ethernet
7581 - * -------------------------------------------------------------------- */
7582 -
7583 -static struct eth_platform_data macb0_data;
7584 -static struct resource macb0_resource[] = {
7585 - PBMEM(0xfff01800),
7586 - IRQ(25),
7587 -};
7588 -DEFINE_DEV_DATA(macb, 0);
7589 -DEV_CLK(hclk, macb0, hsb, 8);
7590 -DEV_CLK(pclk, macb0, pbb, 6);
7591 -
7592 -static struct eth_platform_data macb1_data;
7593 -static struct resource macb1_resource[] = {
7594 - PBMEM(0xfff01c00),
7595 - IRQ(26),
7596 -};
7597 -DEFINE_DEV_DATA(macb, 1);
7598 -DEV_CLK(hclk, macb1, hsb, 9);
7599 -DEV_CLK(pclk, macb1, pbb, 7);
7600 -
7601 -struct platform_device *__init
7602 -at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
7603 -{
7604 - struct platform_device *pdev;
7605 -
7606 - switch (id) {
7607 - case 0:
7608 - pdev = &macb0_device;
7609 -
7610 - select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
7611 - select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
7612 - select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
7613 - select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
7614 - select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
7615 - select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
7616 - select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
7617 - select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
7618 - select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
7619 - select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
7620 -
7621 - if (!data->is_rmii) {
7622 - select_peripheral(PC(0), PERIPH_A, 0); /* COL */
7623 - select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
7624 - select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
7625 - select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
7626 - select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
7627 - select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
7628 - select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
7629 - select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
7630 - select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
7631 - }
7632 - break;
7633 -
7634 - case 1:
7635 - pdev = &macb1_device;
7636 -
7637 - select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
7638 - select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
7639 - select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
7640 - select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
7641 - select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
7642 - select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
7643 - select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
7644 - select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
7645 - select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
7646 - select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
7647 -
7648 - if (!data->is_rmii) {
7649 - select_peripheral(PC(19), PERIPH_B, 0); /* COL */
7650 - select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
7651 - select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
7652 - select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
7653 - select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
7654 - select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
7655 - select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
7656 - select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
7657 - select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
7658 - }
7659 - break;
7660 -
7661 - default:
7662 - return NULL;
7663 - }
7664 -
7665 - memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
7666 - platform_device_register(pdev);
7667 -
7668 - return pdev;
7669 -}
7670 -
7671 -/* --------------------------------------------------------------------
7672 - * SPI
7673 - * -------------------------------------------------------------------- */
7674 -static struct resource atmel_spi0_resource[] = {
7675 - PBMEM(0xffe00000),
7676 - IRQ(3),
7677 -};
7678 -DEFINE_DEV(atmel_spi, 0);
7679 -DEV_CLK(spi_clk, atmel_spi0, pba, 0);
7680 -
7681 -static struct resource atmel_spi1_resource[] = {
7682 - PBMEM(0xffe00400),
7683 - IRQ(4),
7684 -};
7685 -DEFINE_DEV(atmel_spi, 1);
7686 -DEV_CLK(spi_clk, atmel_spi1, pba, 1);
7687 -
7688 -static void __init
7689 -at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
7690 - unsigned int n, const u8 *pins)
7691 -{
7692 - unsigned int pin, mode;
7693 -
7694 - for (; n; n--, b++) {
7695 - b->bus_num = bus_num;
7696 - if (b->chip_select >= 4)
7697 - continue;
7698 - pin = (unsigned)b->controller_data;
7699 - if (!pin) {
7700 - pin = pins[b->chip_select];
7701 - b->controller_data = (void *)pin;
7702 - }
7703 - mode = AT32_GPIOF_OUTPUT;
7704 - if (!(b->mode & SPI_CS_HIGH))
7705 - mode |= AT32_GPIOF_HIGH;
7706 - at32_select_gpio(pin, mode);
7707 - }
7708 -}
7709 -
7710 -struct platform_device *__init
7711 -at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
7712 -{
7713 - /*
7714 - * Manage the chipselects as GPIOs, normally using the same pins
7715 - * the SPI controller expects; but boards can use other pins.
7716 - */
7717 - static u8 __initdata spi0_pins[] =
7718 - { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
7719 - GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
7720 - static u8 __initdata spi1_pins[] =
7721 - { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
7722 - GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
7723 - struct platform_device *pdev;
7724 -
7725 - switch (id) {
7726 - case 0:
7727 - pdev = &atmel_spi0_device;
7728 - select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
7729 - select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
7730 - select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
7731 - at32_spi_setup_slaves(0, b, n, spi0_pins);
7732 - break;
7733 -
7734 - case 1:
7735 - pdev = &atmel_spi1_device;
7736 - select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
7737 - select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
7738 - select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
7739 - at32_spi_setup_slaves(1, b, n, spi1_pins);
7740 - break;
7741 -
7742 - default:
7743 - return NULL;
7744 - }
7745 -
7746 - spi_register_board_info(b, n);
7747 - platform_device_register(pdev);
7748 - return pdev;
7749 -}
7750 -
7751 -/* --------------------------------------------------------------------
7752 - * TWI
7753 - * -------------------------------------------------------------------- */
7754 -static struct resource atmel_twi0_resource[] __initdata = {
7755 - PBMEM(0xffe00800),
7756 - IRQ(5),
7757 -};
7758 -static struct clk atmel_twi0_pclk = {
7759 - .name = "twi_pclk",
7760 - .parent = &pba_clk,
7761 - .mode = pba_clk_mode,
7762 - .get_rate = pba_clk_get_rate,
7763 - .index = 2,
7764 -};
7765 -
7766 -struct platform_device *__init at32_add_device_twi(unsigned int id)
7767 -{
7768 - struct platform_device *pdev;
7769 -
7770 - if (id != 0)
7771 - return NULL;
7772 -
7773 - pdev = platform_device_alloc("atmel_twi", id);
7774 - if (!pdev)
7775 - return NULL;
7776 -
7777 - if (platform_device_add_resources(pdev, atmel_twi0_resource,
7778 - ARRAY_SIZE(atmel_twi0_resource)))
7779 - goto err_add_resources;
7780 -
7781 - select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
7782 - select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
7783 -
7784 - atmel_twi0_pclk.dev = &pdev->dev;
7785 -
7786 - platform_device_add(pdev);
7787 - return pdev;
7788 -
7789 -err_add_resources:
7790 - platform_device_put(pdev);
7791 - return NULL;
7792 -}
7793 -
7794 -/* --------------------------------------------------------------------
7795 - * MMC
7796 - * -------------------------------------------------------------------- */
7797 -static struct resource atmel_mci0_resource[] __initdata = {
7798 - PBMEM(0xfff02400),
7799 - IRQ(28),
7800 -};
7801 -static struct clk atmel_mci0_pclk = {
7802 - .name = "mci_clk",
7803 - .parent = &pbb_clk,
7804 - .mode = pbb_clk_mode,
7805 - .get_rate = pbb_clk_get_rate,
7806 - .index = 9,
7807 -};
7808 -
7809 -struct platform_device *__init at32_add_device_mci(unsigned int id)
7810 -{
7811 - struct platform_device *pdev;
7812 -
7813 - if (id != 0)
7814 - return NULL;
7815 -
7816 - pdev = platform_device_alloc("atmel_mci", id);
7817 - if (!pdev)
7818 - return NULL;
7819 -
7820 - if (platform_device_add_resources(pdev, atmel_mci0_resource,
7821 - ARRAY_SIZE(atmel_mci0_resource)))
7822 - goto err_add_resources;
7823 -
7824 - select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
7825 - select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
7826 - select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
7827 - select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
7828 - select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
7829 - select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
7830 -
7831 - atmel_mci0_pclk.dev = &pdev->dev;
7832 -
7833 - platform_device_add(pdev);
7834 - return pdev;
7835 -
7836 -err_add_resources:
7837 - platform_device_put(pdev);
7838 - return NULL;
7839 -}
7840 -
7841 -/* --------------------------------------------------------------------
7842 - * LCDC
7843 - * -------------------------------------------------------------------- */
7844 -static struct atmel_lcdfb_info atmel_lcdfb0_data;
7845 -static struct resource atmel_lcdfb0_resource[] = {
7846 - {
7847 - .start = 0xff000000,
7848 - .end = 0xff000fff,
7849 - .flags = IORESOURCE_MEM,
7850 - },
7851 - IRQ(1),
7852 - {
7853 - /* Placeholder for pre-allocated fb memory */
7854 - .start = 0x00000000,
7855 - .end = 0x00000000,
7856 - .flags = 0,
7857 - },
7858 -};
7859 -DEFINE_DEV_DATA(atmel_lcdfb, 0);
7860 -DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
7861 -static struct clk atmel_lcdfb0_pixclk = {
7862 - .name = "lcdc_clk",
7863 - .dev = &atmel_lcdfb0_device.dev,
7864 - .mode = genclk_mode,
7865 - .get_rate = genclk_get_rate,
7866 - .set_rate = genclk_set_rate,
7867 - .set_parent = genclk_set_parent,
7868 - .index = 7,
7869 -};
7870 -
7871 -struct platform_device *__init
7872 -at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
7873 - unsigned long fbmem_start, unsigned long fbmem_len)
7874 -{
7875 - struct platform_device *pdev;
7876 - struct atmel_lcdfb_info *info;
7877 - struct fb_monspecs *monspecs;
7878 - struct fb_videomode *modedb;
7879 - unsigned int modedb_size;
7880 -
7881 - /*
7882 - * Do a deep copy of the fb data, monspecs and modedb. Make
7883 - * sure all allocations are done before setting up the
7884 - * portmux.
7885 - */
7886 - monspecs = kmemdup(data->default_monspecs,
7887 - sizeof(struct fb_monspecs), GFP_KERNEL);
7888 - if (!monspecs)
7889 - return NULL;
7890 -
7891 - modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
7892 - modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
7893 - if (!modedb)
7894 - goto err_dup_modedb;
7895 - monspecs->modedb = modedb;
7896 -
7897 - switch (id) {
7898 - case 0:
7899 - pdev = &atmel_lcdfb0_device;
7900 - select_peripheral(PC(19), PERIPH_A, 0); /* CC */
7901 - select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
7902 - select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
7903 - select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
7904 - select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
7905 - select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
7906 - select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
7907 - select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
7908 - select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
7909 - select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
7910 - select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
7911 - select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
7912 - select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
7913 - select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
7914 - select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
7915 - select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
7916 - select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
7917 - select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
7918 - select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
7919 - select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
7920 - select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
7921 - select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
7922 - select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
7923 - select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
7924 - select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
7925 - select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
7926 - select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
7927 - select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
7928 - select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
7929 - select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
7930 - select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
7931 -
7932 - clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
7933 - clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
7934 - break;
7935 -
7936 - default:
7937 - goto err_invalid_id;
7938 - }
7939 -
7940 - if (fbmem_len) {
7941 - pdev->resource[2].start = fbmem_start;
7942 - pdev->resource[2].end = fbmem_start + fbmem_len - 1;
7943 - pdev->resource[2].flags = IORESOURCE_MEM;
7944 - }
7945 -
7946 - info = pdev->dev.platform_data;
7947 - memcpy(info, data, sizeof(struct atmel_lcdfb_info));
7948 - info->default_monspecs = monspecs;
7949 -
7950 - platform_device_register(pdev);
7951 - return pdev;
7952 -
7953 -err_invalid_id:
7954 - kfree(modedb);
7955 -err_dup_modedb:
7956 - kfree(monspecs);
7957 - return NULL;
7958 -}
7959 -
7960 -/* --------------------------------------------------------------------
7961 - * SSC
7962 - * -------------------------------------------------------------------- */
7963 -static struct resource ssc0_resource[] = {
7964 - PBMEM(0xffe01c00),
7965 - IRQ(10),
7966 -};
7967 -DEFINE_DEV(ssc, 0);
7968 -DEV_CLK(pclk, ssc0, pba, 7);
7969 -
7970 -static struct resource ssc1_resource[] = {
7971 - PBMEM(0xffe02000),
7972 - IRQ(11),
7973 -};
7974 -DEFINE_DEV(ssc, 1);
7975 -DEV_CLK(pclk, ssc1, pba, 8);
7976 -
7977 -static struct resource ssc2_resource[] = {
7978 - PBMEM(0xffe02400),
7979 - IRQ(12),
7980 -};
7981 -DEFINE_DEV(ssc, 2);
7982 -DEV_CLK(pclk, ssc2, pba, 9);
7983 -
7984 -struct platform_device *__init
7985 -at32_add_device_ssc(unsigned int id, unsigned int flags)
7986 -{
7987 - struct platform_device *pdev;
7988 -
7989 - switch (id) {
7990 - case 0:
7991 - pdev = &ssc0_device;
7992 - if (flags & ATMEL_SSC_RF)
7993 - select_peripheral(PA(21), PERIPH_A, 0); /* RF */
7994 - if (flags & ATMEL_SSC_RK)
7995 - select_peripheral(PA(22), PERIPH_A, 0); /* RK */
7996 - if (flags & ATMEL_SSC_TK)
7997 - select_peripheral(PA(23), PERIPH_A, 0); /* TK */
7998 - if (flags & ATMEL_SSC_TF)
7999 - select_peripheral(PA(24), PERIPH_A, 0); /* TF */
8000 - if (flags & ATMEL_SSC_TD)
8001 - select_peripheral(PA(25), PERIPH_A, 0); /* TD */
8002 - if (flags & ATMEL_SSC_RD)
8003 - select_peripheral(PA(26), PERIPH_A, 0); /* RD */
8004 - break;
8005 - case 1:
8006 - pdev = &ssc1_device;
8007 - if (flags & ATMEL_SSC_RF)
8008 - select_peripheral(PA(0), PERIPH_B, 0); /* RF */
8009 - if (flags & ATMEL_SSC_RK)
8010 - select_peripheral(PA(1), PERIPH_B, 0); /* RK */
8011 - if (flags & ATMEL_SSC_TK)
8012 - select_peripheral(PA(2), PERIPH_B, 0); /* TK */
8013 - if (flags & ATMEL_SSC_TF)
8014 - select_peripheral(PA(3), PERIPH_B, 0); /* TF */
8015 - if (flags & ATMEL_SSC_TD)
8016 - select_peripheral(PA(4), PERIPH_B, 0); /* TD */
8017 - if (flags & ATMEL_SSC_RD)
8018 - select_peripheral(PA(5), PERIPH_B, 0); /* RD */
8019 - break;
8020 - case 2:
8021 - pdev = &ssc2_device;
8022 - if (flags & ATMEL_SSC_TD)
8023 - select_peripheral(PB(13), PERIPH_A, 0); /* TD */
8024 - if (flags & ATMEL_SSC_RD)
8025 - select_peripheral(PB(14), PERIPH_A, 0); /* RD */
8026 - if (flags & ATMEL_SSC_TK)
8027 - select_peripheral(PB(15), PERIPH_A, 0); /* TK */
8028 - if (flags & ATMEL_SSC_TF)
8029 - select_peripheral(PB(16), PERIPH_A, 0); /* TF */
8030 - if (flags & ATMEL_SSC_RF)
8031 - select_peripheral(PB(17), PERIPH_A, 0); /* RF */
8032 - if (flags & ATMEL_SSC_RK)
8033 - select_peripheral(PB(18), PERIPH_A, 0); /* RK */
8034 - break;
8035 - default:
8036 - return NULL;
8037 - }
8038 -
8039 - platform_device_register(pdev);
8040 - return pdev;
8041 -}
8042 -
8043 -/* --------------------------------------------------------------------
8044 - * USB Device Controller
8045 - * -------------------------------------------------------------------- */
8046 -static struct resource usba0_resource[] __initdata = {
8047 - {
8048 - .start = 0xff300000,
8049 - .end = 0xff3fffff,
8050 - .flags = IORESOURCE_MEM,
8051 - }, {
8052 - .start = 0xfff03000,
8053 - .end = 0xfff033ff,
8054 - .flags = IORESOURCE_MEM,
8055 - },
8056 - IRQ(31),
8057 -};
8058 -static struct clk usba0_pclk = {
8059 - .name = "pclk",
8060 - .parent = &pbb_clk,
8061 - .mode = pbb_clk_mode,
8062 - .get_rate = pbb_clk_get_rate,
8063 - .index = 12,
8064 -};
8065 -static struct clk usba0_hclk = {
8066 - .name = "hclk",
8067 - .parent = &hsb_clk,
8068 - .mode = hsb_clk_mode,
8069 - .get_rate = hsb_clk_get_rate,
8070 - .index = 6,
8071 -};
8072 -
8073 -struct platform_device *__init
8074 -at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
8075 -{
8076 - struct platform_device *pdev;
8077 -
8078 - if (id != 0)
8079 - return NULL;
8080 -
8081 - pdev = platform_device_alloc("atmel_usba_udc", 0);
8082 - if (!pdev)
8083 - return NULL;
8084 -
8085 - if (platform_device_add_resources(pdev, usba0_resource,
8086 - ARRAY_SIZE(usba0_resource)))
8087 - goto out_free_pdev;
8088 -
8089 - if (data) {
8090 - if (platform_device_add_data(pdev, data, sizeof(*data)))
8091 - goto out_free_pdev;
8092 -
8093 - if (data->vbus_pin != GPIO_PIN_NONE)
8094 - at32_select_gpio(data->vbus_pin, 0);
8095 - }
8096 -
8097 - usba0_pclk.dev = &pdev->dev;
8098 - usba0_hclk.dev = &pdev->dev;
8099 -
8100 - platform_device_add(pdev);
8101 -
8102 - return pdev;
8103 -
8104 -out_free_pdev:
8105 - platform_device_put(pdev);
8106 - return NULL;
8107 -}
8108 -
8109 -/* --------------------------------------------------------------------
8110 - * IDE / CompactFlash
8111 - * -------------------------------------------------------------------- */
8112 -static struct resource at32_smc_cs4_resource[] __initdata = {
8113 - {
8114 - .start = 0x04000000,
8115 - .end = 0x07ffffff,
8116 - .flags = IORESOURCE_MEM,
8117 - },
8118 - IRQ(~0UL), /* Magic IRQ will be overridden */
8119 -};
8120 -static struct resource at32_smc_cs5_resource[] __initdata = {
8121 - {
8122 - .start = 0x20000000,
8123 - .end = 0x23ffffff,
8124 - .flags = IORESOURCE_MEM,
8125 - },
8126 - IRQ(~0UL), /* Magic IRQ will be overridden */
8127 -};
8128 -
8129 -static int __init at32_init_ide_or_cf(struct platform_device *pdev,
8130 - unsigned int cs, unsigned int extint)
8131 -{
8132 - static unsigned int extint_pin_map[4] __initdata = {
8133 - GPIO_PIN_PB(25),
8134 - GPIO_PIN_PB(26),
8135 - GPIO_PIN_PB(27),
8136 - GPIO_PIN_PB(28),
8137 - };
8138 - static bool common_pins_initialized __initdata = false;
8139 - unsigned int extint_pin;
8140 - int ret;
8141 -
8142 - if (extint >= ARRAY_SIZE(extint_pin_map))
8143 - return -EINVAL;
8144 - extint_pin = extint_pin_map[extint];
8145 -
8146 - switch (cs) {
8147 - case 4:
8148 - ret = platform_device_add_resources(pdev,
8149 - at32_smc_cs4_resource,
8150 - ARRAY_SIZE(at32_smc_cs4_resource));
8151 - if (ret)
8152 - return ret;
8153 -
8154 - select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
8155 - set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
8156 - break;
8157 - case 5:
8158 - ret = platform_device_add_resources(pdev,
8159 - at32_smc_cs5_resource,
8160 - ARRAY_SIZE(at32_smc_cs5_resource));
8161 - if (ret)
8162 - return ret;
8163 -
8164 - select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
8165 - set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
8166 - break;
8167 - default:
8168 - return -EINVAL;
8169 - }
8170 -
8171 - if (!common_pins_initialized) {
8172 - select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
8173 - select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
8174 - select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
8175 - select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
8176 - common_pins_initialized = true;
8177 - }
8178 -
8179 - at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
8180 -
8181 - pdev->resource[1].start = EIM_IRQ_BASE + extint;
8182 - pdev->resource[1].end = pdev->resource[1].start;
8183 -
8184 - return 0;
8185 -}
8186 -
8187 -struct platform_device *__init
8188 -at32_add_device_ide(unsigned int id, unsigned int extint,
8189 - struct ide_platform_data *data)
8190 -{
8191 - struct platform_device *pdev;
8192 -
8193 - pdev = platform_device_alloc("at32_ide", id);
8194 - if (!pdev)
8195 - goto fail;
8196 -
8197 - if (platform_device_add_data(pdev, data,
8198 - sizeof(struct ide_platform_data)))
8199 - goto fail;
8200 -
8201 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8202 - goto fail;
8203 -
8204 - platform_device_add(pdev);
8205 - return pdev;
8206 -
8207 -fail:
8208 - platform_device_put(pdev);
8209 - return NULL;
8210 -}
8211 -
8212 -struct platform_device *__init
8213 -at32_add_device_cf(unsigned int id, unsigned int extint,
8214 - struct cf_platform_data *data)
8215 -{
8216 - struct platform_device *pdev;
8217 -
8218 - pdev = platform_device_alloc("at32_cf", id);
8219 - if (!pdev)
8220 - goto fail;
8221 -
8222 - if (platform_device_add_data(pdev, data,
8223 - sizeof(struct cf_platform_data)))
8224 - goto fail;
8225 -
8226 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8227 - goto fail;
8228 -
8229 - if (data->detect_pin != GPIO_PIN_NONE)
8230 - at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
8231 - if (data->reset_pin != GPIO_PIN_NONE)
8232 - at32_select_gpio(data->reset_pin, 0);
8233 - if (data->vcc_pin != GPIO_PIN_NONE)
8234 - at32_select_gpio(data->vcc_pin, 0);
8235 - /* READY is used as extint, so we can't select it as gpio */
8236 -
8237 - platform_device_add(pdev);
8238 - return pdev;
8239 -
8240 -fail:
8241 - platform_device_put(pdev);
8242 - return NULL;
8243 -}
8244 -
8245 -/* --------------------------------------------------------------------
8246 - * AC97C
8247 - * -------------------------------------------------------------------- */
8248 -static struct resource atmel_ac97c0_resource[] __initdata = {
8249 - PBMEM(0xfff02800),
8250 - IRQ(29),
8251 -};
8252 -static struct clk atmel_ac97c0_pclk = {
8253 - .name = "pclk",
8254 - .parent = &pbb_clk,
8255 - .mode = pbb_clk_mode,
8256 - .get_rate = pbb_clk_get_rate,
8257 - .index = 10,
8258 -};
8259 -
8260 -struct platform_device *__init at32_add_device_ac97c(unsigned int id)
8261 -{
8262 - struct platform_device *pdev;
8263 -
8264 - if (id != 0)
8265 - return NULL;
8266 -
8267 - pdev = platform_device_alloc("atmel_ac97c", id);
8268 - if (!pdev)
8269 - return NULL;
8270 -
8271 - if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
8272 - ARRAY_SIZE(atmel_ac97c0_resource)))
8273 - goto err_add_resources;
8274 -
8275 - select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
8276 - select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
8277 - select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
8278 - select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
8279 -
8280 - atmel_ac97c0_pclk.dev = &pdev->dev;
8281 -
8282 - platform_device_add(pdev);
8283 - return pdev;
8284 -
8285 -err_add_resources:
8286 - platform_device_put(pdev);
8287 - return NULL;
8288 -}
8289 -
8290 -/* --------------------------------------------------------------------
8291 - * ABDAC
8292 - * -------------------------------------------------------------------- */
8293 -static struct resource abdac0_resource[] __initdata = {
8294 - PBMEM(0xfff02000),
8295 - IRQ(27),
8296 -};
8297 -static struct clk abdac0_pclk = {
8298 - .name = "pclk",
8299 - .parent = &pbb_clk,
8300 - .mode = pbb_clk_mode,
8301 - .get_rate = pbb_clk_get_rate,
8302 - .index = 8,
8303 -};
8304 -static struct clk abdac0_sample_clk = {
8305 - .name = "sample_clk",
8306 - .mode = genclk_mode,
8307 - .get_rate = genclk_get_rate,
8308 - .set_rate = genclk_set_rate,
8309 - .set_parent = genclk_set_parent,
8310 - .index = 6,
8311 -};
8312 -
8313 -struct platform_device *__init at32_add_device_abdac(unsigned int id)
8314 -{
8315 - struct platform_device *pdev;
8316 -
8317 - if (id != 0)
8318 - return NULL;
8319 -
8320 - pdev = platform_device_alloc("abdac", id);
8321 - if (!pdev)
8322 - return NULL;
8323 -
8324 - if (platform_device_add_resources(pdev, abdac0_resource,
8325 - ARRAY_SIZE(abdac0_resource)))
8326 - goto err_add_resources;
8327 -
8328 - select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
8329 - select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
8330 - select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
8331 - select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
8332 -
8333 - abdac0_pclk.dev = &pdev->dev;
8334 - abdac0_sample_clk.dev = &pdev->dev;
8335 -
8336 - platform_device_add(pdev);
8337 - return pdev;
8338 -
8339 -err_add_resources:
8340 - platform_device_put(pdev);
8341 - return NULL;
8342 -}
8343 -
8344 -/* --------------------------------------------------------------------
8345 - * GCLK
8346 - * -------------------------------------------------------------------- */
8347 -static struct clk gclk0 = {
8348 - .name = "gclk0",
8349 - .mode = genclk_mode,
8350 - .get_rate = genclk_get_rate,
8351 - .set_rate = genclk_set_rate,
8352 - .set_parent = genclk_set_parent,
8353 - .index = 0,
8354 -};
8355 -static struct clk gclk1 = {
8356 - .name = "gclk1",
8357 - .mode = genclk_mode,
8358 - .get_rate = genclk_get_rate,
8359 - .set_rate = genclk_set_rate,
8360 - .set_parent = genclk_set_parent,
8361 - .index = 1,
8362 -};
8363 -static struct clk gclk2 = {
8364 - .name = "gclk2",
8365 - .mode = genclk_mode,
8366 - .get_rate = genclk_get_rate,
8367 - .set_rate = genclk_set_rate,
8368 - .set_parent = genclk_set_parent,
8369 - .index = 2,
8370 -};
8371 -static struct clk gclk3 = {
8372 - .name = "gclk3",
8373 - .mode = genclk_mode,
8374 - .get_rate = genclk_get_rate,
8375 - .set_rate = genclk_set_rate,
8376 - .set_parent = genclk_set_parent,
8377 - .index = 3,
8378 -};
8379 -static struct clk gclk4 = {
8380 - .name = "gclk4",
8381 - .mode = genclk_mode,
8382 - .get_rate = genclk_get_rate,
8383 - .set_rate = genclk_set_rate,
8384 - .set_parent = genclk_set_parent,
8385 - .index = 4,
8386 -};
8387 -
8388 -struct clk *at32_clock_list[] = {
8389 - &osc32k,
8390 - &osc0,
8391 - &osc1,
8392 - &pll0,
8393 - &pll1,
8394 - &cpu_clk,
8395 - &hsb_clk,
8396 - &pba_clk,
8397 - &pbb_clk,
8398 - &at32_pm_pclk,
8399 - &at32_intc0_pclk,
8400 - &hmatrix_clk,
8401 - &ebi_clk,
8402 - &hramc_clk,
8403 - &smc0_pclk,
8404 - &smc0_mck,
8405 - &pdc_hclk,
8406 - &pdc_pclk,
8407 - &dmaca0_hclk,
8408 - &pico_clk,
8409 - &pio0_mck,
8410 - &pio1_mck,
8411 - &pio2_mck,
8412 - &pio3_mck,
8413 - &pio4_mck,
8414 - &at32_systc0_pclk,
8415 - &atmel_usart0_usart,
8416 - &atmel_usart1_usart,
8417 - &atmel_usart2_usart,
8418 - &atmel_usart3_usart,
8419 - &macb0_hclk,
8420 - &macb0_pclk,
8421 - &macb1_hclk,
8422 - &macb1_pclk,
8423 - &atmel_spi0_spi_clk,
8424 - &atmel_spi1_spi_clk,
8425 - &atmel_twi0_pclk,
8426 - &atmel_mci0_pclk,
8427 - &atmel_lcdfb0_hck1,
8428 - &atmel_lcdfb0_pixclk,
8429 - &ssc0_pclk,
8430 - &ssc1_pclk,
8431 - &ssc2_pclk,
8432 - &usba0_hclk,
8433 - &usba0_pclk,
8434 - &atmel_ac97c0_pclk,
8435 - &abdac0_pclk,
8436 - &abdac0_sample_clk,
8437 - &gclk0,
8438 - &gclk1,
8439 - &gclk2,
8440 - &gclk3,
8441 - &gclk4,
8442 -};
8443 -unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
8444 -
8445 -void __init at32_portmux_init(void)
8446 -{
8447 - at32_init_pio(&pio0_device);
8448 - at32_init_pio(&pio1_device);
8449 - at32_init_pio(&pio2_device);
8450 - at32_init_pio(&pio3_device);
8451 - at32_init_pio(&pio4_device);
8452 -}
8453 -
8454 -void __init at32_clock_init(void)
8455 -{
8456 - u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
8457 - int i;
8458 -
8459 - if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
8460 - main_clock = &pll0;
8461 - cpu_clk.parent = &pll0;
8462 - } else {
8463 - main_clock = &osc0;
8464 - cpu_clk.parent = &osc0;
8465 - }
8466 -
8467 - if (pm_readl(PLL0) & PM_BIT(PLLOSC))
8468 - pll0.parent = &osc1;
8469 - if (pm_readl(PLL1) & PM_BIT(PLLOSC))
8470 - pll1.parent = &osc1;
8471 -
8472 - genclk_init_parent(&gclk0);
8473 - genclk_init_parent(&gclk1);
8474 - genclk_init_parent(&gclk2);
8475 - genclk_init_parent(&gclk3);
8476 - genclk_init_parent(&gclk4);
8477 - genclk_init_parent(&atmel_lcdfb0_pixclk);
8478 - genclk_init_parent(&abdac0_sample_clk);
8479 -
8480 - /*
8481 - * Turn on all clocks that have at least one user already, and
8482 - * turn off everything else. We only do this for module
8483 - * clocks, and even though it isn't particularly pretty to
8484 - * check the address of the mode function, it should do the
8485 - * trick...
8486 - */
8487 - for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
8488 - struct clk *clk = at32_clock_list[i];
8489 -
8490 - if (clk->users == 0)
8491 - continue;
8492 -
8493 - if (clk->mode == &cpu_clk_mode)
8494 - cpu_mask |= 1 << clk->index;
8495 - else if (clk->mode == &hsb_clk_mode)
8496 - hsb_mask |= 1 << clk->index;
8497 - else if (clk->mode == &pba_clk_mode)
8498 - pba_mask |= 1 << clk->index;
8499 - else if (clk->mode == &pbb_clk_mode)
8500 - pbb_mask |= 1 << clk->index;
8501 - }
8502 -
8503 - pm_writel(CPU_MASK, cpu_mask);
8504 - pm_writel(HSB_MASK, hsb_mask);
8505 - pm_writel(PBA_MASK, pba_mask);
8506 - pm_writel(PBB_MASK, pbb_mask);
8507 -}
8508 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap700x.c avr32-2.6/arch/avr32/mach-at32ap/at32ap700x.c
8509 --- linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap700x.c 1970-01-01 01:00:00.000000000 +0100
8510 +++ avr32-2.6/arch/avr32/mach-at32ap/at32ap700x.c 2008-04-23 20:12:35.000000000 +0200
8511 @@ -0,0 +1,1944 @@
8512 +/*
8513 + * Copyright (C) 2005-2006 Atmel Corporation
8514 + *
8515 + * This program is free software; you can redistribute it and/or modify
8516 + * it under the terms of the GNU General Public License version 2 as
8517 + * published by the Free Software Foundation.
8518 + */
8519 +#include <linux/clk.h>
8520 +#include <linux/fb.h>
8521 +#include <linux/init.h>
8522 +#include <linux/platform_device.h>
8523 +#include <linux/dma-mapping.h>
8524 +#include <linux/spi/spi.h>
8525 +#include <linux/usb/atmel_usba_udc.h>
8526 +
8527 +#include <asm/io.h>
8528 +#include <asm/irq.h>
8529 +
8530 +#include <asm/arch/at32ap700x.h>
8531 +#include <asm/arch/board.h>
8532 +#include <asm/arch/portmux.h>
8533 +
8534 +#include <video/atmel_lcdc.h>
8535 +
8536 +#include "clock.h"
8537 +#include "hmatrix.h"
8538 +#include "pio.h"
8539 +#include "pm.h"
8540 +
8541 +
8542 +#define PBMEM(base) \
8543 + { \
8544 + .start = base, \
8545 + .end = base + 0x3ff, \
8546 + .flags = IORESOURCE_MEM, \
8547 + }
8548 +#define IRQ(num) \
8549 + { \
8550 + .start = num, \
8551 + .end = num, \
8552 + .flags = IORESOURCE_IRQ, \
8553 + }
8554 +#define NAMED_IRQ(num, _name) \
8555 + { \
8556 + .start = num, \
8557 + .end = num, \
8558 + .name = _name, \
8559 + .flags = IORESOURCE_IRQ, \
8560 + }
8561 +
8562 +/* REVISIT these assume *every* device supports DMA, but several
8563 + * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
8564 + */
8565 +#define DEFINE_DEV(_name, _id) \
8566 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8567 +static struct platform_device _name##_id##_device = { \
8568 + .name = #_name, \
8569 + .id = _id, \
8570 + .dev = { \
8571 + .dma_mask = &_name##_id##_dma_mask, \
8572 + .coherent_dma_mask = DMA_32BIT_MASK, \
8573 + }, \
8574 + .resource = _name##_id##_resource, \
8575 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8576 +}
8577 +#define DEFINE_DEV_DATA(_name, _id) \
8578 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8579 +static struct platform_device _name##_id##_device = { \
8580 + .name = #_name, \
8581 + .id = _id, \
8582 + .dev = { \
8583 + .dma_mask = &_name##_id##_dma_mask, \
8584 + .platform_data = &_name##_id##_data, \
8585 + .coherent_dma_mask = DMA_32BIT_MASK, \
8586 + }, \
8587 + .resource = _name##_id##_resource, \
8588 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8589 +}
8590 +
8591 +#define select_peripheral(pin, periph, flags) \
8592 + at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
8593 +
8594 +#define DEV_CLK(_name, devname, bus, _index) \
8595 +static struct clk devname##_##_name = { \
8596 + .name = #_name, \
8597 + .dev = &devname##_device.dev, \
8598 + .parent = &bus##_clk, \
8599 + .mode = bus##_clk_mode, \
8600 + .get_rate = bus##_clk_get_rate, \
8601 + .index = _index, \
8602 +}
8603 +
8604 +static DEFINE_SPINLOCK(pm_lock);
8605 +
8606 +unsigned long at32ap7000_osc_rates[3] = {
8607 + [0] = 32768,
8608 + /* FIXME: these are ATSTK1002-specific */
8609 + [1] = 20000000,
8610 + [2] = 12000000,
8611 +};
8612 +
8613 +static unsigned long osc_get_rate(struct clk *clk)
8614 +{
8615 + return at32ap7000_osc_rates[clk->index];
8616 +}
8617 +
8618 +static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
8619 +{
8620 + unsigned long div, mul, rate;
8621 +
8622 + if (!(control & PM_BIT(PLLEN)))
8623 + return 0;
8624 +
8625 + div = PM_BFEXT(PLLDIV, control) + 1;
8626 + mul = PM_BFEXT(PLLMUL, control) + 1;
8627 +
8628 + rate = clk->parent->get_rate(clk->parent);
8629 + rate = (rate + div / 2) / div;
8630 + rate *= mul;
8631 +
8632 + return rate;
8633 +}
8634 +
8635 +static unsigned long pll0_get_rate(struct clk *clk)
8636 +{
8637 + u32 control;
8638 +
8639 + control = pm_readl(PLL0);
8640 +
8641 + return pll_get_rate(clk, control);
8642 +}
8643 +
8644 +static unsigned long pll1_get_rate(struct clk *clk)
8645 +{
8646 + u32 control;
8647 +
8648 + control = pm_readl(PLL1);
8649 +
8650 + return pll_get_rate(clk, control);
8651 +}
8652 +
8653 +/*
8654 + * The AT32AP7000 has five primary clock sources: One 32kHz
8655 + * oscillator, two crystal oscillators and two PLLs.
8656 + */
8657 +static struct clk osc32k = {
8658 + .name = "osc32k",
8659 + .get_rate = osc_get_rate,
8660 + .users = 1,
8661 + .index = 0,
8662 +};
8663 +static struct clk osc0 = {
8664 + .name = "osc0",
8665 + .get_rate = osc_get_rate,
8666 + .users = 1,
8667 + .index = 1,
8668 +};
8669 +static struct clk osc1 = {
8670 + .name = "osc1",
8671 + .get_rate = osc_get_rate,
8672 + .index = 2,
8673 +};
8674 +static struct clk pll0 = {
8675 + .name = "pll0",
8676 + .get_rate = pll0_get_rate,
8677 + .parent = &osc0,
8678 +};
8679 +static struct clk pll1 = {
8680 + .name = "pll1",
8681 + .get_rate = pll1_get_rate,
8682 + .parent = &osc0,
8683 +};
8684 +
8685 +/*
8686 + * The main clock can be either osc0 or pll0. The boot loader may
8687 + * have chosen one for us, so we don't really know which one until we
8688 + * have a look at the SM.
8689 + */
8690 +static struct clk *main_clock;
8691 +
8692 +/*
8693 + * Synchronous clocks are generated from the main clock. The clocks
8694 + * must satisfy the constraint
8695 + * fCPU >= fHSB >= fPB
8696 + * i.e. each clock must not be faster than its parent.
8697 + */
8698 +static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
8699 +{
8700 + return main_clock->get_rate(main_clock) >> shift;
8701 +};
8702 +
8703 +static void cpu_clk_mode(struct clk *clk, int enabled)
8704 +{
8705 + unsigned long flags;
8706 + u32 mask;
8707 +
8708 + spin_lock_irqsave(&pm_lock, flags);
8709 + mask = pm_readl(CPU_MASK);
8710 + if (enabled)
8711 + mask |= 1 << clk->index;
8712 + else
8713 + mask &= ~(1 << clk->index);
8714 + pm_writel(CPU_MASK, mask);
8715 + spin_unlock_irqrestore(&pm_lock, flags);
8716 +}
8717 +
8718 +static unsigned long cpu_clk_get_rate(struct clk *clk)
8719 +{
8720 + unsigned long cksel, shift = 0;
8721 +
8722 + cksel = pm_readl(CKSEL);
8723 + if (cksel & PM_BIT(CPUDIV))
8724 + shift = PM_BFEXT(CPUSEL, cksel) + 1;
8725 +
8726 + return bus_clk_get_rate(clk, shift);
8727 +}
8728 +
8729 +static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
8730 +{
8731 + u32 control;
8732 + unsigned long parent_rate, child_div, actual_rate, div;
8733 +
8734 + parent_rate = clk->parent->get_rate(clk->parent);
8735 + control = pm_readl(CKSEL);
8736 +
8737 + if (control & PM_BIT(HSBDIV))
8738 + child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
8739 + else
8740 + child_div = 1;
8741 +
8742 + if (rate > 3 * (parent_rate / 4) || child_div == 1) {
8743 + actual_rate = parent_rate;
8744 + control &= ~PM_BIT(CPUDIV);
8745 + } else {
8746 + unsigned int cpusel;
8747 + div = (parent_rate + rate / 2) / rate;
8748 + if (div > child_div)
8749 + div = child_div;
8750 + cpusel = (div > 1) ? (fls(div) - 2) : 0;
8751 + control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
8752 + actual_rate = parent_rate / (1 << (cpusel + 1));
8753 + }
8754 +
8755 + pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
8756 + clk->name, rate, actual_rate);
8757 +
8758 + if (apply)
8759 + pm_writel(CKSEL, control);
8760 +
8761 + return actual_rate;
8762 +}
8763 +
8764 +static void hsb_clk_mode(struct clk *clk, int enabled)
8765 +{
8766 + unsigned long flags;
8767 + u32 mask;
8768 +
8769 + spin_lock_irqsave(&pm_lock, flags);
8770 + mask = pm_readl(HSB_MASK);
8771 + if (enabled)
8772 + mask |= 1 << clk->index;
8773 + else
8774 + mask &= ~(1 << clk->index);
8775 + pm_writel(HSB_MASK, mask);
8776 + spin_unlock_irqrestore(&pm_lock, flags);
8777 +}
8778 +
8779 +static unsigned long hsb_clk_get_rate(struct clk *clk)
8780 +{
8781 + unsigned long cksel, shift = 0;
8782 +
8783 + cksel = pm_readl(CKSEL);
8784 + if (cksel & PM_BIT(HSBDIV))
8785 + shift = PM_BFEXT(HSBSEL, cksel) + 1;
8786 +
8787 + return bus_clk_get_rate(clk, shift);
8788 +}
8789 +
8790 +static void pba_clk_mode(struct clk *clk, int enabled)
8791 +{
8792 + unsigned long flags;
8793 + u32 mask;
8794 +
8795 + spin_lock_irqsave(&pm_lock, flags);
8796 + mask = pm_readl(PBA_MASK);
8797 + if (enabled)
8798 + mask |= 1 << clk->index;
8799 + else
8800 + mask &= ~(1 << clk->index);
8801 + pm_writel(PBA_MASK, mask);
8802 + spin_unlock_irqrestore(&pm_lock, flags);
8803 +}
8804 +
8805 +static unsigned long pba_clk_get_rate(struct clk *clk)
8806 +{
8807 + unsigned long cksel, shift = 0;
8808 +
8809 + cksel = pm_readl(CKSEL);
8810 + if (cksel & PM_BIT(PBADIV))
8811 + shift = PM_BFEXT(PBASEL, cksel) + 1;
8812 +
8813 + return bus_clk_get_rate(clk, shift);
8814 +}
8815 +
8816 +static void pbb_clk_mode(struct clk *clk, int enabled)
8817 +{
8818 + unsigned long flags;
8819 + u32 mask;
8820 +
8821 + spin_lock_irqsave(&pm_lock, flags);
8822 + mask = pm_readl(PBB_MASK);
8823 + if (enabled)
8824 + mask |= 1 << clk->index;
8825 + else
8826 + mask &= ~(1 << clk->index);
8827 + pm_writel(PBB_MASK, mask);
8828 + spin_unlock_irqrestore(&pm_lock, flags);
8829 +}
8830 +
8831 +static unsigned long pbb_clk_get_rate(struct clk *clk)
8832 +{
8833 + unsigned long cksel, shift = 0;
8834 +
8835 + cksel = pm_readl(CKSEL);
8836 + if (cksel & PM_BIT(PBBDIV))
8837 + shift = PM_BFEXT(PBBSEL, cksel) + 1;
8838 +
8839 + return bus_clk_get_rate(clk, shift);
8840 +}
8841 +
8842 +static struct clk cpu_clk = {
8843 + .name = "cpu",
8844 + .get_rate = cpu_clk_get_rate,
8845 + .set_rate = cpu_clk_set_rate,
8846 + .users = 1,
8847 +};
8848 +static struct clk hsb_clk = {
8849 + .name = "hsb",
8850 + .parent = &cpu_clk,
8851 + .get_rate = hsb_clk_get_rate,
8852 +};
8853 +static struct clk pba_clk = {
8854 + .name = "pba",
8855 + .parent = &hsb_clk,
8856 + .mode = hsb_clk_mode,
8857 + .get_rate = pba_clk_get_rate,
8858 + .index = 1,
8859 +};
8860 +static struct clk pbb_clk = {
8861 + .name = "pbb",
8862 + .parent = &hsb_clk,
8863 + .mode = hsb_clk_mode,
8864 + .get_rate = pbb_clk_get_rate,
8865 + .users = 1,
8866 + .index = 2,
8867 +};
8868 +
8869 +/* --------------------------------------------------------------------
8870 + * Generic Clock operations
8871 + * -------------------------------------------------------------------- */
8872 +
8873 +static void genclk_mode(struct clk *clk, int enabled)
8874 +{
8875 + u32 control;
8876 +
8877 + control = pm_readl(GCCTRL(clk->index));
8878 + if (enabled)
8879 + control |= PM_BIT(CEN);
8880 + else
8881 + control &= ~PM_BIT(CEN);
8882 + pm_writel(GCCTRL(clk->index), control);
8883 +}
8884 +
8885 +static unsigned long genclk_get_rate(struct clk *clk)
8886 +{
8887 + u32 control;
8888 + unsigned long div = 1;
8889 +
8890 + control = pm_readl(GCCTRL(clk->index));
8891 + if (control & PM_BIT(DIVEN))
8892 + div = 2 * (PM_BFEXT(DIV, control) + 1);
8893 +
8894 + return clk->parent->get_rate(clk->parent) / div;
8895 +}
8896 +
8897 +static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
8898 +{
8899 + u32 control;
8900 + unsigned long parent_rate, actual_rate, div;
8901 +
8902 + parent_rate = clk->parent->get_rate(clk->parent);
8903 + control = pm_readl(GCCTRL(clk->index));
8904 +
8905 + if (rate > 3 * parent_rate / 4) {
8906 + actual_rate = parent_rate;
8907 + control &= ~PM_BIT(DIVEN);
8908 + } else {
8909 + div = (parent_rate + rate) / (2 * rate) - 1;
8910 + control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
8911 + actual_rate = parent_rate / (2 * (div + 1));
8912 + }
8913 +
8914 + dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
8915 + clk->name, rate, actual_rate);
8916 +
8917 + if (apply)
8918 + pm_writel(GCCTRL(clk->index), control);
8919 +
8920 + return actual_rate;
8921 +}
8922 +
8923 +int genclk_set_parent(struct clk *clk, struct clk *parent)
8924 +{
8925 + u32 control;
8926 +
8927 + dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
8928 + clk->name, parent->name, clk->parent->name);
8929 +
8930 + control = pm_readl(GCCTRL(clk->index));
8931 +
8932 + if (parent == &osc1 || parent == &pll1)
8933 + control |= PM_BIT(OSCSEL);
8934 + else if (parent == &osc0 || parent == &pll0)
8935 + control &= ~PM_BIT(OSCSEL);
8936 + else
8937 + return -EINVAL;
8938 +
8939 + if (parent == &pll0 || parent == &pll1)
8940 + control |= PM_BIT(PLLSEL);
8941 + else
8942 + control &= ~PM_BIT(PLLSEL);
8943 +
8944 + pm_writel(GCCTRL(clk->index), control);
8945 + clk->parent = parent;
8946 +
8947 + return 0;
8948 +}
8949 +
8950 +static void __init genclk_init_parent(struct clk *clk)
8951 +{
8952 + u32 control;
8953 + struct clk *parent;
8954 +
8955 + BUG_ON(clk->index > 7);
8956 +
8957 + control = pm_readl(GCCTRL(clk->index));
8958 + if (control & PM_BIT(OSCSEL))
8959 + parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
8960 + else
8961 + parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
8962 +
8963 + clk->parent = parent;
8964 +}
8965 +
8966 +/* --------------------------------------------------------------------
8967 + * System peripherals
8968 + * -------------------------------------------------------------------- */
8969 +static struct resource at32_pm0_resource[] = {
8970 + {
8971 + .start = 0xfff00000,
8972 + .end = 0xfff0007f,
8973 + .flags = IORESOURCE_MEM,
8974 + },
8975 + IRQ(20),
8976 +};
8977 +
8978 +static struct resource at32ap700x_rtc0_resource[] = {
8979 + {
8980 + .start = 0xfff00080,
8981 + .end = 0xfff000af,
8982 + .flags = IORESOURCE_MEM,
8983 + },
8984 + IRQ(21),
8985 +};
8986 +
8987 +static struct resource at32_wdt0_resource[] = {
8988 + {
8989 + .start = 0xfff000b0,
8990 + .end = 0xfff000cf,
8991 + .flags = IORESOURCE_MEM,
8992 + },
8993 +};
8994 +
8995 +static struct resource at32_eic0_resource[] = {
8996 + {
8997 + .start = 0xfff00100,
8998 + .end = 0xfff0013f,
8999 + .flags = IORESOURCE_MEM,
9000 + },
9001 + IRQ(19),
9002 +};
9003 +
9004 +DEFINE_DEV(at32_pm, 0);
9005 +DEFINE_DEV(at32ap700x_rtc, 0);
9006 +DEFINE_DEV(at32_wdt, 0);
9007 +DEFINE_DEV(at32_eic, 0);
9008 +
9009 +/*
9010 + * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
9011 + * is always running.
9012 + */
9013 +static struct clk at32_pm_pclk = {
9014 + .name = "pclk",
9015 + .dev = &at32_pm0_device.dev,
9016 + .parent = &pbb_clk,
9017 + .mode = pbb_clk_mode,
9018 + .get_rate = pbb_clk_get_rate,
9019 + .users = 1,
9020 + .index = 0,
9021 +};
9022 +
9023 +static struct resource intc0_resource[] = {
9024 + PBMEM(0xfff00400),
9025 +};
9026 +struct platform_device at32_intc0_device = {
9027 + .name = "intc",
9028 + .id = 0,
9029 + .resource = intc0_resource,
9030 + .num_resources = ARRAY_SIZE(intc0_resource),
9031 +};
9032 +DEV_CLK(pclk, at32_intc0, pbb, 1);
9033 +
9034 +static struct clk ebi_clk = {
9035 + .name = "ebi",
9036 + .parent = &hsb_clk,
9037 + .mode = hsb_clk_mode,
9038 + .get_rate = hsb_clk_get_rate,
9039 + .users = 1,
9040 +};
9041 +static struct clk hramc_clk = {
9042 + .name = "hramc",
9043 + .parent = &hsb_clk,
9044 + .mode = hsb_clk_mode,
9045 + .get_rate = hsb_clk_get_rate,
9046 + .users = 1,
9047 + .index = 3,
9048 +};
9049 +
9050 +static struct resource smc0_resource[] = {
9051 + PBMEM(0xfff03400),
9052 +};
9053 +DEFINE_DEV(smc, 0);
9054 +DEV_CLK(pclk, smc0, pbb, 13);
9055 +DEV_CLK(mck, smc0, hsb, 0);
9056 +
9057 +static struct platform_device pdc_device = {
9058 + .name = "pdc",
9059 + .id = 0,
9060 +};
9061 +DEV_CLK(hclk, pdc, hsb, 4);
9062 +DEV_CLK(pclk, pdc, pba, 16);
9063 +
9064 +static struct clk pico_clk = {
9065 + .name = "pico",
9066 + .parent = &cpu_clk,
9067 + .mode = cpu_clk_mode,
9068 + .get_rate = cpu_clk_get_rate,
9069 + .users = 1,
9070 +};
9071 +
9072 +static struct resource dmaca0_resource[] = {
9073 + {
9074 + .start = 0xff200000,
9075 + .end = 0xff20ffff,
9076 + .flags = IORESOURCE_MEM,
9077 + },
9078 + IRQ(2),
9079 +};
9080 +DEFINE_DEV(dmaca, 0);
9081 +DEV_CLK(hclk, dmaca0, hsb, 10);
9082 +
9083 +/* --------------------------------------------------------------------
9084 + * HMATRIX
9085 + * -------------------------------------------------------------------- */
9086 +
9087 +static struct clk hmatrix_clk = {
9088 + .name = "hmatrix_clk",
9089 + .parent = &pbb_clk,
9090 + .mode = pbb_clk_mode,
9091 + .get_rate = pbb_clk_get_rate,
9092 + .index = 2,
9093 + .users = 1,
9094 +};
9095 +#define HMATRIX_BASE ((void __iomem *)0xfff00800)
9096 +
9097 +#define hmatrix_readl(reg) \
9098 + __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
9099 +#define hmatrix_writel(reg,value) \
9100 + __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
9101 +
9102 +/*
9103 + * Set bits in the HMATRIX Special Function Register (SFR) used by the
9104 + * External Bus Interface (EBI). This can be used to enable special
9105 + * features like CompactFlash support, NAND Flash support, etc. on
9106 + * certain chipselects.
9107 + */
9108 +static inline void set_ebi_sfr_bits(u32 mask)
9109 +{
9110 + u32 sfr;
9111 +
9112 + clk_enable(&hmatrix_clk);
9113 + sfr = hmatrix_readl(SFR4);
9114 + sfr |= mask;
9115 + hmatrix_writel(SFR4, sfr);
9116 + clk_disable(&hmatrix_clk);
9117 +}
9118 +
9119 +/* --------------------------------------------------------------------
9120 + * Timer/Counter (TC)
9121 + * -------------------------------------------------------------------- */
9122 +
9123 +static struct resource at32_tcb0_resource[] = {
9124 + PBMEM(0xfff00c00),
9125 + IRQ(22),
9126 +};
9127 +static struct platform_device at32_tcb0_device = {
9128 + .name = "atmel_tcb",
9129 + .id = 0,
9130 + .resource = at32_tcb0_resource,
9131 + .num_resources = ARRAY_SIZE(at32_tcb0_resource),
9132 +};
9133 +DEV_CLK(t0_clk, at32_tcb0, pbb, 3);
9134 +
9135 +static struct resource at32_tcb1_resource[] = {
9136 + PBMEM(0xfff01000),
9137 + IRQ(23),
9138 +};
9139 +static struct platform_device at32_tcb1_device = {
9140 + .name = "atmel_tcb",
9141 + .id = 1,
9142 + .resource = at32_tcb1_resource,
9143 + .num_resources = ARRAY_SIZE(at32_tcb1_resource),
9144 +};
9145 +DEV_CLK(t0_clk, at32_tcb1, pbb, 4);
9146 +
9147 +/* --------------------------------------------------------------------
9148 + * PIO
9149 + * -------------------------------------------------------------------- */
9150 +
9151 +static struct resource pio0_resource[] = {
9152 + PBMEM(0xffe02800),
9153 + IRQ(13),
9154 +};
9155 +DEFINE_DEV(pio, 0);
9156 +DEV_CLK(mck, pio0, pba, 10);
9157 +
9158 +static struct resource pio1_resource[] = {
9159 + PBMEM(0xffe02c00),
9160 + IRQ(14),
9161 +};
9162 +DEFINE_DEV(pio, 1);
9163 +DEV_CLK(mck, pio1, pba, 11);
9164 +
9165 +static struct resource pio2_resource[] = {
9166 + PBMEM(0xffe03000),
9167 + IRQ(15),
9168 +};
9169 +DEFINE_DEV(pio, 2);
9170 +DEV_CLK(mck, pio2, pba, 12);
9171 +
9172 +static struct resource pio3_resource[] = {
9173 + PBMEM(0xffe03400),
9174 + IRQ(16),
9175 +};
9176 +DEFINE_DEV(pio, 3);
9177 +DEV_CLK(mck, pio3, pba, 13);
9178 +
9179 +static struct resource pio4_resource[] = {
9180 + PBMEM(0xffe03800),
9181 + IRQ(17),
9182 +};
9183 +DEFINE_DEV(pio, 4);
9184 +DEV_CLK(mck, pio4, pba, 14);
9185 +
9186 +void __init at32_add_system_devices(void)
9187 +{
9188 + platform_device_register(&at32_pm0_device);
9189 + platform_device_register(&at32_intc0_device);
9190 + platform_device_register(&at32ap700x_rtc0_device);
9191 + platform_device_register(&at32_wdt0_device);
9192 + platform_device_register(&at32_eic0_device);
9193 + platform_device_register(&smc0_device);
9194 + platform_device_register(&pdc_device);
9195 + platform_device_register(&dmaca0_device);
9196 +
9197 + platform_device_register(&at32_tcb0_device);
9198 + platform_device_register(&at32_tcb1_device);
9199 +
9200 + platform_device_register(&pio0_device);
9201 + platform_device_register(&pio1_device);
9202 + platform_device_register(&pio2_device);
9203 + platform_device_register(&pio3_device);
9204 + platform_device_register(&pio4_device);
9205 +}
9206 +
9207 +/* --------------------------------------------------------------------
9208 + * PSIF
9209 + * -------------------------------------------------------------------- */
9210 +static struct resource atmel_psif0_resource[] __initdata = {
9211 + {
9212 + .start = 0xffe03c00,
9213 + .end = 0xffe03cff,
9214 + .flags = IORESOURCE_MEM,
9215 + },
9216 + IRQ(18),
9217 +};
9218 +static struct clk atmel_psif0_pclk = {
9219 + .name = "pclk",
9220 + .parent = &pba_clk,
9221 + .mode = pba_clk_mode,
9222 + .get_rate = pba_clk_get_rate,
9223 + .index = 15,
9224 +};
9225 +
9226 +static struct resource atmel_psif1_resource[] __initdata = {
9227 + {
9228 + .start = 0xffe03d00,
9229 + .end = 0xffe03dff,
9230 + .flags = IORESOURCE_MEM,
9231 + },
9232 + IRQ(18),
9233 +};
9234 +static struct clk atmel_psif1_pclk = {
9235 + .name = "pclk",
9236 + .parent = &pba_clk,
9237 + .mode = pba_clk_mode,
9238 + .get_rate = pba_clk_get_rate,
9239 + .index = 15,
9240 +};
9241 +
9242 +struct platform_device *__init at32_add_device_psif(unsigned int id)
9243 +{
9244 + struct platform_device *pdev;
9245 +
9246 + if (!(id == 0 || id == 1))
9247 + return NULL;
9248 +
9249 + pdev = platform_device_alloc("atmel_psif", id);
9250 + if (!pdev)
9251 + return NULL;
9252 +
9253 + switch (id) {
9254 + case 0:
9255 + if (platform_device_add_resources(pdev, atmel_psif0_resource,
9256 + ARRAY_SIZE(atmel_psif0_resource)))
9257 + goto err_add_resources;
9258 + atmel_psif0_pclk.dev = &pdev->dev;
9259 + select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
9260 + select_peripheral(PA(9), PERIPH_A, 0); /* DATA */
9261 + break;
9262 + case 1:
9263 + if (platform_device_add_resources(pdev, atmel_psif1_resource,
9264 + ARRAY_SIZE(atmel_psif1_resource)))
9265 + goto err_add_resources;
9266 + atmel_psif1_pclk.dev = &pdev->dev;
9267 + select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
9268 + select_peripheral(PB(12), PERIPH_A, 0); /* DATA */
9269 + break;
9270 + default:
9271 + return NULL;
9272 + }
9273 +
9274 + platform_device_add(pdev);
9275 + return pdev;
9276 +
9277 +err_add_resources:
9278 + platform_device_put(pdev);
9279 + return NULL;
9280 +}
9281 +
9282 +/* --------------------------------------------------------------------
9283 + * USART
9284 + * -------------------------------------------------------------------- */
9285 +
9286 +static struct atmel_uart_data atmel_usart0_data = {
9287 + .use_dma_tx = 1,
9288 + .use_dma_rx = 1,
9289 +};
9290 +static struct resource atmel_usart0_resource[] = {
9291 + PBMEM(0xffe00c00),
9292 + IRQ(6),
9293 +};
9294 +DEFINE_DEV_DATA(atmel_usart, 0);
9295 +DEV_CLK(usart, atmel_usart0, pba, 3);
9296 +
9297 +static struct atmel_uart_data atmel_usart1_data = {
9298 + .use_dma_tx = 1,
9299 + .use_dma_rx = 1,
9300 +};
9301 +static struct resource atmel_usart1_resource[] = {
9302 + PBMEM(0xffe01000),
9303 + IRQ(7),
9304 +};
9305 +DEFINE_DEV_DATA(atmel_usart, 1);
9306 +DEV_CLK(usart, atmel_usart1, pba, 4);
9307 +
9308 +static struct atmel_uart_data atmel_usart2_data = {
9309 + .use_dma_tx = 1,
9310 + .use_dma_rx = 1,
9311 +};
9312 +static struct resource atmel_usart2_resource[] = {
9313 + PBMEM(0xffe01400),
9314 + IRQ(8),
9315 +};
9316 +DEFINE_DEV_DATA(atmel_usart, 2);
9317 +DEV_CLK(usart, atmel_usart2, pba, 5);
9318 +
9319 +static struct atmel_uart_data atmel_usart3_data = {
9320 + .use_dma_tx = 1,
9321 + .use_dma_rx = 1,
9322 +};
9323 +static struct resource atmel_usart3_resource[] = {
9324 + PBMEM(0xffe01800),
9325 + IRQ(9),
9326 +};
9327 +DEFINE_DEV_DATA(atmel_usart, 3);
9328 +DEV_CLK(usart, atmel_usart3, pba, 6);
9329 +
9330 +static inline void configure_usart0_pins(void)
9331 +{
9332 + select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
9333 + select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
9334 +}
9335 +
9336 +static inline void configure_usart1_pins(void)
9337 +{
9338 + select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
9339 + select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
9340 +}
9341 +
9342 +static inline void configure_usart2_pins(void)
9343 +{
9344 + select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
9345 + select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
9346 +}
9347 +
9348 +static inline void configure_usart3_pins(void)
9349 +{
9350 + select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
9351 + select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
9352 +}
9353 +
9354 +static struct platform_device *__initdata at32_usarts[4];
9355 +
9356 +void __init at32_map_usart(unsigned int hw_id, unsigned int line)
9357 +{
9358 + struct platform_device *pdev;
9359 +
9360 + switch (hw_id) {
9361 + case 0:
9362 + pdev = &atmel_usart0_device;
9363 + configure_usart0_pins();
9364 + break;
9365 + case 1:
9366 + pdev = &atmel_usart1_device;
9367 + configure_usart1_pins();
9368 + break;
9369 + case 2:
9370 + pdev = &atmel_usart2_device;
9371 + configure_usart2_pins();
9372 + break;
9373 + case 3:
9374 + pdev = &atmel_usart3_device;
9375 + configure_usart3_pins();
9376 + break;
9377 + default:
9378 + return;
9379 + }
9380 +
9381 + if (PXSEG(pdev->resource[0].start) == P4SEG) {
9382 + /* Addresses in the P4 segment are permanently mapped 1:1 */
9383 + struct atmel_uart_data *data = pdev->dev.platform_data;
9384 + data->regs = (void __iomem *)pdev->resource[0].start;
9385 + }
9386 +
9387 + pdev->id = line;
9388 + at32_usarts[line] = pdev;
9389 +}
9390 +
9391 +struct platform_device *__init at32_add_device_usart(unsigned int id)
9392 +{
9393 + platform_device_register(at32_usarts[id]);
9394 + return at32_usarts[id];
9395 +}
9396 +
9397 +struct platform_device *atmel_default_console_device;
9398 +
9399 +void __init at32_setup_serial_console(unsigned int usart_id)
9400 +{
9401 + atmel_default_console_device = at32_usarts[usart_id];
9402 +}
9403 +
9404 +/* --------------------------------------------------------------------
9405 + * Ethernet
9406 + * -------------------------------------------------------------------- */
9407 +
9408 +#ifdef CONFIG_CPU_AT32AP7000
9409 +static struct eth_platform_data macb0_data;
9410 +static struct resource macb0_resource[] = {
9411 + PBMEM(0xfff01800),
9412 + IRQ(25),
9413 +};
9414 +DEFINE_DEV_DATA(macb, 0);
9415 +DEV_CLK(hclk, macb0, hsb, 8);
9416 +DEV_CLK(pclk, macb0, pbb, 6);
9417 +
9418 +static struct eth_platform_data macb1_data;
9419 +static struct resource macb1_resource[] = {
9420 + PBMEM(0xfff01c00),
9421 + IRQ(26),
9422 +};
9423 +DEFINE_DEV_DATA(macb, 1);
9424 +DEV_CLK(hclk, macb1, hsb, 9);
9425 +DEV_CLK(pclk, macb1, pbb, 7);
9426 +
9427 +struct platform_device *__init
9428 +at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
9429 +{
9430 + struct platform_device *pdev;
9431 +
9432 + switch (id) {
9433 + case 0:
9434 + pdev = &macb0_device;
9435 +
9436 + select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
9437 + select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
9438 + select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
9439 + select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
9440 + select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
9441 + select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
9442 + select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
9443 + select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
9444 + select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
9445 + select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
9446 +
9447 + if (!data->is_rmii) {
9448 + select_peripheral(PC(0), PERIPH_A, 0); /* COL */
9449 + select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
9450 + select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
9451 + select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
9452 + select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
9453 + select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
9454 + select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
9455 + select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
9456 + select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
9457 + }
9458 + break;
9459 +
9460 + case 1:
9461 + pdev = &macb1_device;
9462 +
9463 + select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
9464 + select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
9465 + select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
9466 + select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
9467 + select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
9468 + select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
9469 + select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
9470 + select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
9471 + select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
9472 + select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
9473 +
9474 + if (!data->is_rmii) {
9475 + select_peripheral(PC(19), PERIPH_B, 0); /* COL */
9476 + select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
9477 + select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
9478 + select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
9479 + select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
9480 + select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
9481 + select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
9482 + select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
9483 + select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
9484 + }
9485 + break;
9486 +
9487 + default:
9488 + return NULL;
9489 + }
9490 +
9491 + memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
9492 + platform_device_register(pdev);
9493 +
9494 + return pdev;
9495 +}
9496 +#endif
9497 +
9498 +/* --------------------------------------------------------------------
9499 + * SPI
9500 + * -------------------------------------------------------------------- */
9501 +static struct resource atmel_spi0_resource[] = {
9502 + PBMEM(0xffe00000),
9503 + IRQ(3),
9504 +};
9505 +DEFINE_DEV(atmel_spi, 0);
9506 +DEV_CLK(spi_clk, atmel_spi0, pba, 0);
9507 +
9508 +static struct resource atmel_spi1_resource[] = {
9509 + PBMEM(0xffe00400),
9510 + IRQ(4),
9511 +};
9512 +DEFINE_DEV(atmel_spi, 1);
9513 +DEV_CLK(spi_clk, atmel_spi1, pba, 1);
9514 +
9515 +static void __init
9516 +at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
9517 + unsigned int n, const u8 *pins)
9518 +{
9519 + unsigned int pin, mode;
9520 +
9521 + for (; n; n--, b++) {
9522 + b->bus_num = bus_num;
9523 + if (b->chip_select >= 4)
9524 + continue;
9525 + pin = (unsigned)b->controller_data;
9526 + if (!pin) {
9527 + pin = pins[b->chip_select];
9528 + b->controller_data = (void *)pin;
9529 + }
9530 + mode = AT32_GPIOF_OUTPUT;
9531 + if (!(b->mode & SPI_CS_HIGH))
9532 + mode |= AT32_GPIOF_HIGH;
9533 + at32_select_gpio(pin, mode);
9534 + }
9535 +}
9536 +
9537 +struct platform_device *__init
9538 +at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
9539 +{
9540 + /*
9541 + * Manage the chipselects as GPIOs, normally using the same pins
9542 + * the SPI controller expects; but boards can use other pins.
9543 + */
9544 + static u8 __initdata spi0_pins[] =
9545 + { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
9546 + GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
9547 + static u8 __initdata spi1_pins[] =
9548 + { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
9549 + GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
9550 + struct platform_device *pdev;
9551 +
9552 + switch (id) {
9553 + case 0:
9554 + pdev = &atmel_spi0_device;
9555 + select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
9556 + select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
9557 + select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
9558 + at32_spi_setup_slaves(0, b, n, spi0_pins);
9559 + break;
9560 +
9561 + case 1:
9562 + pdev = &atmel_spi1_device;
9563 + select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
9564 + select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
9565 + select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
9566 + at32_spi_setup_slaves(1, b, n, spi1_pins);
9567 + break;
9568 +
9569 + default:
9570 + return NULL;
9571 + }
9572 +
9573 + spi_register_board_info(b, n);
9574 + platform_device_register(pdev);
9575 + return pdev;
9576 +}
9577 +
9578 +/* --------------------------------------------------------------------
9579 + * TWI
9580 + * -------------------------------------------------------------------- */
9581 +static struct resource atmel_twi0_resource[] __initdata = {
9582 + PBMEM(0xffe00800),
9583 + IRQ(5),
9584 +};
9585 +static struct clk atmel_twi0_pclk = {
9586 + .name = "twi_pclk",
9587 + .parent = &pba_clk,
9588 + .mode = pba_clk_mode,
9589 + .get_rate = pba_clk_get_rate,
9590 + .index = 2,
9591 +};
9592 +
9593 +struct platform_device *__init at32_add_device_twi(unsigned int id,
9594 + struct i2c_board_info *b,
9595 + unsigned int n)
9596 +{
9597 + struct platform_device *pdev;
9598 +
9599 + if (id != 0)
9600 + return NULL;
9601 +
9602 + pdev = platform_device_alloc("atmel_twi", id);
9603 + if (!pdev)
9604 + return NULL;
9605 +
9606 + if (platform_device_add_resources(pdev, atmel_twi0_resource,
9607 + ARRAY_SIZE(atmel_twi0_resource)))
9608 + goto err_add_resources;
9609 +
9610 + select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
9611 + select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
9612 +
9613 + atmel_twi0_pclk.dev = &pdev->dev;
9614 +
9615 + if (b)
9616 + i2c_register_board_info(id, b, n);
9617 +
9618 + platform_device_add(pdev);
9619 + return pdev;
9620 +
9621 +err_add_resources:
9622 + platform_device_put(pdev);
9623 + return NULL;
9624 +}
9625 +
9626 +/* --------------------------------------------------------------------
9627 + * MMC
9628 + * -------------------------------------------------------------------- */
9629 +static struct resource atmel_mci0_resource[] __initdata = {
9630 + PBMEM(0xfff02400),
9631 + IRQ(28),
9632 +};
9633 +static struct clk atmel_mci0_pclk = {
9634 + .name = "mci_clk",
9635 + .parent = &pbb_clk,
9636 + .mode = pbb_clk_mode,
9637 + .get_rate = pbb_clk_get_rate,
9638 + .index = 9,
9639 +};
9640 +
9641 +struct platform_device *__init
9642 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
9643 +{
9644 + struct platform_device *pdev;
9645 +
9646 + if (id != 0)
9647 + return NULL;
9648 +
9649 + pdev = platform_device_alloc("atmel_mci", id);
9650 + if (!pdev)
9651 + goto fail;
9652 +
9653 + if (platform_device_add_resources(pdev, atmel_mci0_resource,
9654 + ARRAY_SIZE(atmel_mci0_resource)))
9655 + goto fail;
9656 +
9657 + if (data && platform_device_add_data(pdev, data,
9658 + sizeof(struct mci_platform_data)))
9659 + goto fail;
9660 +
9661 + select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
9662 + select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
9663 + select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
9664 + select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
9665 + select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
9666 + select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
9667 +
9668 + if (data) {
9669 + if (data->detect_pin != GPIO_PIN_NONE)
9670 + at32_select_gpio(data->detect_pin, 0);
9671 + if (data->wp_pin != GPIO_PIN_NONE)
9672 + at32_select_gpio(data->wp_pin, 0);
9673 + }
9674 +
9675 + atmel_mci0_pclk.dev = &pdev->dev;
9676 +
9677 + platform_device_add(pdev);
9678 + return pdev;
9679 +
9680 +fail:
9681 + platform_device_put(pdev);
9682 + return NULL;
9683 +}
9684 +
9685 +/* --------------------------------------------------------------------
9686 + * LCDC
9687 + * -------------------------------------------------------------------- */
9688 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
9689 +static struct atmel_lcdfb_info atmel_lcdfb0_data;
9690 +static struct resource atmel_lcdfb0_resource[] = {
9691 + {
9692 + .start = 0xff000000,
9693 + .end = 0xff000fff,
9694 + .flags = IORESOURCE_MEM,
9695 + },
9696 + IRQ(1),
9697 + {
9698 + /* Placeholder for pre-allocated fb memory */
9699 + .start = 0x00000000,
9700 + .end = 0x00000000,
9701 + .flags = 0,
9702 + },
9703 +};
9704 +DEFINE_DEV_DATA(atmel_lcdfb, 0);
9705 +DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
9706 +static struct clk atmel_lcdfb0_pixclk = {
9707 + .name = "lcdc_clk",
9708 + .dev = &atmel_lcdfb0_device.dev,
9709 + .mode = genclk_mode,
9710 + .get_rate = genclk_get_rate,
9711 + .set_rate = genclk_set_rate,
9712 + .set_parent = genclk_set_parent,
9713 + .index = 7,
9714 +};
9715 +
9716 +struct platform_device *__init
9717 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
9718 + unsigned long fbmem_start, unsigned long fbmem_len)
9719 +{
9720 + struct platform_device *pdev;
9721 + struct atmel_lcdfb_info *info;
9722 + struct fb_monspecs *monspecs;
9723 + struct fb_videomode *modedb;
9724 + unsigned int modedb_size;
9725 +
9726 + /*
9727 + * Do a deep copy of the fb data, monspecs and modedb. Make
9728 + * sure all allocations are done before setting up the
9729 + * portmux.
9730 + */
9731 + monspecs = kmemdup(data->default_monspecs,
9732 + sizeof(struct fb_monspecs), GFP_KERNEL);
9733 + if (!monspecs)
9734 + return NULL;
9735 +
9736 + modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
9737 + modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
9738 + if (!modedb)
9739 + goto err_dup_modedb;
9740 + monspecs->modedb = modedb;
9741 +
9742 + switch (id) {
9743 + case 0:
9744 + pdev = &atmel_lcdfb0_device;
9745 + select_peripheral(PC(19), PERIPH_A, 0); /* CC */
9746 + select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
9747 + select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
9748 + select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
9749 + select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
9750 + select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
9751 + select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
9752 + select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
9753 + select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
9754 + select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
9755 + select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
9756 + select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
9757 + select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
9758 + select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
9759 + select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
9760 + select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
9761 + select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
9762 + select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
9763 + select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
9764 + select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
9765 + select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
9766 + select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
9767 + select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
9768 + select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
9769 + select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
9770 + select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
9771 + select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
9772 + select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
9773 + select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
9774 + select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
9775 + select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
9776 +
9777 + clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
9778 + clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
9779 + break;
9780 +
9781 + default:
9782 + goto err_invalid_id;
9783 + }
9784 +
9785 + if (fbmem_len) {
9786 + pdev->resource[2].start = fbmem_start;
9787 + pdev->resource[2].end = fbmem_start + fbmem_len - 1;
9788 + pdev->resource[2].flags = IORESOURCE_MEM;
9789 + }
9790 +
9791 + info = pdev->dev.platform_data;
9792 + memcpy(info, data, sizeof(struct atmel_lcdfb_info));
9793 + info->default_monspecs = monspecs;
9794 +
9795 + platform_device_register(pdev);
9796 + return pdev;
9797 +
9798 +err_invalid_id:
9799 + kfree(modedb);
9800 +err_dup_modedb:
9801 + kfree(monspecs);
9802 + return NULL;
9803 +}
9804 +#endif
9805 +
9806 +/* --------------------------------------------------------------------
9807 + * PWM
9808 + * -------------------------------------------------------------------- */
9809 +static struct resource atmel_pwm0_resource[] __initdata = {
9810 + PBMEM(0xfff01400),
9811 + IRQ(24),
9812 +};
9813 +static struct clk atmel_pwm0_mck = {
9814 + .name = "mck",
9815 + .parent = &pbb_clk,
9816 + .mode = pbb_clk_mode,
9817 + .get_rate = pbb_clk_get_rate,
9818 + .index = 5,
9819 +};
9820 +
9821 +struct platform_device *__init at32_add_device_pwm(u32 mask)
9822 +{
9823 + struct platform_device *pdev;
9824 +
9825 + if (!mask)
9826 + return NULL;
9827 +
9828 + pdev = platform_device_alloc("atmel_pwm", 0);
9829 + if (!pdev)
9830 + return NULL;
9831 +
9832 + if (platform_device_add_resources(pdev, atmel_pwm0_resource,
9833 + ARRAY_SIZE(atmel_pwm0_resource)))
9834 + goto out_free_pdev;
9835 +
9836 + if (platform_device_add_data(pdev, &mask, sizeof(mask)))
9837 + goto out_free_pdev;
9838 +
9839 + if (mask & (1 << 0))
9840 + select_peripheral(PA(28), PERIPH_A, 0);
9841 + if (mask & (1 << 1))
9842 + select_peripheral(PA(29), PERIPH_A, 0);
9843 + if (mask & (1 << 2))
9844 + select_peripheral(PA(21), PERIPH_B, 0);
9845 + if (mask & (1 << 3))
9846 + select_peripheral(PA(22), PERIPH_B, 0);
9847 +
9848 + atmel_pwm0_mck.dev = &pdev->dev;
9849 +
9850 + platform_device_add(pdev);
9851 +
9852 + return pdev;
9853 +
9854 +out_free_pdev:
9855 + platform_device_put(pdev);
9856 + return NULL;
9857 +}
9858 +
9859 +/* --------------------------------------------------------------------
9860 + * SSC
9861 + * -------------------------------------------------------------------- */
9862 +static struct resource ssc0_resource[] = {
9863 + PBMEM(0xffe01c00),
9864 + IRQ(10),
9865 +};
9866 +DEFINE_DEV(ssc, 0);
9867 +DEV_CLK(pclk, ssc0, pba, 7);
9868 +
9869 +static struct resource ssc1_resource[] = {
9870 + PBMEM(0xffe02000),
9871 + IRQ(11),
9872 +};
9873 +DEFINE_DEV(ssc, 1);
9874 +DEV_CLK(pclk, ssc1, pba, 8);
9875 +
9876 +static struct resource ssc2_resource[] = {
9877 + PBMEM(0xffe02400),
9878 + IRQ(12),
9879 +};
9880 +DEFINE_DEV(ssc, 2);
9881 +DEV_CLK(pclk, ssc2, pba, 9);
9882 +
9883 +struct platform_device *__init
9884 +at32_add_device_ssc(unsigned int id, unsigned int flags)
9885 +{
9886 + struct platform_device *pdev;
9887 +
9888 + switch (id) {
9889 + case 0:
9890 + pdev = &ssc0_device;
9891 + if (flags & ATMEL_SSC_RF)
9892 + select_peripheral(PA(21), PERIPH_A, 0); /* RF */
9893 + if (flags & ATMEL_SSC_RK)
9894 + select_peripheral(PA(22), PERIPH_A, 0); /* RK */
9895 + if (flags & ATMEL_SSC_TK)
9896 + select_peripheral(PA(23), PERIPH_A, 0); /* TK */
9897 + if (flags & ATMEL_SSC_TF)
9898 + select_peripheral(PA(24), PERIPH_A, 0); /* TF */
9899 + if (flags & ATMEL_SSC_TD)
9900 + select_peripheral(PA(25), PERIPH_A, 0); /* TD */
9901 + if (flags & ATMEL_SSC_RD)
9902 + select_peripheral(PA(26), PERIPH_A, 0); /* RD */
9903 + break;
9904 + case 1:
9905 + pdev = &ssc1_device;
9906 + if (flags & ATMEL_SSC_RF)
9907 + select_peripheral(PA(0), PERIPH_B, 0); /* RF */
9908 + if (flags & ATMEL_SSC_RK)
9909 + select_peripheral(PA(1), PERIPH_B, 0); /* RK */
9910 + if (flags & ATMEL_SSC_TK)
9911 + select_peripheral(PA(2), PERIPH_B, 0); /* TK */
9912 + if (flags & ATMEL_SSC_TF)
9913 + select_peripheral(PA(3), PERIPH_B, 0); /* TF */
9914 + if (flags & ATMEL_SSC_TD)
9915 + select_peripheral(PA(4), PERIPH_B, 0); /* TD */
9916 + if (flags & ATMEL_SSC_RD)
9917 + select_peripheral(PA(5), PERIPH_B, 0); /* RD */
9918 + break;
9919 + case 2:
9920 + pdev = &ssc2_device;
9921 + if (flags & ATMEL_SSC_TD)
9922 + select_peripheral(PB(13), PERIPH_A, 0); /* TD */
9923 + if (flags & ATMEL_SSC_RD)
9924 + select_peripheral(PB(14), PERIPH_A, 0); /* RD */
9925 + if (flags & ATMEL_SSC_TK)
9926 + select_peripheral(PB(15), PERIPH_A, 0); /* TK */
9927 + if (flags & ATMEL_SSC_TF)
9928 + select_peripheral(PB(16), PERIPH_A, 0); /* TF */
9929 + if (flags & ATMEL_SSC_RF)
9930 + select_peripheral(PB(17), PERIPH_A, 0); /* RF */
9931 + if (flags & ATMEL_SSC_RK)
9932 + select_peripheral(PB(18), PERIPH_A, 0); /* RK */
9933 + break;
9934 + default:
9935 + return NULL;
9936 + }
9937 +
9938 + platform_device_register(pdev);
9939 + return pdev;
9940 +}
9941 +
9942 +/* --------------------------------------------------------------------
9943 + * USB Device Controller
9944 + * -------------------------------------------------------------------- */
9945 +static struct resource usba0_resource[] __initdata = {
9946 + {
9947 + .start = 0xff300000,
9948 + .end = 0xff3fffff,
9949 + .flags = IORESOURCE_MEM,
9950 + }, {
9951 + .start = 0xfff03000,
9952 + .end = 0xfff033ff,
9953 + .flags = IORESOURCE_MEM,
9954 + },
9955 + IRQ(31),
9956 +};
9957 +static struct clk usba0_pclk = {
9958 + .name = "pclk",
9959 + .parent = &pbb_clk,
9960 + .mode = pbb_clk_mode,
9961 + .get_rate = pbb_clk_get_rate,
9962 + .index = 12,
9963 +};
9964 +static struct clk usba0_hclk = {
9965 + .name = "hclk",
9966 + .parent = &hsb_clk,
9967 + .mode = hsb_clk_mode,
9968 + .get_rate = hsb_clk_get_rate,
9969 + .index = 6,
9970 +};
9971 +
9972 +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
9973 + [idx] = { \
9974 + .name = nam, \
9975 + .index = idx, \
9976 + .fifo_size = maxpkt, \
9977 + .nr_banks = maxbk, \
9978 + .can_dma = dma, \
9979 + .can_isoc = isoc, \
9980 + }
9981 +
9982 +static struct usba_ep_data at32_usba_ep[] __initdata = {
9983 + EP("ep0", 0, 64, 1, 0, 0),
9984 + EP("ep1", 1, 512, 2, 1, 1),
9985 + EP("ep2", 2, 512, 2, 1, 1),
9986 + EP("ep3-int", 3, 64, 3, 1, 0),
9987 + EP("ep4-int", 4, 64, 3, 1, 0),
9988 + EP("ep5", 5, 1024, 3, 1, 1),
9989 + EP("ep6", 6, 1024, 3, 1, 1),
9990 +};
9991 +
9992 +#undef EP
9993 +
9994 +struct platform_device *__init
9995 +at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
9996 +{
9997 + /*
9998 + * pdata doesn't have room for any endpoints, so we need to
9999 + * append room for the ones we need right after it.
10000 + */
10001 + struct {
10002 + struct usba_platform_data pdata;
10003 + struct usba_ep_data ep[7];
10004 + } usba_data;
10005 + struct platform_device *pdev;
10006 +
10007 + if (id != 0)
10008 + return NULL;
10009 +
10010 + pdev = platform_device_alloc("atmel_usba_udc", 0);
10011 + if (!pdev)
10012 + return NULL;
10013 +
10014 + if (platform_device_add_resources(pdev, usba0_resource,
10015 + ARRAY_SIZE(usba0_resource)))
10016 + goto out_free_pdev;
10017 +
10018 + if (data)
10019 + usba_data.pdata.vbus_pin = data->vbus_pin;
10020 + else
10021 + usba_data.pdata.vbus_pin = -EINVAL;
10022 +
10023 + data = &usba_data.pdata;
10024 + data->num_ep = ARRAY_SIZE(at32_usba_ep);
10025 + memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep));
10026 +
10027 + if (platform_device_add_data(pdev, data, sizeof(usba_data)))
10028 + goto out_free_pdev;
10029 +
10030 + if (data->vbus_pin >= 0)
10031 + at32_select_gpio(data->vbus_pin, 0);
10032 +
10033 + usba0_pclk.dev = &pdev->dev;
10034 + usba0_hclk.dev = &pdev->dev;
10035 +
10036 + platform_device_add(pdev);
10037 +
10038 + return pdev;
10039 +
10040 +out_free_pdev:
10041 + platform_device_put(pdev);
10042 + return NULL;
10043 +}
10044 +
10045 +/* --------------------------------------------------------------------
10046 + * IDE / CompactFlash
10047 + * -------------------------------------------------------------------- */
10048 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
10049 +static struct resource at32_smc_cs4_resource[] __initdata = {
10050 + {
10051 + .start = 0x04000000,
10052 + .end = 0x07ffffff,
10053 + .flags = IORESOURCE_MEM,
10054 + },
10055 + IRQ(~0UL), /* Magic IRQ will be overridden */
10056 +};
10057 +static struct resource at32_smc_cs5_resource[] __initdata = {
10058 + {
10059 + .start = 0x20000000,
10060 + .end = 0x23ffffff,
10061 + .flags = IORESOURCE_MEM,
10062 + },
10063 + IRQ(~0UL), /* Magic IRQ will be overridden */
10064 +};
10065 +
10066 +static int __init at32_init_ide_or_cf(struct platform_device *pdev,
10067 + unsigned int cs, unsigned int extint)
10068 +{
10069 + static unsigned int extint_pin_map[4] __initdata = {
10070 + GPIO_PIN_PB(25),
10071 + GPIO_PIN_PB(26),
10072 + GPIO_PIN_PB(27),
10073 + GPIO_PIN_PB(28),
10074 + };
10075 + static bool common_pins_initialized __initdata = false;
10076 + unsigned int extint_pin;
10077 + int ret;
10078 +
10079 + if (extint >= ARRAY_SIZE(extint_pin_map))
10080 + return -EINVAL;
10081 + extint_pin = extint_pin_map[extint];
10082 +
10083 + switch (cs) {
10084 + case 4:
10085 + ret = platform_device_add_resources(pdev,
10086 + at32_smc_cs4_resource,
10087 + ARRAY_SIZE(at32_smc_cs4_resource));
10088 + if (ret)
10089 + return ret;
10090 +
10091 + select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
10092 + set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
10093 + break;
10094 + case 5:
10095 + ret = platform_device_add_resources(pdev,
10096 + at32_smc_cs5_resource,
10097 + ARRAY_SIZE(at32_smc_cs5_resource));
10098 + if (ret)
10099 + return ret;
10100 +
10101 + select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
10102 + set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
10103 + break;
10104 + default:
10105 + return -EINVAL;
10106 + }
10107 +
10108 + if (!common_pins_initialized) {
10109 + select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
10110 + select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
10111 + select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
10112 + select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
10113 + common_pins_initialized = true;
10114 + }
10115 +
10116 + at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
10117 +
10118 + pdev->resource[1].start = EIM_IRQ_BASE + extint;
10119 + pdev->resource[1].end = pdev->resource[1].start;
10120 +
10121 + return 0;
10122 +}
10123 +
10124 +struct platform_device *__init
10125 +at32_add_device_ide(unsigned int id, unsigned int extint,
10126 + struct ide_platform_data *data)
10127 +{
10128 + struct platform_device *pdev;
10129 +
10130 + pdev = platform_device_alloc("at32_ide", id);
10131 + if (!pdev)
10132 + goto fail;
10133 +
10134 + if (platform_device_add_data(pdev, data,
10135 + sizeof(struct ide_platform_data)))
10136 + goto fail;
10137 +
10138 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10139 + goto fail;
10140 +
10141 + platform_device_add(pdev);
10142 + return pdev;
10143 +
10144 +fail:
10145 + platform_device_put(pdev);
10146 + return NULL;
10147 +}
10148 +
10149 +struct platform_device *__init
10150 +at32_add_device_cf(unsigned int id, unsigned int extint,
10151 + struct cf_platform_data *data)
10152 +{
10153 + struct platform_device *pdev;
10154 +
10155 + pdev = platform_device_alloc("at32_cf", id);
10156 + if (!pdev)
10157 + goto fail;
10158 +
10159 + if (platform_device_add_data(pdev, data,
10160 + sizeof(struct cf_platform_data)))
10161 + goto fail;
10162 +
10163 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10164 + goto fail;
10165 +
10166 + if (data->detect_pin != GPIO_PIN_NONE)
10167 + at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
10168 + if (data->reset_pin != GPIO_PIN_NONE)
10169 + at32_select_gpio(data->reset_pin, 0);
10170 + if (data->vcc_pin != GPIO_PIN_NONE)
10171 + at32_select_gpio(data->vcc_pin, 0);
10172 + /* READY is used as extint, so we can't select it as gpio */
10173 +
10174 + platform_device_add(pdev);
10175 + return pdev;
10176 +
10177 +fail:
10178 + platform_device_put(pdev);
10179 + return NULL;
10180 +}
10181 +#endif
10182 +
10183 +/* --------------------------------------------------------------------
10184 + * AC97C
10185 + * -------------------------------------------------------------------- */
10186 +static struct resource atmel_ac97c0_resource[] __initdata = {
10187 + PBMEM(0xfff02800),
10188 + IRQ(29),
10189 +};
10190 +static struct clk atmel_ac97c0_pclk = {
10191 + .name = "pclk",
10192 + .parent = &pbb_clk,
10193 + .mode = pbb_clk_mode,
10194 + .get_rate = pbb_clk_get_rate,
10195 + .index = 10,
10196 +};
10197 +
10198 +struct platform_device *__init at32_add_device_ac97c(unsigned int id)
10199 +{
10200 + struct platform_device *pdev;
10201 +
10202 + if (id != 0)
10203 + return NULL;
10204 +
10205 + pdev = platform_device_alloc("atmel_ac97c", id);
10206 + if (!pdev)
10207 + return NULL;
10208 +
10209 + if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
10210 + ARRAY_SIZE(atmel_ac97c0_resource)))
10211 + goto err_add_resources;
10212 +
10213 + select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
10214 + select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
10215 + select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
10216 + select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
10217 +
10218 + atmel_ac97c0_pclk.dev = &pdev->dev;
10219 +
10220 + platform_device_add(pdev);
10221 + return pdev;
10222 +
10223 +err_add_resources:
10224 + platform_device_put(pdev);
10225 + return NULL;
10226 +}
10227 +
10228 +/* --------------------------------------------------------------------
10229 + * ABDAC
10230 + * -------------------------------------------------------------------- */
10231 +static struct resource abdac0_resource[] __initdata = {
10232 + PBMEM(0xfff02000),
10233 + IRQ(27),
10234 +};
10235 +static struct clk abdac0_pclk = {
10236 + .name = "pclk",
10237 + .parent = &pbb_clk,
10238 + .mode = pbb_clk_mode,
10239 + .get_rate = pbb_clk_get_rate,
10240 + .index = 8,
10241 +};
10242 +static struct clk abdac0_sample_clk = {
10243 + .name = "sample_clk",
10244 + .mode = genclk_mode,
10245 + .get_rate = genclk_get_rate,
10246 + .set_rate = genclk_set_rate,
10247 + .set_parent = genclk_set_parent,
10248 + .index = 6,
10249 +};
10250 +
10251 +struct platform_device *__init at32_add_device_abdac(unsigned int id)
10252 +{
10253 + struct platform_device *pdev;
10254 +
10255 + if (id != 0)
10256 + return NULL;
10257 +
10258 + pdev = platform_device_alloc("abdac", id);
10259 + if (!pdev)
10260 + return NULL;
10261 +
10262 + if (platform_device_add_resources(pdev, abdac0_resource,
10263 + ARRAY_SIZE(abdac0_resource)))
10264 + goto err_add_resources;
10265 +
10266 + select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
10267 + select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
10268 + select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
10269 + select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
10270 +
10271 + abdac0_pclk.dev = &pdev->dev;
10272 + abdac0_sample_clk.dev = &pdev->dev;
10273 +
10274 + platform_device_add(pdev);
10275 + return pdev;
10276 +
10277 +err_add_resources:
10278 + platform_device_put(pdev);
10279 + return NULL;
10280 +}
10281 +
10282 +/* --------------------------------------------------------------------
10283 + * GCLK
10284 + * -------------------------------------------------------------------- */
10285 +static struct clk gclk0 = {
10286 + .name = "gclk0",
10287 + .mode = genclk_mode,
10288 + .get_rate = genclk_get_rate,
10289 + .set_rate = genclk_set_rate,
10290 + .set_parent = genclk_set_parent,
10291 + .index = 0,
10292 +};
10293 +static struct clk gclk1 = {
10294 + .name = "gclk1",
10295 + .mode = genclk_mode,
10296 + .get_rate = genclk_get_rate,
10297 + .set_rate = genclk_set_rate,
10298 + .set_parent = genclk_set_parent,
10299 + .index = 1,
10300 +};
10301 +static struct clk gclk2 = {
10302 + .name = "gclk2",
10303 + .mode = genclk_mode,
10304 + .get_rate = genclk_get_rate,
10305 + .set_rate = genclk_set_rate,
10306 + .set_parent = genclk_set_parent,
10307 + .index = 2,
10308 +};
10309 +static struct clk gclk3 = {
10310 + .name = "gclk3",
10311 + .mode = genclk_mode,
10312 + .get_rate = genclk_get_rate,
10313 + .set_rate = genclk_set_rate,
10314 + .set_parent = genclk_set_parent,
10315 + .index = 3,
10316 +};
10317 +static struct clk gclk4 = {
10318 + .name = "gclk4",
10319 + .mode = genclk_mode,
10320 + .get_rate = genclk_get_rate,
10321 + .set_rate = genclk_set_rate,
10322 + .set_parent = genclk_set_parent,
10323 + .index = 4,
10324 +};
10325 +
10326 +struct clk *at32_clock_list[] = {
10327 + &osc32k,
10328 + &osc0,
10329 + &osc1,
10330 + &pll0,
10331 + &pll1,
10332 + &cpu_clk,
10333 + &hsb_clk,
10334 + &pba_clk,
10335 + &pbb_clk,
10336 + &at32_pm_pclk,
10337 + &at32_intc0_pclk,
10338 + &hmatrix_clk,
10339 + &ebi_clk,
10340 + &hramc_clk,
10341 + &smc0_pclk,
10342 + &smc0_mck,
10343 + &pdc_hclk,
10344 + &pdc_pclk,
10345 + &dmaca0_hclk,
10346 + &pico_clk,
10347 + &pio0_mck,
10348 + &pio1_mck,
10349 + &pio2_mck,
10350 + &pio3_mck,
10351 + &pio4_mck,
10352 + &at32_tcb0_t0_clk,
10353 + &at32_tcb1_t0_clk,
10354 + &atmel_psif0_pclk,
10355 + &atmel_psif1_pclk,
10356 + &atmel_usart0_usart,
10357 + &atmel_usart1_usart,
10358 + &atmel_usart2_usart,
10359 + &atmel_usart3_usart,
10360 + &atmel_pwm0_mck,
10361 +#if defined(CONFIG_CPU_AT32AP7000)
10362 + &macb0_hclk,
10363 + &macb0_pclk,
10364 + &macb1_hclk,
10365 + &macb1_pclk,
10366 +#endif
10367 + &atmel_spi0_spi_clk,
10368 + &atmel_spi1_spi_clk,
10369 + &atmel_twi0_pclk,
10370 + &atmel_mci0_pclk,
10371 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10372 + &atmel_lcdfb0_hck1,
10373 + &atmel_lcdfb0_pixclk,
10374 +#endif
10375 + &ssc0_pclk,
10376 + &ssc1_pclk,
10377 + &ssc2_pclk,
10378 + &usba0_hclk,
10379 + &usba0_pclk,
10380 + &atmel_ac97c0_pclk,
10381 + &abdac0_pclk,
10382 + &abdac0_sample_clk,
10383 + &gclk0,
10384 + &gclk1,
10385 + &gclk2,
10386 + &gclk3,
10387 + &gclk4,
10388 +};
10389 +unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
10390 +
10391 +void __init at32_portmux_init(void)
10392 +{
10393 + at32_init_pio(&pio0_device);
10394 + at32_init_pio(&pio1_device);
10395 + at32_init_pio(&pio2_device);
10396 + at32_init_pio(&pio3_device);
10397 + at32_init_pio(&pio4_device);
10398 +}
10399 +
10400 +void __init at32_clock_init(void)
10401 +{
10402 + u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
10403 + int i;
10404 +
10405 + if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
10406 + main_clock = &pll0;
10407 + cpu_clk.parent = &pll0;
10408 + } else {
10409 + main_clock = &osc0;
10410 + cpu_clk.parent = &osc0;
10411 + }
10412 +
10413 + if (pm_readl(PLL0) & PM_BIT(PLLOSC))
10414 + pll0.parent = &osc1;
10415 + if (pm_readl(PLL1) & PM_BIT(PLLOSC))
10416 + pll1.parent = &osc1;
10417 +
10418 + genclk_init_parent(&gclk0);
10419 + genclk_init_parent(&gclk1);
10420 + genclk_init_parent(&gclk2);
10421 + genclk_init_parent(&gclk3);
10422 + genclk_init_parent(&gclk4);
10423 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10424 + genclk_init_parent(&atmel_lcdfb0_pixclk);
10425 +#endif
10426 + genclk_init_parent(&abdac0_sample_clk);
10427 +
10428 + /*
10429 + * Turn on all clocks that have at least one user already, and
10430 + * turn off everything else. We only do this for module
10431 + * clocks, and even though it isn't particularly pretty to
10432 + * check the address of the mode function, it should do the
10433 + * trick...
10434 + */
10435 + for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
10436 + struct clk *clk = at32_clock_list[i];
10437 +
10438 + if (clk->users == 0)
10439 + continue;
10440 +
10441 + if (clk->mode == &cpu_clk_mode)
10442 + cpu_mask |= 1 << clk->index;
10443 + else if (clk->mode == &hsb_clk_mode)
10444 + hsb_mask |= 1 << clk->index;
10445 + else if (clk->mode == &pba_clk_mode)
10446 + pba_mask |= 1 << clk->index;
10447 + else if (clk->mode == &pbb_clk_mode)
10448 + pbb_mask |= 1 << clk->index;
10449 + }
10450 +
10451 + pm_writel(CPU_MASK, cpu_mask);
10452 + pm_writel(HSB_MASK, hsb_mask);
10453 + pm_writel(PBA_MASK, pba_mask);
10454 + pm_writel(PBB_MASK, pbb_mask);
10455 +}
10456 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/extint.c avr32-2.6/arch/avr32/mach-at32ap/extint.c
10457 --- linux-2.6.24.3/arch/avr32/mach-at32ap/extint.c 2008-02-26 01:20:20.000000000 +0100
10458 +++ avr32-2.6/arch/avr32/mach-at32ap/extint.c 2008-04-23 19:33:29.000000000 +0200
10459 @@ -26,16 +26,10 @@
10460 #define EIC_MODE 0x0014
10461 #define EIC_EDGE 0x0018
10462 #define EIC_LEVEL 0x001c
10463 -#define EIC_TEST 0x0020
10464 #define EIC_NMIC 0x0024
10465
10466 -/* Bitfields in TEST */
10467 -#define EIC_TESTEN_OFFSET 31
10468 -#define EIC_TESTEN_SIZE 1
10469 -
10470 /* Bitfields in NMIC */
10471 -#define EIC_EN_OFFSET 0
10472 -#define EIC_EN_SIZE 1
10473 +#define EIC_NMIC_ENABLE (1 << 0)
10474
10475 /* Bit manipulation macros */
10476 #define EIC_BIT(name) \
10477 @@ -63,6 +57,9 @@
10478 unsigned int first_irq;
10479 };
10480
10481 +static struct eic *nmi_eic;
10482 +static bool nmi_enabled;
10483 +
10484 static void eic_ack_irq(unsigned int irq)
10485 {
10486 struct eic *eic = get_irq_chip_data(irq);
10487 @@ -133,8 +130,11 @@
10488 eic_writel(eic, EDGE, edge);
10489 eic_writel(eic, LEVEL, level);
10490
10491 - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
10492 + if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
10493 flow_type |= IRQ_LEVEL;
10494 + __set_irq_handler_unlocked(irq, handle_level_irq);
10495 + } else
10496 + __set_irq_handler_unlocked(irq, handle_edge_irq);
10497 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
10498 desc->status |= flow_type;
10499 }
10500 @@ -154,9 +154,8 @@
10501 static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
10502 {
10503 struct eic *eic = desc->handler_data;
10504 - struct irq_desc *ext_desc;
10505 unsigned long status, pending;
10506 - unsigned int i, ext_irq;
10507 + unsigned int i;
10508
10509 status = eic_readl(eic, ISR);
10510 pending = status & eic_readl(eic, IMR);
10511 @@ -165,15 +164,28 @@
10512 i = fls(pending) - 1;
10513 pending &= ~(1 << i);
10514
10515 - ext_irq = i + eic->first_irq;
10516 - ext_desc = irq_desc + ext_irq;
10517 - if (ext_desc->status & IRQ_LEVEL)
10518 - handle_level_irq(ext_irq, ext_desc);
10519 - else
10520 - handle_edge_irq(ext_irq, ext_desc);
10521 + generic_handle_irq(i + eic->first_irq);
10522 }
10523 }
10524
10525 +int nmi_enable(void)
10526 +{
10527 + nmi_enabled = true;
10528 +
10529 + if (nmi_eic)
10530 + eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
10531 +
10532 + return 0;
10533 +}
10534 +
10535 +void nmi_disable(void)
10536 +{
10537 + if (nmi_eic)
10538 + eic_writel(nmi_eic, NMIC, 0);
10539 +
10540 + nmi_enabled = false;
10541 +}
10542 +
10543 static int __init eic_probe(struct platform_device *pdev)
10544 {
10545 struct eic *eic;
10546 @@ -214,14 +226,13 @@
10547 pattern = eic_readl(eic, MODE);
10548 nr_irqs = fls(pattern);
10549
10550 - /* Trigger on falling edge unless overridden by driver */
10551 - eic_writel(eic, MODE, 0UL);
10552 + /* Trigger on low level unless overridden by driver */
10553 eic_writel(eic, EDGE, 0UL);
10554 + eic_writel(eic, LEVEL, 0UL);
10555
10556 eic->chip = &eic_chip;
10557
10558 for (i = 0; i < nr_irqs; i++) {
10559 - /* NOTE the handler we set here is ignored by the demux */
10560 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
10561 handle_level_irq);
10562 set_irq_chip_data(eic->first_irq + i, eic);
10563 @@ -230,6 +241,16 @@
10564 set_irq_chained_handler(int_irq, demux_eic_irq);
10565 set_irq_data(int_irq, eic);
10566
10567 + if (pdev->id == 0) {
10568 + nmi_eic = eic;
10569 + if (nmi_enabled)
10570 + /*
10571 + * Someone tried to enable NMI before we were
10572 + * ready. Do it now.
10573 + */
10574 + nmi_enable();
10575 + }
10576 +
10577 dev_info(&pdev->dev,
10578 "External Interrupt Controller at 0x%p, IRQ %u\n",
10579 eic->regs, int_irq);
10580 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/gpio-dev.c avr32-2.6/arch/avr32/mach-at32ap/gpio-dev.c
10581 --- linux-2.6.24.3/arch/avr32/mach-at32ap/gpio-dev.c 1970-01-01 01:00:00.000000000 +0100
10582 +++ avr32-2.6/arch/avr32/mach-at32ap/gpio-dev.c 2008-04-23 19:33:29.000000000 +0200
10583 @@ -0,0 +1,573 @@
10584 +/*
10585 + * GPIO /dev and configfs interface
10586 + *
10587 + * Copyright (C) 2006-2007 Atmel Corporation
10588 + *
10589 + * This program is free software; you can redistribute it and/or modify
10590 + * it under the terms of the GNU General Public License version 2 as
10591 + * published by the Free Software Foundation.
10592 + */
10593 +#include <linux/kernel.h>
10594 +#include <linux/configfs.h>
10595 +#include <linux/cdev.h>
10596 +#include <linux/device.h>
10597 +#include <linux/fs.h>
10598 +#include <linux/interrupt.h>
10599 +#include <linux/module.h>
10600 +#include <linux/poll.h>
10601 +#include <linux/uaccess.h>
10602 +#include <linux/wait.h>
10603 +
10604 +#include <asm/gpio.h>
10605 +#include <asm/arch/portmux.h>
10606 +
10607 +#define GPIO_DEV_MAX 8
10608 +
10609 +static struct class *gpio_dev_class;
10610 +static dev_t gpio_devt;
10611 +
10612 +struct gpio_item {
10613 + spinlock_t lock;
10614 +
10615 + int enabled;
10616 + int initialized;
10617 + int port;
10618 + u32 pin_mask;
10619 + u32 oe_mask;
10620 +
10621 + /* Pin state last time we read it (for blocking reads) */
10622 + u32 pin_state;
10623 + int changed;
10624 +
10625 + wait_queue_head_t change_wq;
10626 + struct fasync_struct *async_queue;
10627 +
10628 + int id;
10629 + struct class_device *gpio_dev;
10630 + struct cdev char_dev;
10631 + struct config_item item;
10632 +};
10633 +
10634 +struct gpio_attribute {
10635 + struct configfs_attribute attr;
10636 + ssize_t (*show)(struct gpio_item *, char *);
10637 + ssize_t (*store)(struct gpio_item *, const char *, size_t);
10638 +};
10639 +
10640 +static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
10641 +{
10642 + struct gpio_item *gpio = dev_id;
10643 + u32 old_state, new_state;
10644 +
10645 + old_state = gpio->pin_state;
10646 + new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10647 + gpio->pin_state = new_state;
10648 +
10649 + if (new_state != old_state) {
10650 + gpio->changed = 1;
10651 + wake_up_interruptible(&gpio->change_wq);
10652 +
10653 + if (gpio->async_queue)
10654 + kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
10655 + }
10656 +
10657 + return IRQ_HANDLED;
10658 +}
10659 +
10660 +static int gpio_dev_open(struct inode *inode, struct file *file)
10661 +{
10662 + struct gpio_item *gpio = container_of(inode->i_cdev,
10663 + struct gpio_item,
10664 + char_dev);
10665 + unsigned int irq;
10666 + unsigned int i;
10667 + int ret;
10668 +
10669 + nonseekable_open(inode, file);
10670 + config_item_get(&gpio->item);
10671 + file->private_data = gpio;
10672 +
10673 + gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
10674 + gpio->pin_mask);
10675 + gpio->changed = 1;
10676 +
10677 + for (i = 0; i < 32; i++) {
10678 + if (gpio->pin_mask & (1 << i)) {
10679 + irq = gpio_to_irq(32 * gpio->port + i);
10680 + ret = request_irq(irq, gpio_dev_interrupt, 0,
10681 + "gpio-dev", gpio);
10682 + if (ret)
10683 + goto err_irq;
10684 + }
10685 + }
10686 +
10687 + return 0;
10688 +
10689 +err_irq:
10690 + while (i--) {
10691 + if (gpio->pin_mask & (1 << i)) {
10692 + irq = gpio_to_irq(32 * gpio->port + i);
10693 + free_irq(irq, gpio);
10694 + }
10695 + }
10696 +
10697 + config_item_put(&gpio->item);
10698 +
10699 + return ret;
10700 +}
10701 +
10702 +static int gpio_dev_fasync(int fd, struct file *file, int mode)
10703 +{
10704 + struct gpio_item *gpio = file->private_data;
10705 +
10706 + return fasync_helper(fd, file, mode, &gpio->async_queue);
10707 +}
10708 +
10709 +static int gpio_dev_release(struct inode *inode, struct file *file)
10710 +{
10711 + struct gpio_item *gpio = file->private_data;
10712 + unsigned int irq;
10713 + unsigned int i;
10714 +
10715 + gpio_dev_fasync(-1, file, 0);
10716 +
10717 + for (i = 0; i < 32; i++) {
10718 + if (gpio->pin_mask & (1 << i)) {
10719 + irq = gpio_to_irq(32 * gpio->port + i);
10720 + free_irq(irq, gpio);
10721 + }
10722 + }
10723 +
10724 + config_item_put(&gpio->item);
10725 +
10726 + return 0;
10727 +}
10728 +
10729 +static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
10730 +{
10731 + struct gpio_item *gpio = file->private_data;
10732 + unsigned int mask = 0;
10733 +
10734 + poll_wait(file, &gpio->change_wq, wait);
10735 + if (gpio->changed)
10736 + mask |= POLLIN | POLLRDNORM;
10737 +
10738 + return mask;
10739 +}
10740 +
10741 +static ssize_t gpio_dev_read(struct file *file, char __user *buf,
10742 + size_t count, loff_t *offset)
10743 +{
10744 + struct gpio_item *gpio = file->private_data;
10745 + u32 value;
10746 +
10747 + spin_lock_irq(&gpio->lock);
10748 + while (!gpio->changed) {
10749 + spin_unlock_irq(&gpio->lock);
10750 +
10751 + if (file->f_flags & O_NONBLOCK)
10752 + return -EAGAIN;
10753 +
10754 + if (wait_event_interruptible(gpio->change_wq, gpio->changed))
10755 + return -ERESTARTSYS;
10756 +
10757 + spin_lock_irq(&gpio->lock);
10758 + }
10759 +
10760 + gpio->changed = 0;
10761 + value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10762 +
10763 + spin_unlock_irq(&gpio->lock);
10764 +
10765 + count = min(count, (size_t)4);
10766 + if (copy_to_user(buf, &value, count))
10767 + return -EFAULT;
10768 +
10769 + return count;
10770 +}
10771 +
10772 +static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
10773 + size_t count, loff_t *offset)
10774 +{
10775 + struct gpio_item *gpio = file->private_data;
10776 + u32 value = 0;
10777 + u32 mask = ~0UL;
10778 +
10779 + count = min(count, (size_t)4);
10780 + if (copy_from_user(&value, buf, count))
10781 + return -EFAULT;
10782 +
10783 + /* Assuming big endian */
10784 + mask <<= (4 - count) * 8;
10785 + mask &= gpio->pin_mask;
10786 +
10787 + at32_gpio_set_value_multiple(gpio->port, value, mask);
10788 +
10789 + return count;
10790 +}
10791 +
10792 +static struct file_operations gpio_dev_fops = {
10793 + .owner = THIS_MODULE,
10794 + .llseek = no_llseek,
10795 + .open = gpio_dev_open,
10796 + .release = gpio_dev_release,
10797 + .fasync = gpio_dev_fasync,
10798 + .poll = gpio_dev_poll,
10799 + .read = gpio_dev_read,
10800 + .write = gpio_dev_write,
10801 +};
10802 +
10803 +static struct gpio_item *to_gpio_item(struct config_item *item)
10804 +{
10805 + return item ? container_of(item, struct gpio_item, item) : NULL;
10806 +}
10807 +
10808 +static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
10809 +{
10810 + return sprintf(page, "%d\n", gpio->port);
10811 +}
10812 +
10813 +static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
10814 + const char *page, size_t count)
10815 +{
10816 + unsigned long id;
10817 + char *p = (char *)page;
10818 + ssize_t ret = -EINVAL;
10819 +
10820 + id = simple_strtoul(p, &p, 0);
10821 + if (!p || (*p && (*p != '\n')))
10822 + return -EINVAL;
10823 +
10824 + /* Switching PIO is not allowed when live... */
10825 + spin_lock(&gpio->lock);
10826 + if (!gpio->enabled) {
10827 + ret = -ENXIO;
10828 + if (at32_gpio_port_is_valid(id)) {
10829 + gpio->port = id;
10830 + ret = count;
10831 + }
10832 + }
10833 + spin_unlock(&gpio->lock);
10834 +
10835 + return ret;
10836 +}
10837 +
10838 +static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
10839 +{
10840 + return sprintf(page, "0x%08x\n", gpio->pin_mask);
10841 +}
10842 +
10843 +static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
10844 + const char *page, size_t count)
10845 +{
10846 + u32 new_mask;
10847 + char *p = (char *)page;
10848 + ssize_t ret = -EINVAL;
10849 +
10850 + new_mask = simple_strtoul(p, &p, 0);
10851 + if (!p || (*p && (*p != '\n')))
10852 + return -EINVAL;
10853 +
10854 + /* Can't update the pin mask while live. */
10855 + spin_lock(&gpio->lock);
10856 + if (!gpio->enabled) {
10857 + gpio->oe_mask &= new_mask;
10858 + gpio->pin_mask = new_mask;
10859 + ret = count;
10860 + }
10861 + spin_unlock(&gpio->lock);
10862 +
10863 + return ret;
10864 +}
10865 +
10866 +static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
10867 +{
10868 + return sprintf(page, "0x%08x\n", gpio->oe_mask);
10869 +}
10870 +
10871 +static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
10872 + const char *page, size_t count)
10873 +{
10874 + u32 mask;
10875 + char *p = (char *)page;
10876 + ssize_t ret = -EINVAL;
10877 +
10878 + mask = simple_strtoul(p, &p, 0);
10879 + if (!p || (*p && (*p != '\n')))
10880 + return -EINVAL;
10881 +
10882 + spin_lock(&gpio->lock);
10883 + if (!gpio->enabled) {
10884 + gpio->oe_mask = mask & gpio->pin_mask;
10885 + ret = count;
10886 + }
10887 + spin_unlock(&gpio->lock);
10888 +
10889 + return ret;
10890 +}
10891 +
10892 +static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
10893 +{
10894 + return sprintf(page, "%d\n", gpio->enabled);
10895 +}
10896 +
10897 +static ssize_t gpio_store_enabled(struct gpio_item *gpio,
10898 + const char *page, size_t count)
10899 +{
10900 + char *p = (char *)page;
10901 + int enabled;
10902 + int ret;
10903 +
10904 + enabled = simple_strtoul(p, &p, 0);
10905 + if (!p || (*p && (*p != '\n')))
10906 + return -EINVAL;
10907 +
10908 + /* make it a boolean value */
10909 + enabled = !!enabled;
10910 +
10911 + if (gpio->enabled == enabled)
10912 + /* No change; do nothing. */
10913 + return count;
10914 +
10915 + BUG_ON(gpio->id >= GPIO_DEV_MAX);
10916 +
10917 + if (!enabled) {
10918 + class_device_unregister(gpio->gpio_dev);
10919 + cdev_del(&gpio->char_dev);
10920 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10921 + gpio->initialized = 0;
10922 + } else {
10923 + if (gpio->port < 0 || !gpio->pin_mask)
10924 + return -ENODEV;
10925 + }
10926 +
10927 + /* Disallow any updates to gpio_id or pin_mask */
10928 + spin_lock(&gpio->lock);
10929 + gpio->enabled = enabled;
10930 + spin_unlock(&gpio->lock);
10931 +
10932 + if (!enabled)
10933 + return count;
10934 +
10935 + /* Now, try to allocate the pins */
10936 + ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
10937 + if (ret)
10938 + goto err_alloc_pins;
10939 +
10940 + gpio->initialized = 1;
10941 +
10942 + cdev_init(&gpio->char_dev, &gpio_dev_fops);
10943 + gpio->char_dev.owner = THIS_MODULE;
10944 + ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
10945 + if (ret < 0)
10946 + goto err_cdev_add;
10947 + gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
10948 + MKDEV(MAJOR(gpio_devt), gpio->id),
10949 + NULL,
10950 + "gpio%d", gpio->id);
10951 + if (IS_ERR(gpio->gpio_dev)) {
10952 + printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
10953 + ret = PTR_ERR(gpio->gpio_dev);
10954 + goto err_class_dev;
10955 + }
10956 +
10957 + printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
10958 + gpio->id, gpio->port, gpio->pin_mask,
10959 + MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
10960 +
10961 + return 0;
10962 +
10963 +err_class_dev:
10964 + cdev_del(&gpio->char_dev);
10965 +err_cdev_add:
10966 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10967 + gpio->initialized = 0;
10968 +err_alloc_pins:
10969 + spin_lock(&gpio->lock);
10970 + gpio->enabled = 0;
10971 + spin_unlock(&gpio->lock);
10972 +
10973 + return ret;
10974 +}
10975 +
10976 +static struct gpio_attribute gpio_item_attr_gpio_id = {
10977 + .attr = {
10978 + .ca_owner = THIS_MODULE,
10979 + .ca_name = "gpio_id",
10980 + .ca_mode = S_IRUGO | S_IWUSR,
10981 + },
10982 + .show = gpio_show_gpio_id,
10983 + .store = gpio_store_gpio_id,
10984 +};
10985 +static struct gpio_attribute gpio_item_attr_pin_mask = {
10986 + .attr = {
10987 + .ca_owner = THIS_MODULE,
10988 + .ca_name = "pin_mask",
10989 + .ca_mode = S_IRUGO | S_IWUSR,
10990 + },
10991 + .show = gpio_show_pin_mask,
10992 + .store = gpio_store_pin_mask,
10993 +};
10994 +static struct gpio_attribute gpio_item_attr_oe_mask = {
10995 + .attr = {
10996 + .ca_owner = THIS_MODULE,
10997 + .ca_name = "oe_mask",
10998 + .ca_mode = S_IRUGO | S_IWUSR,
10999 + },
11000 + .show = gpio_show_oe_mask,
11001 + .store = gpio_store_oe_mask,
11002 +};
11003 +static struct gpio_attribute gpio_item_attr_enabled = {
11004 + .attr = {
11005 + .ca_owner = THIS_MODULE,
11006 + .ca_name = "enabled",
11007 + .ca_mode = S_IRUGO | S_IWUSR,
11008 + },
11009 + .show = gpio_show_enabled,
11010 + .store = gpio_store_enabled,
11011 +};
11012 +
11013 +static struct configfs_attribute *gpio_item_attrs[] = {
11014 + &gpio_item_attr_gpio_id.attr,
11015 + &gpio_item_attr_pin_mask.attr,
11016 + &gpio_item_attr_oe_mask.attr,
11017 + &gpio_item_attr_enabled.attr,
11018 + NULL,
11019 +};
11020 +
11021 +static ssize_t gpio_show_attr(struct config_item *item,
11022 + struct configfs_attribute *attr,
11023 + char *page)
11024 +{
11025 + struct gpio_item *gpio_item = to_gpio_item(item);
11026 + struct gpio_attribute *gpio_attr
11027 + = container_of(attr, struct gpio_attribute, attr);
11028 + ssize_t ret = 0;
11029 +
11030 + if (gpio_attr->show)
11031 + ret = gpio_attr->show(gpio_item, page);
11032 + return ret;
11033 +}
11034 +
11035 +static ssize_t gpio_store_attr(struct config_item *item,
11036 + struct configfs_attribute *attr,
11037 + const char *page, size_t count)
11038 +{
11039 + struct gpio_item *gpio_item = to_gpio_item(item);
11040 + struct gpio_attribute *gpio_attr
11041 + = container_of(attr, struct gpio_attribute, attr);
11042 + ssize_t ret = -EINVAL;
11043 +
11044 + if (gpio_attr->store)
11045 + ret = gpio_attr->store(gpio_item, page, count);
11046 + return ret;
11047 +}
11048 +
11049 +static void gpio_release(struct config_item *item)
11050 +{
11051 + kfree(to_gpio_item(item));
11052 +}
11053 +
11054 +static struct configfs_item_operations gpio_item_ops = {
11055 + .release = gpio_release,
11056 + .show_attribute = gpio_show_attr,
11057 + .store_attribute = gpio_store_attr,
11058 +};
11059 +
11060 +static struct config_item_type gpio_item_type = {
11061 + .ct_item_ops = &gpio_item_ops,
11062 + .ct_attrs = gpio_item_attrs,
11063 + .ct_owner = THIS_MODULE,
11064 +};
11065 +
11066 +static struct config_item *gpio_make_item(struct config_group *group,
11067 + const char *name)
11068 +{
11069 + static int next_id;
11070 + struct gpio_item *gpio;
11071 +
11072 + if (next_id >= GPIO_DEV_MAX)
11073 + return NULL;
11074 +
11075 + gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
11076 + if (!gpio)
11077 + return NULL;
11078 +
11079 + gpio->id = next_id++;
11080 + config_item_init_type_name(&gpio->item, name, &gpio_item_type);
11081 + spin_lock_init(&gpio->lock);
11082 + init_waitqueue_head(&gpio->change_wq);
11083 +
11084 + return &gpio->item;
11085 +}
11086 +
11087 +static void gpio_drop_item(struct config_group *group,
11088 + struct config_item *item)
11089 +{
11090 + struct gpio_item *gpio = to_gpio_item(item);
11091 +
11092 + spin_lock(&gpio->lock);
11093 + if (gpio->enabled) {
11094 + class_device_unregister(gpio->gpio_dev);
11095 + cdev_del(&gpio->char_dev);
11096 + }
11097 +
11098 + if (gpio->initialized) {
11099 + at32_deselect_pins(gpio->port, gpio->pin_mask);
11100 + gpio->initialized = 0;
11101 + gpio->enabled = 0;
11102 + }
11103 + spin_unlock(&gpio->lock);
11104 +}
11105 +
11106 +static struct configfs_group_operations gpio_group_ops = {
11107 + .make_item = gpio_make_item,
11108 + .drop_item = gpio_drop_item,
11109 +};
11110 +
11111 +static struct config_item_type gpio_group_type = {
11112 + .ct_group_ops = &gpio_group_ops,
11113 + .ct_owner = THIS_MODULE,
11114 +};
11115 +
11116 +static struct configfs_subsystem gpio_subsys = {
11117 + .su_group = {
11118 + .cg_item = {
11119 + .ci_namebuf = "gpio",
11120 + .ci_type = &gpio_group_type,
11121 + },
11122 + },
11123 +};
11124 +
11125 +static int __init gpio_dev_init(void)
11126 +{
11127 + int err;
11128 +
11129 + gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
11130 + if (IS_ERR(gpio_dev_class)) {
11131 + err = PTR_ERR(gpio_dev_class);
11132 + goto err_class_create;
11133 + }
11134 +
11135 + err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
11136 + if (err < 0)
11137 + goto err_alloc_chrdev;
11138 +
11139 + /* Configfs initialization */
11140 + config_group_init(&gpio_subsys.su_group);
11141 + mutex_init(&gpio_subsys.su_mutex);
11142 + err = configfs_register_subsystem(&gpio_subsys);
11143 + if (err)
11144 + goto err_register_subsys;
11145 +
11146 + return 0;
11147 +
11148 +err_register_subsys:
11149 + unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
11150 +err_alloc_chrdev:
11151 + class_destroy(gpio_dev_class);
11152 +err_class_create:
11153 + printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
11154 + return err;
11155 +}
11156 +late_initcall(gpio_dev_init);
11157 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/intc.c avr32-2.6/arch/avr32/mach-at32ap/intc.c
11158 --- linux-2.6.24.3/arch/avr32/mach-at32ap/intc.c 2008-02-26 01:20:20.000000000 +0100
11159 +++ avr32-2.6/arch/avr32/mach-at32ap/intc.c 2008-04-23 20:12:35.000000000 +0200
11160 @@ -13,7 +13,6 @@
11161 #include <linux/irq.h>
11162 #include <linux/platform_device.h>
11163
11164 -#include <asm/intc.h>
11165 #include <asm/io.h>
11166
11167 #include "intc.h"
11168 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/Kconfig avr32-2.6/arch/avr32/mach-at32ap/Kconfig
11169 --- linux-2.6.24.3/arch/avr32/mach-at32ap/Kconfig 2008-02-26 01:20:20.000000000 +0100
11170 +++ avr32-2.6/arch/avr32/mach-at32ap/Kconfig 2008-04-23 19:33:29.000000000 +0200
11171 @@ -3,9 +3,9 @@
11172 menu "Atmel AVR32 AP options"
11173
11174 choice
11175 - prompt "AT32AP7000 static memory bus width"
11176 - depends on CPU_AT32AP7000
11177 - default AP7000_16_BIT_SMC
11178 + prompt "AT32AP700x static memory bus width"
11179 + depends on CPU_AT32AP700X
11180 + default AP700X_16_BIT_SMC
11181 help
11182 Define the width of the AP7000 external static memory interface.
11183 This is used to determine how to mangle the address and/or data
11184 @@ -15,17 +15,24 @@
11185 width for all chip selects, excluding the flash (which is using
11186 raw access and is thus not affected by any of this.)
11187
11188 -config AP7000_32_BIT_SMC
11189 +config AP700X_32_BIT_SMC
11190 bool "32 bit"
11191
11192 -config AP7000_16_BIT_SMC
11193 +config AP700X_16_BIT_SMC
11194 bool "16 bit"
11195
11196 -config AP7000_8_BIT_SMC
11197 +config AP700X_8_BIT_SMC
11198 bool "8 bit"
11199
11200 endchoice
11201
11202 +config GPIO_DEV
11203 + bool "GPIO /dev interface"
11204 + select CONFIGFS_FS
11205 + default n
11206 + help
11207 + Say `Y' to enable a /dev interface to the GPIO pins.
11208 +
11209 endmenu
11210
11211 endif # PLATFORM_AT32AP
11212 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/Makefile avr32-2.6/arch/avr32/mach-at32ap/Makefile
11213 --- linux-2.6.24.3/arch/avr32/mach-at32ap/Makefile 2008-02-26 01:20:20.000000000 +0100
11214 +++ avr32-2.6/arch/avr32/mach-at32ap/Makefile 2008-04-23 20:12:35.000000000 +0200
11215 @@ -1,4 +1,4 @@
11216 obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
11217 -obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
11218 -obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
11219 +obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o
11220 obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o
11221 +obj-$(CONFIG_GPIO_DEV) += gpio-dev.o
11222 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/pio.c avr32-2.6/arch/avr32/mach-at32ap/pio.c
11223 --- linux-2.6.24.3/arch/avr32/mach-at32ap/pio.c 2008-02-26 01:20:20.000000000 +0100
11224 +++ avr32-2.6/arch/avr32/mach-at32ap/pio.c 2008-04-23 20:12:35.000000000 +0200
11225 @@ -162,6 +162,82 @@
11226 dump_stack();
11227 }
11228
11229 +#ifdef CONFIG_GPIO_DEV
11230 +
11231 +/* Gang allocators and accessors; used by the GPIO /dev driver */
11232 +int at32_gpio_port_is_valid(unsigned int port)
11233 +{
11234 + return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
11235 +}
11236 +
11237 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
11238 +{
11239 + struct pio_device *pio;
11240 + u32 old, new;
11241 +
11242 + pio = &pio_dev[port];
11243 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
11244 +
11245 + /* Try to allocate the pins */
11246 + do {
11247 + old = pio->pinmux_mask;
11248 + if (old & pins)
11249 + return -EBUSY;
11250 +
11251 + new = old | pins;
11252 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11253 +
11254 + /* That went well, now configure the port */
11255 + pio_writel(pio, OER, oe_mask);
11256 + pio_writel(pio, PER, pins);
11257 +
11258 + return 0;
11259 +}
11260 +
11261 +void at32_deselect_pins(unsigned int port, u32 pins)
11262 +{
11263 + struct pio_device *pio;
11264 + u32 old, new;
11265 +
11266 + pio = &pio_dev[port];
11267 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11268 +
11269 + /* Return to a "safe" mux configuration */
11270 + pio_writel(pio, PUER, pins);
11271 + pio_writel(pio, ODR, pins);
11272 +
11273 + /* Deallocate the pins */
11274 + do {
11275 + old = pio->pinmux_mask;
11276 + new = old & ~pins;
11277 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11278 +}
11279 +
11280 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
11281 +{
11282 + struct pio_device *pio;
11283 +
11284 + pio = &pio_dev[port];
11285 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11286 +
11287 + return pio_readl(pio, PDSR) & pins;
11288 +}
11289 +
11290 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
11291 +{
11292 + struct pio_device *pio;
11293 +
11294 + pio = &pio_dev[port];
11295 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11296 +
11297 + /* No atomic updates for now... */
11298 + pio_writel(pio, CODR, ~value & mask);
11299 + pio_writel(pio, SODR, value & mask);
11300 +}
11301 +
11302 +#endif /* CONFIG_GPIO_DEV */
11303 +
11304 +
11305 /*--------------------------------------------------------------------------*/
11306
11307 /* GPIO API */
11308 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/pm-at32ap700x.S avr32-2.6/arch/avr32/mach-at32ap/pm-at32ap700x.S
11309 --- linux-2.6.24.3/arch/avr32/mach-at32ap/pm-at32ap700x.S 1970-01-01 01:00:00.000000000 +0100
11310 +++ avr32-2.6/arch/avr32/mach-at32ap/pm-at32ap700x.S 2008-04-23 20:12:35.000000000 +0200
11311 @@ -0,0 +1,66 @@
11312 +/*
11313 + * Low-level Power Management code.
11314 + *
11315 + * Copyright (C) 2008 Atmel Corporation
11316 + *
11317 + * This program is free software; you can redistribute it and/or modify
11318 + * it under the terms of the GNU General Public License version 2 as
11319 + * published by the Free Software Foundation.
11320 + */
11321 +#include <asm/asm.h>
11322 +#include <asm/asm-offsets.h>
11323 +#include <asm/thread_info.h>
11324 +#include <asm/arch/pm.h>
11325 +
11326 + .section .bss, "wa", @nobits
11327 + .global disable_idle_sleep
11328 + .type disable_idle_sleep, @object
11329 +disable_idle_sleep:
11330 + .int 4
11331 + .size disable_idle_sleep, . - disable_idle_sleep
11332 +
11333 + /* Keep this close to the irq handlers */
11334 + .section .irq.text, "ax", @progbits
11335 +
11336 + /*
11337 + * void cpu_enter_idle(void)
11338 + *
11339 + * Put the CPU into "idle" mode, in which it will consume
11340 + * significantly less power.
11341 + *
11342 + * If an interrupt comes along in the window between
11343 + * unmask_interrupts and the sleep instruction below, the
11344 + * interrupt code will adjust the return address so that we
11345 + * never execute the sleep instruction. This is required
11346 + * because the AP7000 doesn't unmask interrupts when entering
11347 + * sleep modes; later CPUs may not need this workaround.
11348 + */
11349 + .global cpu_enter_idle
11350 + .type cpu_enter_idle, @function
11351 +cpu_enter_idle:
11352 + mask_interrupts
11353 + get_thread_info r8
11354 + ld.w r9, r8[TI_flags]
11355 + bld r9, TIF_NEED_RESCHED
11356 + brcs .Lret_from_sleep
11357 + sbr r9, TIF_CPU_GOING_TO_SLEEP
11358 + st.w r8[TI_flags], r9
11359 + unmask_interrupts
11360 + sleep CPU_SLEEP_IDLE
11361 + .size cpu_idle_sleep, . - cpu_idle_sleep
11362 +
11363 + /*
11364 + * Common return path for PM functions that don't run from
11365 + * SRAM.
11366 + */
11367 + .global cpu_idle_skip_sleep
11368 + .type cpu_idle_skip_sleep, @function
11369 +cpu_idle_skip_sleep:
11370 + mask_interrupts
11371 + ld.w r9, r8[TI_flags]
11372 + cbr r9, TIF_CPU_GOING_TO_SLEEP
11373 + st.w r8[TI_flags], r9
11374 +.Lret_from_sleep:
11375 + unmask_interrupts
11376 + retal r12
11377 + .size cpu_idle_skip_sleep, . - cpu_idle_skip_sleep
11378 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/time-tc.c avr32-2.6/arch/avr32/mach-at32ap/time-tc.c
11379 --- linux-2.6.24.3/arch/avr32/mach-at32ap/time-tc.c 2008-02-26 01:20:20.000000000 +0100
11380 +++ avr32-2.6/arch/avr32/mach-at32ap/time-tc.c 1970-01-01 01:00:00.000000000 +0100
11381 @@ -1,218 +0,0 @@
11382 -/*
11383 - * Copyright (C) 2004-2007 Atmel Corporation
11384 - *
11385 - * Based on MIPS implementation arch/mips/kernel/time.c
11386 - * Copyright 2001 MontaVista Software Inc.
11387 - *
11388 - * This program is free software; you can redistribute it and/or modify
11389 - * it under the terms of the GNU General Public License version 2 as
11390 - * published by the Free Software Foundation.
11391 - */
11392 -
11393 -#include <linux/clk.h>
11394 -#include <linux/clocksource.h>
11395 -#include <linux/time.h>
11396 -#include <linux/module.h>
11397 -#include <linux/interrupt.h>
11398 -#include <linux/irq.h>
11399 -#include <linux/kernel_stat.h>
11400 -#include <linux/errno.h>
11401 -#include <linux/init.h>
11402 -#include <linux/profile.h>
11403 -#include <linux/sysdev.h>
11404 -#include <linux/err.h>
11405 -
11406 -#include <asm/div64.h>
11407 -#include <asm/sysreg.h>
11408 -#include <asm/io.h>
11409 -#include <asm/sections.h>
11410 -
11411 -#include <asm/arch/time.h>
11412 -
11413 -/* how many counter cycles in a jiffy? */
11414 -static u32 cycles_per_jiffy;
11415 -
11416 -/* the count value for the next timer interrupt */
11417 -static u32 expirelo;
11418 -
11419 -/* the I/O registers of the TC module */
11420 -static void __iomem *ioregs;
11421 -
11422 -cycle_t read_cycle_count(void)
11423 -{
11424 - return (cycle_t)timer_read(ioregs, 0, CV);
11425 -}
11426 -
11427 -struct clocksource clocksource_avr32 = {
11428 - .name = "avr32",
11429 - .rating = 342,
11430 - .read = read_cycle_count,
11431 - .mask = CLOCKSOURCE_MASK(16),
11432 - .shift = 16,
11433 - .flags = CLOCK_SOURCE_IS_CONTINUOUS,
11434 -};
11435 -
11436 -static void avr32_timer_ack(void)
11437 -{
11438 - u16 count = expirelo;
11439 -
11440 - /* Ack this timer interrupt and set the next one, use a u16
11441 - * variable so it will wrap around correctly */
11442 - count += cycles_per_jiffy;
11443 - expirelo = count;
11444 - timer_write(ioregs, 0, RC, expirelo);
11445 -
11446 - /* Check to see if we have missed any timer interrupts */
11447 - count = timer_read(ioregs, 0, CV);
11448 - if ((count - expirelo) < 0x7fff) {
11449 - expirelo = count + cycles_per_jiffy;
11450 - timer_write(ioregs, 0, RC, expirelo);
11451 - }
11452 -}
11453 -
11454 -u32 avr32_hpt_read(void)
11455 -{
11456 - return timer_read(ioregs, 0, CV);
11457 -}
11458 -
11459 -static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
11460 -{
11461 - unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
11462 - unsigned int divs[] = { 4, 8, 16, 32 };
11463 - int divs_size = ARRAY_SIZE(divs);
11464 - int i = 0;
11465 - unsigned long count_hz;
11466 - unsigned long shift;
11467 - unsigned long mult;
11468 - int clock_div = -1;
11469 - u64 tmp;
11470 -
11471 - shift = clocksource_avr32.shift;
11472 -
11473 - do {
11474 - count_hz = clk_get_rate(pclk) / divs[i];
11475 - mult = clocksource_hz2mult(count_hz, shift);
11476 - clocksource_avr32.mult = mult;
11477 -
11478 - tmp = TICK_NSEC;
11479 - tmp <<= shift;
11480 - tmp += mult / 2;
11481 - do_div(tmp, mult);
11482 -
11483 - cycles_per_jiffy = tmp;
11484 - } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
11485 -
11486 - clock_div = i + 1;
11487 -
11488 - if (clock_div > divs_size) {
11489 - pr_debug("timer: could not calculate clock divider\n");
11490 - return -EFAULT;
11491 - }
11492 -
11493 - /* Set the clock divider */
11494 - timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
11495 -
11496 - return 0;
11497 -}
11498 -
11499 -int avr32_hpt_init(unsigned int count)
11500 -{
11501 - struct resource *regs;
11502 - struct clk *pclk;
11503 - int irq = -1;
11504 - int ret = 0;
11505 -
11506 - ret = -ENXIO;
11507 -
11508 - irq = platform_get_irq(&at32_systc0_device, 0);
11509 - if (irq < 0) {
11510 - pr_debug("timer: could not get irq\n");
11511 - goto out_error;
11512 - }
11513 -
11514 - pclk = clk_get(&at32_systc0_device.dev, "pclk");
11515 - if (IS_ERR(pclk)) {
11516 - pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
11517 - goto out_error;
11518 - }
11519 - clk_enable(pclk);
11520 -
11521 - regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
11522 - if (!regs) {
11523 - pr_debug("timer: could not get resource\n");
11524 - goto out_error_clk;
11525 - }
11526 -
11527 - ioregs = ioremap(regs->start, regs->end - regs->start + 1);
11528 - if (!ioregs) {
11529 - pr_debug("timer: could not get ioregs\n");
11530 - goto out_error_clk;
11531 - }
11532 -
11533 - ret = avr32_timer_calc_div_and_set_jiffies(pclk);
11534 - if (ret)
11535 - goto out_error_io;
11536 -
11537 - ret = setup_irq(irq, &timer_irqaction);
11538 - if (ret) {
11539 - pr_debug("timer: could not request irq %d: %d\n",
11540 - irq, ret);
11541 - goto out_error_io;
11542 - }
11543 -
11544 - expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
11545 - * cycles_per_jiffy;
11546 -
11547 - /* Enable clock and interrupts on RC compare */
11548 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
11549 - timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
11550 - /* Set cycles to first interrupt */
11551 - timer_write(ioregs, 0, RC, expirelo);
11552 -
11553 - printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
11554 - ioregs, irq);
11555 -
11556 - return 0;
11557 -
11558 -out_error_io:
11559 - iounmap(ioregs);
11560 -out_error_clk:
11561 - clk_put(pclk);
11562 -out_error:
11563 - return ret;
11564 -}
11565 -
11566 -int avr32_hpt_start(void)
11567 -{
11568 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
11569 - return 0;
11570 -}
11571 -
11572 -irqreturn_t timer_interrupt(int irq, void *dev_id)
11573 -{
11574 - unsigned int sr = timer_read(ioregs, 0, SR);
11575 -
11576 - if (sr & TIMER_BIT(SR_CPCS)) {
11577 - /* ack timer interrupt and try to set next interrupt */
11578 - avr32_timer_ack();
11579 -
11580 - /*
11581 - * Call the generic timer interrupt handler
11582 - */
11583 - write_seqlock(&xtime_lock);
11584 - do_timer(1);
11585 - write_sequnlock(&xtime_lock);
11586 -
11587 - /*
11588 - * In UP mode, we call local_timer_interrupt() to do profiling
11589 - * and process accounting.
11590 - *
11591 - * SMP is not supported yet.
11592 - */
11593 - local_timer_interrupt(irq, dev_id);
11594 -
11595 - return IRQ_HANDLED;
11596 - }
11597 -
11598 - return IRQ_NONE;
11599 -}
11600 diff -urN linux-2.6.24.3/arch/avr32/Makefile avr32-2.6/arch/avr32/Makefile
11601 --- linux-2.6.24.3/arch/avr32/Makefile 2008-02-26 01:20:20.000000000 +0100
11602 +++ avr32-2.6/arch/avr32/Makefile 2008-04-23 19:33:28.000000000 +0200
11603 @@ -16,7 +16,7 @@
11604 CFLAGS_MODULE += -mno-relax
11605 LDFLAGS_vmlinux += --relax
11606
11607 -cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000
11608 +cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap
11609
11610 KBUILD_CFLAGS += $(cpuflags-y)
11611 KBUILD_AFLAGS += $(cpuflags-y)
11612 @@ -31,6 +31,8 @@
11613 core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
11614 core-y += arch/avr32/kernel/
11615 core-y += arch/avr32/mm/
11616 +drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/
11617 +drivers-y += arch/avr32/drivers/
11618 libs-y += arch/avr32/lib/
11619
11620 archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap
11621 diff -urN linux-2.6.24.3/arch/avr32/mm/dma-coherent.c avr32-2.6/arch/avr32/mm/dma-coherent.c
11622 --- linux-2.6.24.3/arch/avr32/mm/dma-coherent.c 2008-02-26 01:20:20.000000000 +0100
11623 +++ avr32-2.6/arch/avr32/mm/dma-coherent.c 2008-04-23 19:33:29.000000000 +0200
11624 @@ -41,6 +41,13 @@
11625 struct page *page, *free, *end;
11626 int order;
11627
11628 + /* Following is a work-around (a.k.a. hack) to prevent pages
11629 + * with __GFP_COMP being passed to split_page() which cannot
11630 + * handle them. The real problem is that this flag probably
11631 + * should be 0 on AVR32 as it is not supported on this
11632 + * platform--see CONFIG_HUGETLB_PAGE. */
11633 + gfp &= ~(__GFP_COMP);
11634 +
11635 size = PAGE_ALIGN(size);
11636 order = get_order(size);
11637
11638 diff -urN linux-2.6.24.3/arch/avr32/mm/fault.c avr32-2.6/arch/avr32/mm/fault.c
11639 --- linux-2.6.24.3/arch/avr32/mm/fault.c 2008-02-26 01:20:20.000000000 +0100
11640 +++ avr32-2.6/arch/avr32/mm/fault.c 2008-04-23 20:12:35.000000000 +0200
11641 @@ -189,6 +189,8 @@
11642
11643 page = sysreg_read(PTBR);
11644 printk(KERN_ALERT "ptbr = %08lx", page);
11645 + if (address >= TASK_SIZE)
11646 + page = (unsigned long)swapper_pg_dir;
11647 if (page) {
11648 page = ((unsigned long *)page)[address >> 22];
11649 printk(" pgd = %08lx", page);
11650 diff -urN linux-2.6.24.3/arch/avr32/mm/tlb.c avr32-2.6/arch/avr32/mm/tlb.c
11651 --- linux-2.6.24.3/arch/avr32/mm/tlb.c 2008-02-26 01:20:20.000000000 +0100
11652 +++ avr32-2.6/arch/avr32/mm/tlb.c 2008-04-23 19:33:29.000000000 +0200
11653 @@ -348,7 +348,7 @@
11654 return 0;
11655 }
11656
11657 -static struct seq_operations tlb_ops = {
11658 +static const struct seq_operations tlb_ops = {
11659 .start = tlb_start,
11660 .next = tlb_next,
11661 .stop = tlb_stop,
11662 diff -urN linux-2.6.24.3/arch/avr32/oprofile/Makefile avr32-2.6/arch/avr32/oprofile/Makefile
11663 --- linux-2.6.24.3/arch/avr32/oprofile/Makefile 1970-01-01 01:00:00.000000000 +0100
11664 +++ avr32-2.6/arch/avr32/oprofile/Makefile 2008-04-23 19:33:29.000000000 +0200
11665 @@ -0,0 +1,8 @@
11666 +obj-$(CONFIG_OPROFILE) += oprofile.o
11667 +
11668 +oprofile-y := $(addprefix ../../../drivers/oprofile/, \
11669 + oprof.o cpu_buffer.o buffer_sync.o \
11670 + event_buffer.o oprofile_files.o \
11671 + oprofilefs.o oprofile_stats.o \
11672 + timer_int.o)
11673 +oprofile-y += op_model_avr32.o
11674 diff -urN linux-2.6.24.3/arch/avr32/oprofile/op_model_avr32.c avr32-2.6/arch/avr32/oprofile/op_model_avr32.c
11675 --- linux-2.6.24.3/arch/avr32/oprofile/op_model_avr32.c 1970-01-01 01:00:00.000000000 +0100
11676 +++ avr32-2.6/arch/avr32/oprofile/op_model_avr32.c 2008-04-23 20:12:35.000000000 +0200
11677 @@ -0,0 +1,234 @@
11678 +/*
11679 + * AVR32 Performance Counter Driver
11680 + *
11681 + * Copyright (C) 2005-2007 Atmel Corporation
11682 + *
11683 + * This program is free software; you can redistribute it and/or modify
11684 + * it under the terms of the GNU General Public License version 2 as
11685 + * published by the Free Software Foundation.
11686 + *
11687 + * Author: Ronny Pedersen
11688 + */
11689 +#include <linux/errno.h>
11690 +#include <linux/interrupt.h>
11691 +#include <linux/irq.h>
11692 +#include <linux/oprofile.h>
11693 +#include <linux/sched.h>
11694 +#include <linux/types.h>
11695 +
11696 +#include <asm/sysreg.h>
11697 +#include <asm/system.h>
11698 +
11699 +#define AVR32_PERFCTR_IRQ_GROUP 0
11700 +#define AVR32_PERFCTR_IRQ_LINE 1
11701 +
11702 +enum { PCCNT, PCNT0, PCNT1, NR_counter };
11703 +
11704 +struct avr32_perf_counter {
11705 + unsigned long enabled;
11706 + unsigned long event;
11707 + unsigned long count;
11708 + unsigned long unit_mask;
11709 + unsigned long kernel;
11710 + unsigned long user;
11711 +
11712 + u32 ie_mask;
11713 + u32 flag_mask;
11714 +};
11715 +
11716 +static struct avr32_perf_counter counter[NR_counter] = {
11717 + {
11718 + .ie_mask = SYSREG_BIT(IEC),
11719 + .flag_mask = SYSREG_BIT(FC),
11720 + }, {
11721 + .ie_mask = SYSREG_BIT(IE0),
11722 + .flag_mask = SYSREG_BIT(F0),
11723 + }, {
11724 + .ie_mask = SYSREG_BIT(IE1),
11725 + .flag_mask = SYSREG_BIT(F1),
11726 + },
11727 +};
11728 +
11729 +static void avr32_perf_counter_reset(void)
11730 +{
11731 + /* Reset all counter and disable/clear all interrupts */
11732 + sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
11733 + | SYSREG_BIT(PCCR_C)
11734 + | SYSREG_BIT(FC)
11735 + | SYSREG_BIT(F0)
11736 + | SYSREG_BIT(F1)));
11737 +}
11738 +
11739 +static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
11740 +{
11741 + struct avr32_perf_counter *ctr = dev_id;
11742 + struct pt_regs *regs;
11743 + u32 pccr;
11744 +
11745 + if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
11746 + & (1 << AVR32_PERFCTR_IRQ_LINE))))
11747 + return IRQ_NONE;
11748 +
11749 + regs = get_irq_regs();
11750 + pccr = sysreg_read(PCCR);
11751 +
11752 + /* Clear the interrupt flags we're about to handle */
11753 + sysreg_write(PCCR, pccr);
11754 +
11755 + /* PCCNT */
11756 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11757 + sysreg_write(PCCNT, -ctr->count);
11758 + oprofile_add_sample(regs, PCCNT);
11759 + }
11760 + ctr++;
11761 + /* PCNT0 */
11762 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11763 + sysreg_write(PCNT0, -ctr->count);
11764 + oprofile_add_sample(regs, PCNT0);
11765 + }
11766 + ctr++;
11767 + /* PCNT1 */
11768 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11769 + sysreg_write(PCNT1, -ctr->count);
11770 + oprofile_add_sample(regs, PCNT1);
11771 + }
11772 +
11773 + return IRQ_HANDLED;
11774 +}
11775 +
11776 +static int avr32_perf_counter_create_files(struct super_block *sb,
11777 + struct dentry *root)
11778 +{
11779 + struct dentry *dir;
11780 + unsigned int i;
11781 + char filename[4];
11782 +
11783 + for (i = 0; i < NR_counter; i++) {
11784 + snprintf(filename, sizeof(filename), "%u", i);
11785 + dir = oprofilefs_mkdir(sb, root, filename);
11786 +
11787 + oprofilefs_create_ulong(sb, dir, "enabled",
11788 + &counter[i].enabled);
11789 + oprofilefs_create_ulong(sb, dir, "event",
11790 + &counter[i].event);
11791 + oprofilefs_create_ulong(sb, dir, "count",
11792 + &counter[i].count);
11793 +
11794 + /* Dummy entries */
11795 + oprofilefs_create_ulong(sb, dir, "kernel",
11796 + &counter[i].kernel);
11797 + oprofilefs_create_ulong(sb, dir, "user",
11798 + &counter[i].user);
11799 + oprofilefs_create_ulong(sb, dir, "unit_mask",
11800 + &counter[i].unit_mask);
11801 + }
11802 +
11803 + return 0;
11804 +}
11805 +
11806 +static int avr32_perf_counter_setup(void)
11807 +{
11808 + struct avr32_perf_counter *ctr;
11809 + u32 pccr;
11810 + int ret;
11811 + int i;
11812 +
11813 + pr_debug("avr32_perf_counter_setup\n");
11814 +
11815 + if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
11816 + printk(KERN_ERR
11817 + "oprofile: setup: perf counter already enabled\n");
11818 + return -EBUSY;
11819 + }
11820 +
11821 + ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
11822 + avr32_perf_counter_interrupt, IRQF_SHARED,
11823 + "oprofile", counter);
11824 + if (ret)
11825 + return ret;
11826 +
11827 + avr32_perf_counter_reset();
11828 +
11829 + pccr = 0;
11830 + for (i = PCCNT; i < NR_counter; i++) {
11831 + ctr = &counter[i];
11832 + if (!ctr->enabled)
11833 + continue;
11834 +
11835 + pr_debug("enabling counter %d...\n", i);
11836 +
11837 + pccr |= ctr->ie_mask;
11838 +
11839 + switch (i) {
11840 + case PCCNT:
11841 + /* PCCNT always counts cycles, so no events */
11842 + sysreg_write(PCCNT, -ctr->count);
11843 + break;
11844 + case PCNT0:
11845 + pccr |= SYSREG_BF(CONF0, ctr->event);
11846 + sysreg_write(PCNT0, -ctr->count);
11847 + break;
11848 + case PCNT1:
11849 + pccr |= SYSREG_BF(CONF1, ctr->event);
11850 + sysreg_write(PCNT1, -ctr->count);
11851 + break;
11852 + }
11853 + }
11854 +
11855 + pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
11856 +
11857 + sysreg_write(PCCR, pccr);
11858 +
11859 + return 0;
11860 +}
11861 +
11862 +static void avr32_perf_counter_shutdown(void)
11863 +{
11864 + pr_debug("avr32_perf_counter_shutdown\n");
11865 +
11866 + avr32_perf_counter_reset();
11867 + free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
11868 +}
11869 +
11870 +static int avr32_perf_counter_start(void)
11871 +{
11872 + pr_debug("avr32_perf_counter_start\n");
11873 +
11874 + sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
11875 +
11876 + return 0;
11877 +}
11878 +
11879 +static void avr32_perf_counter_stop(void)
11880 +{
11881 + pr_debug("avr32_perf_counter_stop\n");
11882 +
11883 + sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
11884 +}
11885 +
11886 +static struct oprofile_operations avr32_perf_counter_ops __initdata = {
11887 + .create_files = avr32_perf_counter_create_files,
11888 + .setup = avr32_perf_counter_setup,
11889 + .shutdown = avr32_perf_counter_shutdown,
11890 + .start = avr32_perf_counter_start,
11891 + .stop = avr32_perf_counter_stop,
11892 + .cpu_type = "avr32",
11893 +};
11894 +
11895 +int __init oprofile_arch_init(struct oprofile_operations *ops)
11896 +{
11897 + if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
11898 + return -ENODEV;
11899 +
11900 + memcpy(ops, &avr32_perf_counter_ops,
11901 + sizeof(struct oprofile_operations));
11902 +
11903 + printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
11904 +
11905 + return 0;
11906 +}
11907 +
11908 +void oprofile_arch_exit(void)
11909 +{
11910 +
11911 +}
11912 diff -urN linux-2.6.24.3/Documentation/kernel-parameters.txt avr32-2.6/Documentation/kernel-parameters.txt
11913 --- linux-2.6.24.3/Documentation/kernel-parameters.txt 2008-02-26 01:20:20.000000000 +0100
11914 +++ avr32-2.6/Documentation/kernel-parameters.txt 2008-04-23 20:12:35.000000000 +0200
11915 @@ -34,6 +34,7 @@
11916 ALSA ALSA sound support is enabled.
11917 APIC APIC support is enabled.
11918 APM Advanced Power Management support is enabled.
11919 + AVR32 AVR32 architecture is enabled.
11920 AX25 Appropriate AX.25 support is enabled.
11921 BLACKFIN Blackfin architecture is enabled.
11922 DRM Direct Rendering Management support is enabled.
11923 @@ -1123,6 +1124,10 @@
11924 of returning the full 64-bit number.
11925 The default is to return 64-bit inode numbers.
11926
11927 + nmi_debug= [KNL,AVR32] Specify one or more actions to take
11928 + when a NMI is triggered.
11929 + Format: [state][,regs][,debounce][,die]
11930 +
11931 nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels
11932
11933 no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
11934 diff -urN linux-2.6.24.3/drivers/clocksource/Makefile avr32-2.6/drivers/clocksource/Makefile
11935 --- linux-2.6.24.3/drivers/clocksource/Makefile 2008-02-26 01:20:20.000000000 +0100
11936 +++ avr32-2.6/drivers/clocksource/Makefile 2008-04-23 20:12:39.000000000 +0200
11937 @@ -1,3 +1,4 @@
11938 +obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
11939 obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
11940 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
11941 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
11942 diff -urN linux-2.6.24.3/drivers/clocksource/tcb_clksrc.c avr32-2.6/drivers/clocksource/tcb_clksrc.c
11943 --- linux-2.6.24.3/drivers/clocksource/tcb_clksrc.c 1970-01-01 01:00:00.000000000 +0100
11944 +++ avr32-2.6/drivers/clocksource/tcb_clksrc.c 2008-04-23 20:12:39.000000000 +0200
11945 @@ -0,0 +1,305 @@
11946 +#include <linux/init.h>
11947 +#include <linux/clocksource.h>
11948 +#include <linux/clockchips.h>
11949 +#include <linux/interrupt.h>
11950 +#include <linux/irq.h>
11951 +
11952 +#include <linux/clk.h>
11953 +#include <linux/err.h>
11954 +#include <linux/ioport.h>
11955 +#include <linux/io.h>
11956 +#include <linux/platform_device.h>
11957 +#include <linux/atmel_tc.h>
11958 +
11959 +
11960 +/*
11961 + * We're configured to use a specific TC block, one that's not hooked
11962 + * up to external hardware, to provide a time solution:
11963 + *
11964 + * - Two channels combine to create a free-running 32 bit counter
11965 + * with a base rate of 5+ MHz, packaged as a clocksource (with
11966 + * resolution better than 200 nsec).
11967 + *
11968 + * - The third channel may be used to provide a 16-bit clockevent
11969 + * source, used in either periodic or oneshot mode. This runs
11970 + * at 32 KiHZ, and can handle delays of up to two seconds.
11971 + *
11972 + * A boot clocksource and clockevent source are also currently needed,
11973 + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so
11974 + * this code can be used when init_timers() is called, well before most
11975 + * devices are set up. (Some low end AT91 parts, which can run uClinux,
11976 + * have only the timers in one TC block... they currently don't support
11977 + * the tclib code, because of that initialization issue.)
11978 + *
11979 + * REVISIT behavior during system suspend states... we should disable
11980 + * all clocks and save the power. Easily done for clockevent devices,
11981 + * but clocksources won't necessarily get the needed notifications.
11982 + * For deeper system sleep states, this will be mandatory...
11983 + */
11984 +
11985 +static void __iomem *tcaddr;
11986 +
11987 +static cycle_t tc_get_cycles(void)
11988 +{
11989 + unsigned long flags;
11990 + u32 lower, upper;
11991 +
11992 + raw_local_irq_save(flags);
11993 + do {
11994 + upper = __raw_readl(tcaddr + ATMEL_TC_REG(1, CV));
11995 + lower = __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
11996 + } while (upper != __raw_readl(tcaddr + ATMEL_TC_REG(1, CV)));
11997 +
11998 + raw_local_irq_restore(flags);
11999 + return (upper << 16) | lower;
12000 +}
12001 +
12002 +static struct clocksource clksrc = {
12003 + .name = "tcb_clksrc",
12004 + .rating = 200,
12005 + .read = tc_get_cycles,
12006 + .mask = CLOCKSOURCE_MASK(32),
12007 + .shift = 18,
12008 + .flags = CLOCK_SOURCE_IS_CONTINUOUS,
12009 +};
12010 +
12011 +#ifdef CONFIG_GENERIC_CLOCKEVENTS
12012 +
12013 +struct tc_clkevt_device {
12014 + struct clock_event_device clkevt;
12015 + struct clk *clk;
12016 + void __iomem *regs;
12017 +};
12018 +
12019 +static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt)
12020 +{
12021 + return container_of(clkevt, struct tc_clkevt_device, clkevt);
12022 +}
12023 +
12024 +/* For now, we always use the 32K clock ... this optimizes for NO_HZ,
12025 + * because using one of the divided clocks would usually mean the
12026 + * tick rate can never be less than several dozen Hz (vs 0.5 Hz).
12027 + *
12028 + * A divided clock could be good for high resolution timers, since
12029 + * 30.5 usec resolution can seem "low".
12030 + */
12031 +static u32 timer_clock;
12032 +
12033 +static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
12034 +{
12035 + struct tc_clkevt_device *tcd = to_tc_clkevt(d);
12036 + void __iomem *regs = tcd->regs;
12037 +
12038 + if (tcd->clkevt.mode == CLOCK_EVT_MODE_PERIODIC
12039 + || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
12040 + __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
12041 + __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
12042 + clk_disable(tcd->clk);
12043 + }
12044 +
12045 + switch (m) {
12046 +
12047 + /* By not making the gentime core emulate periodic mode on top
12048 + * of oneshot, we get lower overhead and improved accuracy.
12049 + */
12050 + case CLOCK_EVT_MODE_PERIODIC:
12051 + clk_enable(tcd->clk);
12052 +
12053 + /* slow clock, count up to RC, then irq and restart */
12054 + __raw_writel(timer_clock
12055 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
12056 + regs + ATMEL_TC_REG(2, CMR));
12057 + __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
12058 +
12059 + /* Enable clock and interrupts on RC compare */
12060 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
12061 +
12062 + /* go go gadget! */
12063 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
12064 + regs + ATMEL_TC_REG(2, CCR));
12065 + break;
12066 +
12067 + case CLOCK_EVT_MODE_ONESHOT:
12068 + clk_enable(tcd->clk);
12069 +
12070 + /* slow clock, count up to RC, then irq and stop */
12071 + __raw_writel(timer_clock | ATMEL_TC_CPCSTOP
12072 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
12073 + regs + ATMEL_TC_REG(2, CMR));
12074 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
12075 +
12076 + /* set_next_event() configures and starts the timer */
12077 + break;
12078 +
12079 + default:
12080 + break;
12081 + }
12082 +}
12083 +
12084 +static int tc_next_event(unsigned long delta, struct clock_event_device *d)
12085 +{
12086 + __raw_writel(delta, tcaddr + ATMEL_TC_REG(2, RC));
12087 +
12088 + /* go go gadget! */
12089 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
12090 + tcaddr + ATMEL_TC_REG(2, CCR));
12091 + return 0;
12092 +}
12093 +
12094 +static struct tc_clkevt_device clkevt = {
12095 + .clkevt = {
12096 + .name = "tc_clkevt",
12097 + .features = CLOCK_EVT_FEAT_PERIODIC
12098 + | CLOCK_EVT_FEAT_ONESHOT,
12099 + .shift = 32,
12100 + /* Should be lower than at91rm9200's system timer */
12101 + .rating = 125,
12102 + .cpumask = CPU_MASK_CPU0,
12103 + .set_next_event = tc_next_event,
12104 + .set_mode = tc_mode,
12105 + },
12106 +};
12107 +
12108 +static irqreturn_t ch2_irq(int irq, void *handle)
12109 +{
12110 + struct tc_clkevt_device *dev = handle;
12111 + unsigned int sr;
12112 +
12113 + sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR));
12114 + if (sr & ATMEL_TC_CPCS) {
12115 + dev->clkevt.event_handler(&dev->clkevt);
12116 + return IRQ_HANDLED;
12117 + }
12118 +
12119 + return IRQ_NONE;
12120 +}
12121 +
12122 +static struct irqaction tc_irqaction = {
12123 + .name = "tc_clkevt",
12124 + .flags = IRQF_TIMER | IRQF_DISABLED,
12125 + .handler = ch2_irq,
12126 +};
12127 +
12128 +static void __init setup_clkevents(struct atmel_tc *tc,
12129 + struct clk *t0_clk, int clk32k_divisor_idx)
12130 +{
12131 + struct platform_device *pdev = tc->pdev;
12132 + struct clk *t2_clk = tc->clk[2];
12133 + int irq = tc->irq[2];
12134 +
12135 + clkevt.regs = tc->regs;
12136 + clkevt.clk = t2_clk;
12137 + tc_irqaction.dev_id = &clkevt;
12138 +
12139 + timer_clock = clk32k_divisor_idx;
12140 +
12141 + clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
12142 + clkevt.clkevt.max_delta_ns
12143 + = clockevent_delta2ns(0xffff, &clkevt.clkevt);
12144 + clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
12145 +
12146 + setup_irq(irq, &tc_irqaction);
12147 +
12148 + clockevents_register_device(&clkevt.clkevt);
12149 +}
12150 +
12151 +#else /* !CONFIG_GENERIC_CLOCKEVENTS */
12152 +
12153 +static void __init setup_clkevents(struct atmel_tc *tc,
12154 + struct clk *t0_clk, int clk32k_divisor_idx)
12155 +{
12156 + /* NOTHING */
12157 +}
12158 +
12159 +#endif
12160 +
12161 +static int __init tcb_clksrc_init(void)
12162 +{
12163 + static char bootinfo[] __initdata
12164 + = KERN_DEBUG "%s: tc%d at %d.%03d MHz\n";
12165 +
12166 + struct platform_device *pdev;
12167 + struct atmel_tc *tc;
12168 + struct clk *t0_clk, *t1_clk;
12169 + u32 rate, divided_rate = 0;
12170 + int best_divisor_idx = -1;
12171 + int clk32k_divisor_idx = -1;
12172 + int i;
12173 +
12174 + tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
12175 + if (!tc) {
12176 + pr_debug("can't alloc TC for clocksource\n");
12177 + return -ENODEV;
12178 + }
12179 + tcaddr = tc->regs;
12180 + pdev = tc->pdev;
12181 +
12182 + t0_clk = tc->clk[0];
12183 + clk_enable(t0_clk);
12184 +
12185 + /* How fast will we be counting? Pick something over 5 MHz. */
12186 + rate = (u32) clk_get_rate(t0_clk);
12187 + for (i = 0; i < 5; i++) {
12188 + unsigned divisor = atmel_tc_divisors[i];
12189 + unsigned tmp;
12190 +
12191 + /* remember 32 KiHz clock for later */
12192 + if (!divisor) {
12193 + clk32k_divisor_idx = i;
12194 + continue;
12195 + }
12196 +
12197 + tmp = rate / divisor;
12198 + pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp);
12199 + if (best_divisor_idx > 0) {
12200 + if (tmp < 5 * 1000 * 1000)
12201 + continue;
12202 + }
12203 + divided_rate = tmp;
12204 + best_divisor_idx = i;
12205 + }
12206 +
12207 + clksrc.mult = clocksource_hz2mult(divided_rate, clksrc.shift);
12208 +
12209 + printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK,
12210 + divided_rate / 1000000,
12211 + ((divided_rate + 500000) % 1000000) / 1000);
12212 +
12213 + /* tclib will give us three clocks no matter what the
12214 + * underlying platform supports.
12215 + */
12216 + clk_enable(tc->clk[1]);
12217 +
12218 + /* channel 0: waveform mode, input mclk/8, clock TIOA0 on overflow */
12219 + __raw_writel(best_divisor_idx /* likely divide-by-8 */
12220 + | ATMEL_TC_WAVE
12221 + | ATMEL_TC_WAVESEL_UP /* free-run */
12222 + | ATMEL_TC_ACPA_SET /* TIOA0 rises at 0 */
12223 + | ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */
12224 + tcaddr + ATMEL_TC_REG(0, CMR));
12225 + __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
12226 + __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
12227 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */
12228 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
12229 +
12230 + /* channel 1: waveform mode, input TIOA0 */
12231 + __raw_writel(ATMEL_TC_XC1 /* input: TIOA0 */
12232 + | ATMEL_TC_WAVE
12233 + | ATMEL_TC_WAVESEL_UP, /* free-run */
12234 + tcaddr + ATMEL_TC_REG(1, CMR));
12235 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */
12236 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
12237 +
12238 + /* chain channel 0 to channel 1, then reset all the timers */
12239 + __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
12240 + __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
12241 +
12242 + /* and away we go! */
12243 + clocksource_register(&clksrc);
12244 +
12245 + /* channel 2: periodic and oneshot timer support */
12246 + setup_clkevents(tc, t0_clk, clk32k_divisor_idx);
12247 +
12248 + return 0;
12249 +}
12250 +arch_initcall(tcb_clksrc_init);
12251 diff -urN linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.c avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.c
12252 --- linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.c 1970-01-01 01:00:00.000000000 +0100
12253 +++ avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.c 2008-04-23 19:33:37.000000000 +0200
12254 @@ -0,0 +1,436 @@
12255 +/*
12256 + * i2c Support for Atmel's Two-Wire Interface (TWI)
12257 + *
12258 + * Based on the work of Copyright (C) 2004 Rick Bronson
12259 + * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
12260 + * Ported to AVR32 and heavily modified by Espen Krangnes
12261 + * <ekrangnes at atmel.com>
12262 + *
12263 + * Copyright (C) 2006 Atmel Corporation
12264 + *
12265 + * Borrowed heavily from the original work by:
12266 + * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
12267 + *
12268 + * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
12269 + * bugs removed, interrupt routine markedly rewritten
12270 + *
12271 + * This program is free software; you can redistribute it and/or modify
12272 + * it under the terms of the GNU General Public License as published by
12273 + * the Free Software Foundation; either version 2 of the License, or
12274 + * (at your option) any later version.
12275 + */
12276 +#undef VERBOSE_DEBUG
12277 +
12278 +#include <linux/module.h>
12279 +#include <linux/slab.h>
12280 +#include <linux/i2c.h>
12281 +#include <linux/init.h>
12282 +#include <linux/clk.h>
12283 +#include <linux/err.h>
12284 +#include <linux/interrupt.h>
12285 +#include <linux/platform_device.h>
12286 +#include <linux/completion.h>
12287 +#include <linux/io.h>
12288 +
12289 +#include "i2c-atmeltwi.h"
12290 +
12291 +static unsigned int baudrate = 100 * 1000;
12292 +module_param(baudrate, uint, S_IRUGO);
12293 +MODULE_PARM_DESC(baudrate, "The TWI baudrate");
12294 +
12295 +
12296 +struct atmel_twi {
12297 + void __iomem *regs;
12298 + struct i2c_adapter adapter;
12299 + struct clk *pclk;
12300 + struct completion comp;
12301 + u32 mask;
12302 + u8 *buf;
12303 + u16 len;
12304 + u16 acks_left;
12305 + int status;
12306 + unsigned int irq;
12307 +
12308 +};
12309 +#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
12310 +
12311 +/*
12312 + * (Re)Initialize the TWI hardware registers.
12313 + */
12314 +static int twi_hwinit(struct atmel_twi *twi)
12315 +{
12316 + unsigned long cdiv, ckdiv = 0;
12317 +
12318 + /* REVISIT: wait till SCL is high before resetting; otherwise,
12319 + * some versions will wedge forever.
12320 + */
12321 +
12322 + twi_writel(twi, IDR, ~0UL);
12323 + twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/
12324 + twi_readl(twi, SR);
12325 +
12326 + cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
12327 +
12328 + while (cdiv > 255) {
12329 + ckdiv++;
12330 + cdiv = cdiv >> 1;
12331 + }
12332 +
12333 + /* REVISIT: there are various errata to consider re CDIV and CHDIV
12334 + * here, at least on at91 parts.
12335 + */
12336 +
12337 + if (ckdiv > 7)
12338 + return -EINVAL;
12339 + else
12340 + twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
12341 + | TWI_BF(CHDIV, cdiv)
12342 + | TWI_BF(CLDIV, cdiv));
12343 + return 0;
12344 +}
12345 +
12346 +/*
12347 + * Waits for the i2c status register to set the specified bitmask
12348 + * Returns 0 if timed out ... ~100ms is much longer than the SMBus
12349 + * limit, but I2C has no limit at all.
12350 + */
12351 +static int twi_complete(struct atmel_twi *twi, u32 mask)
12352 +{
12353 + int timeout = msecs_to_jiffies(100);
12354 +
12355 + mask |= TWI_BIT(TXCOMP);
12356 + twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
12357 + init_completion(&twi->comp);
12358 +
12359 + twi_writel(twi, IER, mask);
12360 +
12361 + if (!wait_for_completion_timeout(&twi->comp, timeout)) {
12362 + /* RESET TWI interface */
12363 + twi_writel(twi, CR, TWI_BIT(SWRST));
12364 +
12365 + /* Reinitialize TWI */
12366 + twi_hwinit(twi);
12367 +
12368 + return -ETIMEDOUT;
12369 + }
12370 + return 0;
12371 +}
12372 +
12373 +/*
12374 + * Generic i2c master transfer entrypoint.
12375 + */
12376 +static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
12377 +{
12378 + struct atmel_twi *twi = to_atmel_twi(adap);
12379 + int i;
12380 +
12381 + dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
12382 +
12383 + twi->status = 0;
12384 + for (i = 0; i < num; i++, pmsg++) {
12385 + twi->len = pmsg->len;
12386 + twi->buf = pmsg->buf;
12387 + twi->acks_left = pmsg->len;
12388 + twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
12389 + (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
12390 + twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
12391 +
12392 + dev_dbg(&adap->dev,
12393 + "#%d: %s %d byte%s %s dev 0x%02x\n",
12394 + i,
12395 + pmsg->flags & I2C_M_RD ? "reading" : "writing",
12396 + pmsg->len,
12397 + pmsg->len > 1 ? "s" : "",
12398 + pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
12399 +
12400 + /* enable */
12401 + twi_writel(twi, CR, TWI_BIT(MSEN));
12402 +
12403 + if (pmsg->flags & I2C_M_RD) {
12404 + /* cleanup after previous RX overruns */
12405 + while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
12406 + twi_readl(twi, RHR);
12407 +
12408 + if (twi->len == 1)
12409 + twi_writel(twi, CR,
12410 + TWI_BIT(START) | TWI_BIT(STOP));
12411 + else
12412 + twi_writel(twi, CR, TWI_BIT(START));
12413 +
12414 + if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
12415 + dev_dbg(&adap->dev, "RX[%d] timeout. "
12416 + "Stopped with %d bytes left\n",
12417 + i, twi->acks_left);
12418 + return -ETIMEDOUT;
12419 + }
12420 + } else {
12421 + twi_writel(twi, THR, twi->buf[0]);
12422 + twi->acks_left--;
12423 + /* REVISIT: some chips don't start automagically:
12424 + * twi_writel(twi, CR, TWI_BIT(START));
12425 + */
12426 + if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
12427 + dev_dbg(&adap->dev, "TX[%d] timeout. "
12428 + "Stopped with %d bytes left\n",
12429 + i, twi->acks_left);
12430 + return -ETIMEDOUT;
12431 + }
12432 + /* REVISIT: an erratum workaround may be needed here;
12433 + * see sam9261 "STOP not generated" (START either).
12434 + */
12435 + }
12436 +
12437 + /* Disable TWI interface */
12438 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12439 +
12440 + if (twi->status)
12441 + return twi->status;
12442 +
12443 + /* WARNING: This driver lies about properly supporting
12444 + * repeated start, or it would *ALWAYS* return here. It
12445 + * has issued a STOP. Continuing is a false claim -- that
12446 + * a second (or third, etc.) message is part of the same
12447 + * "combined" (no STOPs between parts) message.
12448 + */
12449 +
12450 + } /* end cur msg */
12451 +
12452 + return i;
12453 +}
12454 +
12455 +
12456 +static irqreturn_t twi_interrupt(int irq, void *dev_id)
12457 +{
12458 + struct atmel_twi *twi = dev_id;
12459 + int status = twi_readl(twi, SR);
12460 +
12461 + /* Save state for later debug prints */
12462 + int old_status = status;
12463 +
12464 + if (twi->mask & status) {
12465 +
12466 + status &= twi->mask;
12467 +
12468 + if (status & TWI_BIT(RXRDY)) {
12469 + if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
12470 + /* Note weakness in fault reporting model:
12471 + * we can't say "the first N of these data
12472 + * bytes are valid".
12473 + */
12474 + dev_err(&twi->adapter.dev,
12475 + "OVERRUN RX! %04x, lost %d\n",
12476 + old_status, twi->acks_left);
12477 + twi->acks_left = 0;
12478 + twi_writel(twi, CR, TWI_BIT(STOP));
12479 + twi->status = -EOVERFLOW;
12480 + } else if (twi->acks_left > 0) {
12481 + twi->buf[twi->len - twi->acks_left] =
12482 + twi_readl(twi, RHR);
12483 + twi->acks_left--;
12484 + }
12485 + if (status & TWI_BIT(TXCOMP))
12486 + goto done;
12487 + if (twi->acks_left == 1)
12488 + twi_writel(twi, CR, TWI_BIT(STOP));
12489 +
12490 + } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
12491 + goto done;
12492 +
12493 + } else if (status & TWI_BIT(TXRDY)) {
12494 + if (twi->acks_left > 0) {
12495 + twi_writel(twi, THR,
12496 + twi->buf[twi->len - twi->acks_left]);
12497 + twi->acks_left--;
12498 + } else
12499 + twi_writel(twi, CR, TWI_BIT(STOP));
12500 + }
12501 +
12502 + if (twi->acks_left == 0)
12503 + twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
12504 + }
12505 +
12506 + /* enabling this message helps trigger overruns/underruns ... */
12507 + dev_vdbg(&twi->adapter.dev,
12508 + "ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
12509 + old_status,
12510 + twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
12511 + twi->acks_left);
12512 +
12513 + return IRQ_HANDLED;
12514 +
12515 +done:
12516 + /* Note weak fault reporting model: we can't report how many
12517 + * bytes we sent before the NAK, or let upper layers choose
12518 + * whether to continue. The I2C stack doesn't allow that...
12519 + */
12520 + if (status & TWI_BIT(NACK)) {
12521 + dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
12522 + twi->acks_left);
12523 + twi->status = -EPIPE;
12524 +
12525 + /* TX underrun morphs automagically into a premature STOP;
12526 + * we'll probably observe UVRE even when it's not documented.
12527 + */
12528 + } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
12529 + dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n",
12530 + old_status, twi->acks_left);
12531 + twi->status = -ENOSR;
12532 + }
12533 +
12534 + twi_writel(twi, IDR, ~0UL);
12535 + complete(&twi->comp);
12536 +
12537 + dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
12538 + old_status, twi->acks_left, twi->status);
12539 +
12540 + return IRQ_HANDLED;
12541 +}
12542 +
12543 +
12544 +/*
12545 + * Return list of supported functionality.
12546 + *
12547 + * NOTE: see warning above about repeated starts; this driver is falsely
12548 + * claiming to support "combined" transfers. The mid-message STOPs mean
12549 + * some slaves will never work with this driver. (Use i2c-gpio...)
12550 + */
12551 +static u32 twi_func(struct i2c_adapter *adapter)
12552 +{
12553 + return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
12554 + & ~I2C_FUNC_SMBUS_QUICK;
12555 +}
12556 +
12557 +static struct i2c_algorithm twi_algorithm = {
12558 + .master_xfer = twi_xfer,
12559 + .functionality = twi_func,
12560 +};
12561 +
12562 +/*
12563 + * Main initialization routine.
12564 + */
12565 +static int __init twi_probe(struct platform_device *pdev)
12566 +{
12567 + struct atmel_twi *twi;
12568 + struct resource *regs;
12569 + struct clk *pclk;
12570 + struct i2c_adapter *adapter;
12571 + int rc, irq;
12572 +
12573 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12574 + if (!regs)
12575 + return -ENXIO;
12576 +
12577 + pclk = clk_get(&pdev->dev, "twi_pclk");
12578 + if (IS_ERR(pclk))
12579 + return PTR_ERR(pclk);
12580 + clk_enable(pclk);
12581 +
12582 + rc = -ENOMEM;
12583 + twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
12584 + if (!twi) {
12585 + dev_dbg(&pdev->dev, "can't allocate interface!\n");
12586 + goto err_alloc_twi;
12587 + }
12588 +
12589 + twi->pclk = pclk;
12590 + twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
12591 + if (!twi->regs)
12592 + goto err_ioremap;
12593 +
12594 + irq = platform_get_irq(pdev, 0);
12595 + rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
12596 + if (rc) {
12597 + dev_dbg(&pdev->dev, "can't bind irq!\n");
12598 + goto err_irq;
12599 + }
12600 + twi->irq = irq;
12601 +
12602 + rc = twi_hwinit(twi);
12603 + if (rc) {
12604 + dev_err(&pdev->dev, "Unable to set baudrate\n");
12605 + goto err_hw_init;
12606 + }
12607 +
12608 + adapter = &twi->adapter;
12609 + sprintf(adapter->name, "TWI");
12610 + adapter->algo = &twi_algorithm;
12611 + adapter->class = I2C_CLASS_ALL;
12612 + adapter->nr = pdev->id;
12613 + adapter->dev.parent = &pdev->dev;
12614 +
12615 + platform_set_drvdata(pdev, twi);
12616 +
12617 + rc = i2c_add_numbered_adapter(adapter);
12618 + if (rc) {
12619 + dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
12620 + adapter->name);
12621 + goto err_register;
12622 + }
12623 +
12624 + dev_info(&pdev->dev,
12625 + "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
12626 + baudrate/1000, (unsigned long)regs->start);
12627 +
12628 + return 0;
12629 +
12630 +
12631 +err_register:
12632 + platform_set_drvdata(pdev, NULL);
12633 +
12634 +err_hw_init:
12635 + free_irq(irq, twi);
12636 +
12637 +err_irq:
12638 + iounmap(twi->regs);
12639 +
12640 +err_ioremap:
12641 + kfree(twi);
12642 +
12643 +err_alloc_twi:
12644 + clk_disable(pclk);
12645 + clk_put(pclk);
12646 +
12647 + return rc;
12648 +}
12649 +
12650 +static int __exit twi_remove(struct platform_device *pdev)
12651 +{
12652 + struct atmel_twi *twi = platform_get_drvdata(pdev);
12653 + int res;
12654 +
12655 + platform_set_drvdata(pdev, NULL);
12656 + res = i2c_del_adapter(&twi->adapter);
12657 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12658 + iounmap(twi->regs);
12659 + clk_disable(twi->pclk);
12660 + clk_put(twi->pclk);
12661 + free_irq(twi->irq, twi);
12662 + kfree(twi);
12663 +
12664 + return res;
12665 +}
12666 +
12667 +static struct platform_driver twi_driver = {
12668 + .remove = __exit_p(twi_remove),
12669 + .driver = {
12670 + .name = "atmel_twi",
12671 + .owner = THIS_MODULE,
12672 + },
12673 +};
12674 +
12675 +static int __init atmel_twi_init(void)
12676 +{
12677 + return platform_driver_probe(&twi_driver, twi_probe);
12678 +}
12679 +
12680 +static void __exit atmel_twi_exit(void)
12681 +{
12682 + platform_driver_unregister(&twi_driver);
12683 +}
12684 +
12685 +module_init(atmel_twi_init);
12686 +module_exit(atmel_twi_exit);
12687 +
12688 +MODULE_AUTHOR("Espen Krangnes");
12689 +MODULE_DESCRIPTION("I2C driver for Atmel TWI");
12690 +MODULE_LICENSE("GPL");
12691 diff -urN linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.h avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.h
12692 --- linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.h 1970-01-01 01:00:00.000000000 +0100
12693 +++ avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.h 2008-04-23 19:33:37.000000000 +0200
12694 @@ -0,0 +1,117 @@
12695 +/*
12696 + * Register definitions for the Atmel Two-Wire Interface
12697 + */
12698 +
12699 +#ifndef __ATMELTWI_H__
12700 +#define __ATMELTWI_H__
12701 +
12702 +/* TWI register offsets */
12703 +#define TWI_CR 0x0000
12704 +#define TWI_MMR 0x0004
12705 +#define TWI_SMR 0x0008
12706 +#define TWI_IADR 0x000c
12707 +#define TWI_CWGR 0x0010
12708 +#define TWI_SR 0x0020
12709 +#define TWI_IER 0x0024
12710 +#define TWI_IDR 0x0028
12711 +#define TWI_IMR 0x002c
12712 +#define TWI_RHR 0x0030
12713 +#define TWI_THR 0x0034
12714 +
12715 +/* Bitfields in CR */
12716 +#define TWI_START_OFFSET 0
12717 +#define TWI_START_SIZE 1
12718 +#define TWI_STOP_OFFSET 1
12719 +#define TWI_STOP_SIZE 1
12720 +#define TWI_MSEN_OFFSET 2
12721 +#define TWI_MSEN_SIZE 1
12722 +#define TWI_MSDIS_OFFSET 3
12723 +#define TWI_MSDIS_SIZE 1
12724 +#define TWI_SVEN_OFFSET 4
12725 +#define TWI_SVEN_SIZE 1
12726 +#define TWI_SVDIS_OFFSET 5
12727 +#define TWI_SVDIS_SIZE 1
12728 +#define TWI_SWRST_OFFSET 7
12729 +#define TWI_SWRST_SIZE 1
12730 +
12731 +/* Bitfields in MMR */
12732 +#define TWI_IADRSZ_OFFSET 8
12733 +#define TWI_IADRSZ_SIZE 2
12734 +#define TWI_MREAD_OFFSET 12
12735 +#define TWI_MREAD_SIZE 1
12736 +#define TWI_DADR_OFFSET 16
12737 +#define TWI_DADR_SIZE 7
12738 +
12739 +/* Bitfields in SMR */
12740 +#define TWI_SADR_OFFSET 16
12741 +#define TWI_SADR_SIZE 7
12742 +
12743 +/* Bitfields in IADR */
12744 +#define TWI_IADR_OFFSET 0
12745 +#define TWI_IADR_SIZE 24
12746 +
12747 +/* Bitfields in CWGR */
12748 +#define TWI_CLDIV_OFFSET 0
12749 +#define TWI_CLDIV_SIZE 8
12750 +#define TWI_CHDIV_OFFSET 8
12751 +#define TWI_CHDIV_SIZE 8
12752 +#define TWI_CKDIV_OFFSET 16
12753 +#define TWI_CKDIV_SIZE 3
12754 +
12755 +/* Bitfields in SR */
12756 +#define TWI_TXCOMP_OFFSET 0
12757 +#define TWI_TXCOMP_SIZE 1
12758 +#define TWI_RXRDY_OFFSET 1
12759 +#define TWI_RXRDY_SIZE 1
12760 +#define TWI_TXRDY_OFFSET 2
12761 +#define TWI_TXRDY_SIZE 1
12762 +#define TWI_SVDIR_OFFSET 3
12763 +#define TWI_SVDIR_SIZE 1
12764 +#define TWI_SVACC_OFFSET 4
12765 +#define TWI_SVACC_SIZE 1
12766 +#define TWI_GCACC_OFFSET 5
12767 +#define TWI_GCACC_SIZE 1
12768 +#define TWI_OVRE_OFFSET 6
12769 +#define TWI_OVRE_SIZE 1
12770 +#define TWI_UNRE_OFFSET 7
12771 +#define TWI_UNRE_SIZE 1
12772 +#define TWI_NACK_OFFSET 8
12773 +#define TWI_NACK_SIZE 1
12774 +#define TWI_ARBLST_OFFSET 9
12775 +#define TWI_ARBLST_SIZE 1
12776 +
12777 +/* Bitfields in RHR */
12778 +#define TWI_RXDATA_OFFSET 0
12779 +#define TWI_RXDATA_SIZE 8
12780 +
12781 +/* Bitfields in THR */
12782 +#define TWI_TXDATA_OFFSET 0
12783 +#define TWI_TXDATA_SIZE 8
12784 +
12785 +/* Constants for IADRSZ */
12786 +#define TWI_IADRSZ_NO_ADDR 0
12787 +#define TWI_IADRSZ_ONE_BYTE 1
12788 +#define TWI_IADRSZ_TWO_BYTES 2
12789 +#define TWI_IADRSZ_THREE_BYTES 3
12790 +
12791 +/* Bit manipulation macros */
12792 +#define TWI_BIT(name) \
12793 + (1 << TWI_##name##_OFFSET)
12794 +#define TWI_BF(name, value) \
12795 + (((value) & ((1 << TWI_##name##_SIZE) - 1)) \
12796 + << TWI_##name##_OFFSET)
12797 +#define TWI_BFEXT(name, value) \
12798 + (((value) >> TWI_##name##_OFFSET) \
12799 + & ((1 << TWI_##name##_SIZE) - 1))
12800 +#define TWI_BFINS(name, value, old) \
12801 + (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \
12802 + << TWI_##name##_OFFSET)) \
12803 + | TWI_BF(name, (value)))
12804 +
12805 +/* Register access macros */
12806 +#define twi_readl(port, reg) \
12807 + __raw_readl((port)->regs + TWI_##reg)
12808 +#define twi_writel(port, reg, value) \
12809 + __raw_writel((value), (port)->regs + TWI_##reg)
12810 +
12811 +#endif /* __ATMELTWI_H__ */
12812 diff -urN linux-2.6.24.3/drivers/i2c/busses/Kconfig avr32-2.6/drivers/i2c/busses/Kconfig
12813 --- linux-2.6.24.3/drivers/i2c/busses/Kconfig 2008-02-26 01:20:20.000000000 +0100
12814 +++ avr32-2.6/drivers/i2c/busses/Kconfig 2008-04-23 20:12:40.000000000 +0200
12815 @@ -88,6 +88,14 @@
12816 to support combined I2C messages. Use the i2c-gpio driver
12817 unless your system can cope with those limitations.
12818
12819 +config I2C_ATMELTWI
12820 + tristate "Atmel Two-Wire Interface (TWI)"
12821 + depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
12822 + help
12823 + Atmel on-chip TWI controller. Say Y if you have an AT32 or
12824 + AT91-based device and want to use its built-in TWI
12825 + functionality.
12826 +
12827 config I2C_AU1550
12828 tristate "Au1550/Au1200 SMBus interface"
12829 depends on SOC_AU1550 || SOC_AU1200
12830 diff -urN linux-2.6.24.3/drivers/i2c/busses/Makefile avr32-2.6/drivers/i2c/busses/Makefile
12831 --- linux-2.6.24.3/drivers/i2c/busses/Makefile 2008-02-26 01:20:20.000000000 +0100
12832 +++ avr32-2.6/drivers/i2c/busses/Makefile 2008-04-23 20:12:40.000000000 +0200
12833 @@ -53,6 +53,7 @@
12834 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
12835 obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
12836 obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
12837 +obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o
12838
12839 ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
12840 EXTRA_CFLAGS += -DDEBUG
12841 diff -urN linux-2.6.24.3/drivers/input/serio/at32psif.c avr32-2.6/drivers/input/serio/at32psif.c
12842 --- linux-2.6.24.3/drivers/input/serio/at32psif.c 1970-01-01 01:00:00.000000000 +0100
12843 +++ avr32-2.6/drivers/input/serio/at32psif.c 2008-04-23 20:12:40.000000000 +0200
12844 @@ -0,0 +1,351 @@
12845 +/*
12846 + * Copyright (C) 2007 Atmel Corporation
12847 + *
12848 + * Driver for the AT32AP700X PS/2 controller (PSIF).
12849 + *
12850 + * This program is free software; you can redistribute it and/or modify it
12851 + * under the terms of the GNU General Public License version 2 as published
12852 + * by the Free Software Foundation.
12853 + */
12854 +#include <linux/kernel.h>
12855 +#include <linux/module.h>
12856 +#include <linux/device.h>
12857 +#include <linux/init.h>
12858 +#include <linux/serio.h>
12859 +#include <linux/timer.h>
12860 +#include <linux/interrupt.h>
12861 +#include <linux/err.h>
12862 +#include <linux/io.h>
12863 +#include <linux/clk.h>
12864 +#include <linux/platform_device.h>
12865 +
12866 +#include "at32psif.h"
12867 +
12868 +#define PSIF_BUF_SIZE 16
12869 +
12870 +#define ring_is_empty(_psif) (_psif->head == _psif->tail)
12871 +#define ring_next_head(_psif) ((_psif->head + 1) & (PSIF_BUF_SIZE - 1))
12872 +#define ring_next_tail(_psif) ((_psif->tail + 1) & (PSIF_BUF_SIZE - 1))
12873 +
12874 +struct psif {
12875 + struct platform_device *pdev;
12876 + struct clk *pclk;
12877 + struct serio *io;
12878 + struct timer_list tx_timer;
12879 + void __iomem *regs;
12880 + unsigned int irq;
12881 + unsigned int open;
12882 + /* Prevent concurrent writes to circular buffer. */
12883 + spinlock_t lock;
12884 + unsigned int head;
12885 + unsigned int tail;
12886 + unsigned char buffer[PSIF_BUF_SIZE];
12887 +};
12888 +
12889 +static irqreturn_t psif_interrupt(int irq, void *_ptr)
12890 +{
12891 + struct psif *psif = _ptr;
12892 + int retval = IRQ_NONE;
12893 + unsigned int io_flags = 0;
12894 + unsigned long status;
12895 +
12896 + status = psif_readl(psif, SR);
12897 +
12898 + if (status & PSIF_BIT(RXRDY)) {
12899 + unsigned char val = (unsigned char) psif_readl(psif, RHR);
12900 +
12901 + if (status & PSIF_BIT(PARITY))
12902 + io_flags |= SERIO_PARITY;
12903 + if (status & PSIF_BIT(OVRUN))
12904 + dev_err(&psif->pdev->dev, "overrun read error\n");
12905 +
12906 + serio_interrupt(psif->io, val, io_flags);
12907 +
12908 + retval = IRQ_HANDLED;
12909 + }
12910 +
12911 + spin_lock(&psif->lock);
12912 +
12913 + if (status & PSIF_BIT(TXEMPTY)) {
12914 + if (status & PSIF_BIT(NACK))
12915 + dev_err(&psif->pdev->dev, "NACK error\n");
12916 +
12917 + psif_writel(psif, IDR, PSIF_BIT(TXEMPTY));
12918 +
12919 + if (!ring_is_empty(psif))
12920 + mod_timer(&psif->tx_timer,
12921 + jiffies + msecs_to_jiffies(1));
12922 +
12923 + retval = IRQ_HANDLED;
12924 + }
12925 +
12926 + spin_unlock(&psif->lock);
12927 +
12928 + return retval;
12929 +}
12930 +
12931 +static void psif_transmit_data(unsigned long data)
12932 +{
12933 + struct psif *psif = (struct psif *)data;
12934 + unsigned long flags;
12935 +
12936 + spin_lock_irqsave(&psif->lock, flags);
12937 +
12938 + psif_writel(psif, THR, psif->buffer[psif->tail]);
12939 + psif->tail = ring_next_tail(psif);
12940 +
12941 + if (!ring_is_empty(psif))
12942 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12943 +
12944 + spin_unlock_irqrestore(&psif->lock, flags);
12945 +}
12946 +
12947 +static int psif_write(struct serio *io, unsigned char val)
12948 +{
12949 + struct psif *psif = io->port_data;
12950 + unsigned long flags;
12951 + unsigned int head;
12952 +
12953 + spin_lock_irqsave(&psif->lock, flags);
12954 +
12955 + head = ring_next_head(psif);
12956 +
12957 + if (head != psif->tail) {
12958 + psif->buffer[psif->head] = val;
12959 + psif->head = head;
12960 + } else {
12961 + dev_err(&psif->pdev->dev, "underrun write error\n");
12962 + }
12963 +
12964 + spin_unlock_irqrestore(&psif->lock, flags);
12965 +
12966 + /* Make sure TXEMPTY interrupt is enabled. */
12967 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12968 +
12969 + return 0;
12970 +}
12971 +
12972 +static int psif_open(struct serio *io)
12973 +{
12974 + struct psif *psif = io->port_data;
12975 + int retval;
12976 +
12977 + retval = clk_enable(psif->pclk);
12978 + if (retval)
12979 + goto out;
12980 +
12981 + psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
12982 + psif_writel(psif, IER, PSIF_BIT(RXRDY));
12983 +
12984 + psif->open = 1;
12985 +out:
12986 + return retval;
12987 +}
12988 +
12989 +static void psif_close(struct serio *io)
12990 +{
12991 + struct psif *psif = io->port_data;
12992 +
12993 + psif->open = 0;
12994 +
12995 + psif_writel(psif, IDR, ~0UL);
12996 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
12997 +
12998 + clk_disable(psif->pclk);
12999 +}
13000 +
13001 +static void psif_set_prescaler(struct psif *psif)
13002 +{
13003 + unsigned long prscv;
13004 + unsigned long rate = clk_get_rate(psif->pclk);
13005 +
13006 + /* PRSCV = Pulse length (100 us) * PSIF module frequency. */
13007 + prscv = 100 * (rate / 1000000UL);
13008 +
13009 + if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
13010 + prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
13011 + dev_dbg(&psif->pdev->dev, "pclk too fast, "
13012 + "prescaler set to max\n");
13013 + }
13014 +
13015 + clk_enable(psif->pclk);
13016 + psif_writel(psif, PSR, prscv);
13017 + clk_disable(psif->pclk);
13018 +}
13019 +
13020 +static int __init psif_probe(struct platform_device *pdev)
13021 +{
13022 + struct resource *regs;
13023 + struct psif *psif;
13024 + struct serio *io;
13025 + struct clk *pclk;
13026 + int irq;
13027 + int ret;
13028 +
13029 + psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
13030 + if (!psif) {
13031 + dev_dbg(&pdev->dev, "out of memory\n");
13032 + ret = -ENOMEM;
13033 + goto out;
13034 + }
13035 + psif->pdev = pdev;
13036 +
13037 + io = kzalloc(sizeof(struct serio), GFP_KERNEL);
13038 + if (!io) {
13039 + dev_dbg(&pdev->dev, "out of memory\n");
13040 + ret = -ENOMEM;
13041 + goto out_free_psif;
13042 + }
13043 + psif->io = io;
13044 +
13045 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13046 + if (!regs) {
13047 + dev_dbg(&pdev->dev, "no mmio resources defined\n");
13048 + ret = -ENOMEM;
13049 + goto out_free_io;
13050 + }
13051 +
13052 + psif->regs = ioremap(regs->start, regs->end - regs->start + 1);
13053 + if (!psif->regs) {
13054 + ret = -ENOMEM;
13055 + dev_dbg(&pdev->dev, "could not map I/O memory\n");
13056 + goto out_free_io;
13057 + }
13058 +
13059 + pclk = clk_get(&pdev->dev, "pclk");
13060 + if (IS_ERR(pclk)) {
13061 + dev_dbg(&pdev->dev, "could not get peripheral clock\n");
13062 + ret = PTR_ERR(pclk);
13063 + goto out_iounmap;
13064 + }
13065 + psif->pclk = pclk;
13066 +
13067 + /* Reset the PSIF to enter at a known state. */
13068 + ret = clk_enable(pclk);
13069 + if (ret) {
13070 + dev_dbg(&pdev->dev, "could not enable pclk\n");
13071 + goto out_put_clk;
13072 + }
13073 + psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
13074 + clk_disable(pclk);
13075 +
13076 + setup_timer(&psif->tx_timer, psif_transmit_data, (unsigned long)psif);
13077 +
13078 + irq = platform_get_irq(pdev, 0);
13079 + if (irq < 0) {
13080 + dev_dbg(&pdev->dev, "could not get irq\n");
13081 + ret = -ENXIO;
13082 + goto out_put_clk;
13083 + }
13084 + ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
13085 + if (ret) {
13086 + dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
13087 + goto out_put_clk;
13088 + }
13089 + psif->irq = irq;
13090 +
13091 + io->id.type = SERIO_8042;
13092 + io->write = psif_write;
13093 + io->open = psif_open;
13094 + io->close = psif_close;
13095 + strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name));
13096 + strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys));
13097 + io->port_data = psif;
13098 + io->dev.parent = &pdev->dev;
13099 +
13100 + psif_set_prescaler(psif);
13101 +
13102 + spin_lock_init(&psif->lock);
13103 + serio_register_port(psif->io);
13104 + platform_set_drvdata(pdev, psif);
13105 +
13106 + dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
13107 + (int)psif->regs, psif->irq);
13108 +
13109 + return 0;
13110 +
13111 +out_put_clk:
13112 + clk_put(psif->pclk);
13113 +out_iounmap:
13114 + iounmap(psif->regs);
13115 +out_free_io:
13116 + kfree(io);
13117 +out_free_psif:
13118 + kfree(psif);
13119 +out:
13120 + return ret;
13121 +}
13122 +
13123 +static int __exit psif_remove(struct platform_device *pdev)
13124 +{
13125 + struct psif *psif = platform_get_drvdata(pdev);
13126 +
13127 + psif_writel(psif, IDR, ~0UL);
13128 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
13129 +
13130 + serio_unregister_port(psif->io);
13131 + iounmap(psif->regs);
13132 + free_irq(psif->irq, psif);
13133 + clk_put(psif->pclk);
13134 + kfree(psif);
13135 +
13136 + platform_set_drvdata(pdev, NULL);
13137 +
13138 + return 0;
13139 +}
13140 +
13141 +#ifdef CONFIG_PM
13142 +static int psif_suspend(struct platform_device *pdev, pm_message_t state)
13143 +{
13144 + struct psif *psif = platform_get_drvdata(pdev);
13145 +
13146 + if (psif->open) {
13147 + psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
13148 + clk_disable(psif->pclk);
13149 + }
13150 +
13151 + return 0;
13152 +}
13153 +
13154 +static int psif_resume(struct platform_device *pdev)
13155 +{
13156 + struct psif *psif = platform_get_drvdata(pdev);
13157 +
13158 + if (psif->open) {
13159 + clk_enable(psif->pclk);
13160 + psif_set_prescaler(psif);
13161 + psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
13162 + }
13163 +
13164 + return 0;
13165 +}
13166 +#else
13167 +#define psif_suspend NULL
13168 +#define psif_resume NULL
13169 +#endif
13170 +
13171 +static struct platform_driver psif_driver = {
13172 + .remove = __exit_p(psif_remove),
13173 + .driver = {
13174 + .name = "atmel_psif",
13175 + },
13176 + .suspend = psif_suspend,
13177 + .resume = psif_resume,
13178 +};
13179 +
13180 +static int __init psif_init(void)
13181 +{
13182 + return platform_driver_probe(&psif_driver, psif_probe);
13183 +}
13184 +
13185 +static void __exit psif_exit(void)
13186 +{
13187 + platform_driver_unregister(&psif_driver);
13188 +}
13189 +
13190 +module_init(psif_init);
13191 +module_exit(psif_exit);
13192 +
13193 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
13194 +MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
13195 +MODULE_LICENSE("GPL");
13196 diff -urN linux-2.6.24.3/drivers/input/serio/at32psif.h avr32-2.6/drivers/input/serio/at32psif.h
13197 --- linux-2.6.24.3/drivers/input/serio/at32psif.h 1970-01-01 01:00:00.000000000 +0100
13198 +++ avr32-2.6/drivers/input/serio/at32psif.h 2008-04-23 20:12:40.000000000 +0200
13199 @@ -0,0 +1,82 @@
13200 +/*
13201 + * Copyright (C) 2007 Atmel Corporation
13202 + *
13203 + * Driver for the AT32AP700X PS/2 controller (PSIF).
13204 + *
13205 + * This program is free software; you can redistribute it and/or modify it
13206 + * under the terms of the GNU General Public License version 2 as published
13207 + * by the Free Software Foundation.
13208 + */
13209 +
13210 +#ifndef _AT32PSIF_H
13211 +#define _AT32PSIF_H
13212 +
13213 +/* PSIF register offsets */
13214 +#define PSIF_CR 0x00
13215 +#define PSIF_RHR 0x04
13216 +#define PSIF_THR 0x08
13217 +#define PSIF_SR 0x10
13218 +#define PSIF_IER 0x14
13219 +#define PSIF_IDR 0x18
13220 +#define PSIF_IMR 0x1c
13221 +#define PSIF_PSR 0x24
13222 +
13223 +/* Bitfields in control register. */
13224 +#define PSIF_CR_RXDIS_OFFSET 1
13225 +#define PSIF_CR_RXDIS_SIZE 1
13226 +#define PSIF_CR_RXEN_OFFSET 0
13227 +#define PSIF_CR_RXEN_SIZE 1
13228 +#define PSIF_CR_SWRST_OFFSET 15
13229 +#define PSIF_CR_SWRST_SIZE 1
13230 +#define PSIF_CR_TXDIS_OFFSET 9
13231 +#define PSIF_CR_TXDIS_SIZE 1
13232 +#define PSIF_CR_TXEN_OFFSET 8
13233 +#define PSIF_CR_TXEN_SIZE 1
13234 +
13235 +/* Bitfields in interrupt disable, enable, mask and status register. */
13236 +#define PSIF_NACK_OFFSET 8
13237 +#define PSIF_NACK_SIZE 1
13238 +#define PSIF_OVRUN_OFFSET 5
13239 +#define PSIF_OVRUN_SIZE 1
13240 +#define PSIF_PARITY_OFFSET 9
13241 +#define PSIF_PARITY_SIZE 1
13242 +#define PSIF_RXRDY_OFFSET 4
13243 +#define PSIF_RXRDY_SIZE 1
13244 +#define PSIF_TXEMPTY_OFFSET 1
13245 +#define PSIF_TXEMPTY_SIZE 1
13246 +#define PSIF_TXRDY_OFFSET 0
13247 +#define PSIF_TXRDY_SIZE 1
13248 +
13249 +/* Bitfields in prescale register. */
13250 +#define PSIF_PSR_PRSCV_OFFSET 0
13251 +#define PSIF_PSR_PRSCV_SIZE 12
13252 +
13253 +/* Bitfields in receive hold register. */
13254 +#define PSIF_RHR_RXDATA_OFFSET 0
13255 +#define PSIF_RHR_RXDATA_SIZE 8
13256 +
13257 +/* Bitfields in transmit hold register. */
13258 +#define PSIF_THR_TXDATA_OFFSET 0
13259 +#define PSIF_THR_TXDATA_SIZE 8
13260 +
13261 +/* Bit manipulation macros */
13262 +#define PSIF_BIT(name) \
13263 + (1 << PSIF_##name##_OFFSET)
13264 +#define PSIF_BF(name, value) \
13265 + (((value) & ((1 << PSIF_##name##_SIZE) - 1)) \
13266 + << PSIF_##name##_OFFSET)
13267 +#define PSIF_BFEXT(name, value)\
13268 + (((value) >> PSIF_##name##_OFFSET) \
13269 + & ((1 << PSIF_##name##_SIZE) - 1))
13270 +#define PSIF_BFINS(name, value, old) \
13271 + (((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \
13272 + << PSIF_##name##_OFFSET)) \
13273 + | PSIF_BF(name, value))
13274 +
13275 +/* Register access macros */
13276 +#define psif_readl(port, reg) \
13277 + __raw_readl((port)->regs + PSIF_##reg)
13278 +#define psif_writel(port, reg, value) \
13279 + __raw_writel((value), (port)->regs + PSIF_##reg)
13280 +
13281 +#endif /* _AT32PSIF_H */
13282 diff -urN linux-2.6.24.3/drivers/input/serio/Kconfig avr32-2.6/drivers/input/serio/Kconfig
13283 --- linux-2.6.24.3/drivers/input/serio/Kconfig 2008-02-26 01:20:20.000000000 +0100
13284 +++ avr32-2.6/drivers/input/serio/Kconfig 2008-04-23 20:12:40.000000000 +0200
13285 @@ -88,6 +88,17 @@
13286 To compile this driver as a module, choose M here: the
13287 module will be called rpckbd.
13288
13289 +config SERIO_AT32PSIF
13290 + tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
13291 + depends on AVR32
13292 + default n
13293 + help
13294 + Say Y here if you want to use the PSIF peripheral on AVR32 devices
13295 + and connect a PS/2 keyboard and/or mouse to it.
13296 +
13297 + To compile this driver as a module, choose M here: the module will
13298 + be called at32psif.
13299 +
13300 config SERIO_AMBAKMI
13301 tristate "AMBA KMI keyboard controller"
13302 depends on ARM_AMBA
13303 diff -urN linux-2.6.24.3/drivers/input/serio/Makefile avr32-2.6/drivers/input/serio/Makefile
13304 --- linux-2.6.24.3/drivers/input/serio/Makefile 2008-02-26 01:20:20.000000000 +0100
13305 +++ avr32-2.6/drivers/input/serio/Makefile 2008-04-23 20:12:40.000000000 +0200
13306 @@ -12,6 +12,7 @@
13307 obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o
13308 obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o
13309 obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o
13310 +obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o
13311 obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o
13312 obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o
13313 obj-$(CONFIG_HP_SDC) += hp_sdc.o
13314 diff -urN linux-2.6.24.3/drivers/leds/Kconfig avr32-2.6/drivers/leds/Kconfig
13315 --- linux-2.6.24.3/drivers/leds/Kconfig 2008-02-26 01:20:20.000000000 +0100
13316 +++ avr32-2.6/drivers/leds/Kconfig 2008-04-23 20:12:41.000000000 +0200
13317 @@ -18,6 +18,13 @@
13318
13319 comment "LED drivers"
13320
13321 +config LEDS_ATMEL_PWM
13322 + tristate "LED Support using Atmel PWM outputs"
13323 + depends on LEDS_CLASS && ATMEL_PWM
13324 + help
13325 + This option enables support for LEDs driven using outputs
13326 + of the dedicated PWM controller found on newer Atmel SOCs.
13327 +
13328 config LEDS_CORGI
13329 tristate "LED Support for the Sharp SL-C7x0 series"
13330 depends on LEDS_CLASS && PXA_SHARP_C7xx
13331 diff -urN linux-2.6.24.3/drivers/leds/leds-atmel-pwm.c avr32-2.6/drivers/leds/leds-atmel-pwm.c
13332 --- linux-2.6.24.3/drivers/leds/leds-atmel-pwm.c 1970-01-01 01:00:00.000000000 +0100
13333 +++ avr32-2.6/drivers/leds/leds-atmel-pwm.c 2008-04-23 19:33:39.000000000 +0200
13334 @@ -0,0 +1,155 @@
13335 +#include <linux/kernel.h>
13336 +#include <linux/platform_device.h>
13337 +#include <linux/leds.h>
13338 +#include <linux/io.h>
13339 +#include <linux/atmel_pwm.h>
13340 +
13341 +
13342 +struct pwmled {
13343 + struct led_classdev cdev;
13344 + struct pwm_channel pwmc;
13345 + struct gpio_led *desc;
13346 + u32 mult;
13347 + u8 active_low;
13348 +};
13349 +
13350 +
13351 +/*
13352 + * For simplicity, we use "brightness" as if it were a linear function
13353 + * of PWM duty cycle. However, a logarithmic function of duty cycle is
13354 + * probably a better match for perceived brightness: two is half as bright
13355 + * as four, four is half as bright as eight, etc
13356 + */
13357 +static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
13358 +{
13359 + struct pwmled *led;
13360 +
13361 + /* update the duty cycle for the *next* period */
13362 + led = container_of(cdev, struct pwmled, cdev);
13363 + pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
13364 +}
13365 +
13366 +/*
13367 + * NOTE: we reuse the platform_data structure of GPIO leds,
13368 + * but repurpose its "gpio" number as a PWM channel number.
13369 + */
13370 +static int __init pwmled_probe(struct platform_device *pdev)
13371 +{
13372 + const struct gpio_led_platform_data *pdata;
13373 + struct pwmled *leds;
13374 + unsigned i;
13375 + int status;
13376 +
13377 + pdata = pdev->dev.platform_data;
13378 + if (!pdata || pdata->num_leds < 1)
13379 + return -ENODEV;
13380 +
13381 + leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
13382 + if (!leds)
13383 + return -ENOMEM;
13384 +
13385 + for (i = 0; i < pdata->num_leds; i++) {
13386 + struct pwmled *led = leds + i;
13387 + const struct gpio_led *dat = pdata->leds + i;
13388 + u32 tmp;
13389 +
13390 + led->cdev.name = dat->name;
13391 + led->cdev.brightness = LED_OFF;
13392 + led->cdev.brightness_set = pwmled_brightness;
13393 + led->cdev.default_trigger = dat->default_trigger;
13394 +
13395 + led->active_low = dat->active_low;
13396 +
13397 + status = pwm_channel_alloc(dat->gpio, &led->pwmc);
13398 + if (status < 0)
13399 + goto err;
13400 +
13401 + /*
13402 + * Prescale clock by 2^x, so PWM counts in low MHz.
13403 + * Start each cycle with the LED active, so increasing
13404 + * the duty cycle gives us more time on (== brighter).
13405 + */
13406 + tmp = 5;
13407 + if (!led->active_low)
13408 + tmp |= PWM_CPR_CPOL;
13409 + pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
13410 +
13411 + /*
13412 + * Pick a period so PWM cycles at 100+ Hz; and a multiplier
13413 + * for scaling duty cycle: brightness * mult.
13414 + */
13415 + tmp = (led->pwmc.mck / (1 << 5)) / 100;
13416 + tmp /= 255;
13417 + led->mult = tmp;
13418 + pwm_channel_writel(&led->pwmc, PWM_CDTY,
13419 + led->cdev.brightness * 255);
13420 + pwm_channel_writel(&led->pwmc, PWM_CPRD,
13421 + LED_FULL * tmp);
13422 +
13423 + pwm_channel_enable(&led->pwmc);
13424 +
13425 + /* Hand it over to the LED framework */
13426 + status = led_classdev_register(&pdev->dev, &led->cdev);
13427 + if (status < 0) {
13428 + pwm_channel_free(&led->pwmc);
13429 + goto err;
13430 + }
13431 + }
13432 +
13433 + platform_set_drvdata(pdev, leds);
13434 + return 0;
13435 +
13436 +err:
13437 + while (i-- > 0) {
13438 + led_classdev_unregister(&leds[i].cdev);
13439 + pwm_channel_free(&leds[i].pwmc);
13440 + }
13441 + kfree(leds);
13442 +
13443 + return status;
13444 +}
13445 +
13446 +static int __exit pwmled_remove(struct platform_device *pdev)
13447 +{
13448 + const struct gpio_led_platform_data *pdata;
13449 + struct pwmled *leds;
13450 + unsigned i;
13451 +
13452 + pdata = pdev->dev.platform_data;
13453 + leds = platform_get_drvdata(pdev);
13454 +
13455 + for (i = 0; i < pdata->num_leds; i++) {
13456 + struct pwmled *led = leds + i;
13457 +
13458 + led_classdev_unregister(&led->cdev);
13459 + pwm_channel_free(&led->pwmc);
13460 + }
13461 +
13462 + kfree(leds);
13463 + platform_set_drvdata(pdev, NULL);
13464 + return 0;
13465 +}
13466 +
13467 +static struct platform_driver pwmled_driver = {
13468 + .driver = {
13469 + .name = "leds-atmel-pwm",
13470 + .owner = THIS_MODULE,
13471 + },
13472 + /* REVISIT add suspend() and resume() methods */
13473 + .remove = __exit_p(pwmled_remove),
13474 +};
13475 +
13476 +static int __init modinit(void)
13477 +{
13478 + return platform_driver_probe(&pwmled_driver, pwmled_probe);
13479 +}
13480 +module_init(modinit);
13481 +
13482 +static void __exit modexit(void)
13483 +{
13484 + platform_driver_unregister(&pwmled_driver);
13485 +}
13486 +module_exit(modexit);
13487 +
13488 +MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
13489 +MODULE_LICENSE("GPL");
13490 diff -urN linux-2.6.24.3/drivers/leds/Makefile avr32-2.6/drivers/leds/Makefile
13491 --- linux-2.6.24.3/drivers/leds/Makefile 2008-02-26 01:20:20.000000000 +0100
13492 +++ avr32-2.6/drivers/leds/Makefile 2008-04-23 20:12:41.000000000 +0200
13493 @@ -5,6 +5,7 @@
13494 obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
13495
13496 # LED Platform Drivers
13497 +obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o
13498 obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
13499 obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
13500 obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
13501 diff -urN linux-2.6.24.3/drivers/misc/atmel_pwm.c avr32-2.6/drivers/misc/atmel_pwm.c
13502 --- linux-2.6.24.3/drivers/misc/atmel_pwm.c 1970-01-01 01:00:00.000000000 +0100
13503 +++ avr32-2.6/drivers/misc/atmel_pwm.c 2008-04-23 19:33:40.000000000 +0200
13504 @@ -0,0 +1,409 @@
13505 +#include <linux/module.h>
13506 +#include <linux/clk.h>
13507 +#include <linux/err.h>
13508 +#include <linux/io.h>
13509 +#include <linux/interrupt.h>
13510 +#include <linux/platform_device.h>
13511 +#include <linux/atmel_pwm.h>
13512 +
13513 +
13514 +/*
13515 + * This is a simple driver for the PWM controller found in various newer
13516 + * Atmel SOCs, including the AVR32 series and the AT91sam9263.
13517 + *
13518 + * Chips with current Linux ports have only 4 PWM channels, out of max 32.
13519 + * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
13520 + * Docs are inconsistent about the width of the channel counter registers;
13521 + * it's at least 16 bits, but several places say 20 bits.
13522 + */
13523 +#define PWM_NCHAN 4 /* max 32 */
13524 +
13525 +struct pwm {
13526 + spinlock_t lock;
13527 + struct platform_device *pdev;
13528 + u32 mask;
13529 + int irq;
13530 + void __iomem *base;
13531 + struct clk *clk;
13532 + struct pwm_channel *channel[PWM_NCHAN];
13533 + void (*handler[PWM_NCHAN])(struct pwm_channel *);
13534 +};
13535 +
13536 +
13537 +/* global PWM controller registers */
13538 +#define PWM_MR 0x00
13539 +#define PWM_ENA 0x04
13540 +#define PWM_DIS 0x08
13541 +#define PWM_SR 0x0c
13542 +#define PWM_IER 0x10
13543 +#define PWM_IDR 0x14
13544 +#define PWM_IMR 0x18
13545 +#define PWM_ISR 0x1c
13546 +
13547 +static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
13548 +{
13549 + __raw_writel(val, p->base + offset);
13550 +}
13551 +
13552 +static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
13553 +{
13554 + return __raw_readl(p->base + offset);
13555 +}
13556 +
13557 +static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
13558 +{
13559 + return p->base + 0x200 + index * 0x20;
13560 +}
13561 +
13562 +static struct pwm *pwm;
13563 +
13564 +static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
13565 +{
13566 + struct device *dev = &pwm->pdev->dev;
13567 +
13568 + dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
13569 + tag,
13570 + pwm_readl(pwm, PWM_MR),
13571 + pwm_readl(pwm, PWM_SR),
13572 + pwm_readl(pwm, PWM_IMR));
13573 + dev_dbg(dev,
13574 + "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
13575 + ch->index,
13576 + pwm_channel_readl(ch, PWM_CMR),
13577 + pwm_channel_readl(ch, PWM_CDTY),
13578 + pwm_channel_readl(ch, PWM_CPRD),
13579 + pwm_channel_readl(ch, PWM_CCNT));
13580 +}
13581 +
13582 +
13583 +/**
13584 + * pwm_channel_alloc - allocate an unused PWM channel
13585 + * @index: identifies the channel
13586 + * @ch: structure to be initialized
13587 + *
13588 + * Drivers allocate PWM channels according to the board's wiring, and
13589 + * matching board-specific setup code. Returns zero or negative errno.
13590 + */
13591 +int pwm_channel_alloc(int index, struct pwm_channel *ch)
13592 +{
13593 + unsigned long flags;
13594 + int status = 0;
13595 +
13596 + /* insist on PWM init, with this signal pinned out */
13597 + if (!pwm || !(pwm->mask & 1 << index))
13598 + return -ENODEV;
13599 +
13600 + if (index < 0 || index >= PWM_NCHAN || !ch)
13601 + return -EINVAL;
13602 + memset(ch, 0, sizeof *ch);
13603 +
13604 + spin_lock_irqsave(&pwm->lock, flags);
13605 + if (pwm->channel[index])
13606 + status = -EBUSY;
13607 + else {
13608 + clk_enable(pwm->clk);
13609 +
13610 + ch->regs = pwmc_regs(pwm, index);
13611 + ch->index = index;
13612 +
13613 + /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
13614 + ch->mck = clk_get_rate(pwm->clk);
13615 +
13616 + pwm->channel[index] = ch;
13617 + pwm->handler[index] = NULL;
13618 +
13619 + /* channel and irq are always disabled when we return */
13620 + pwm_writel(pwm, PWM_DIS, 1 << index);
13621 + pwm_writel(pwm, PWM_IDR, 1 << index);
13622 + }
13623 + spin_unlock_irqrestore(&pwm->lock, flags);
13624 + return status;
13625 +}
13626 +EXPORT_SYMBOL(pwm_channel_alloc);
13627 +
13628 +static int pwmcheck(struct pwm_channel *ch)
13629 +{
13630 + int index;
13631 +
13632 + if (!pwm)
13633 + return -ENODEV;
13634 + if (!ch)
13635 + return -EINVAL;
13636 + index = ch->index;
13637 + if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
13638 + return -EINVAL;
13639 +
13640 + return index;
13641 +}
13642 +
13643 +/**
13644 + * pwm_channel_free - release a previously allocated channel
13645 + * @ch: the channel being released
13646 + *
13647 + * The channel is completely shut down (counter and IRQ disabled),
13648 + * and made available for re-use. Returns zero, or negative errno.
13649 + */
13650 +int pwm_channel_free(struct pwm_channel *ch)
13651 +{
13652 + unsigned long flags;
13653 + int t;
13654 +
13655 + spin_lock_irqsave(&pwm->lock, flags);
13656 + t = pwmcheck(ch);
13657 + if (t >= 0) {
13658 + pwm->channel[t] = NULL;
13659 + pwm->handler[t] = NULL;
13660 +
13661 + /* channel and irq are always disabled when we return */
13662 + pwm_writel(pwm, PWM_DIS, 1 << t);
13663 + pwm_writel(pwm, PWM_IDR, 1 << t);
13664 +
13665 + clk_disable(pwm->clk);
13666 + t = 0;
13667 + }
13668 + spin_unlock_irqrestore(&pwm->lock, flags);
13669 + return t;
13670 +}
13671 +EXPORT_SYMBOL(pwm_channel_free);
13672 +
13673 +int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
13674 +{
13675 + unsigned long flags;
13676 + int t;
13677 +
13678 + /* OMITTED FUNCTIONALITY: starting several channels in synch */
13679 +
13680 + spin_lock_irqsave(&pwm->lock, flags);
13681 + t = pwmcheck(ch);
13682 + if (t >= 0) {
13683 + pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
13684 + t = 0;
13685 + pwm_dumpregs(ch, enabled ? "enable" : "disable");
13686 + }
13687 + spin_unlock_irqrestore(&pwm->lock, flags);
13688 +
13689 + return t;
13690 +}
13691 +EXPORT_SYMBOL(__pwm_channel_onoff);
13692 +
13693 +/**
13694 + * pwm_clk_alloc - allocate and configure CLKA or CLKB
13695 + * @prescale: from 0..10, the power of two used to divide MCK
13696 + * @div: from 1..255, the linear divisor to use
13697 + *
13698 + * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
13699 + * clock will run with a period of (2^prescale * div) / MCK, or twice as
13700 + * long if center aligned PWM output is used. The clock must later be
13701 + * deconfigured using pwm_clk_free().
13702 + */
13703 +int pwm_clk_alloc(unsigned prescale, unsigned div)
13704 +{
13705 + unsigned long flags;
13706 + u32 mr;
13707 + u32 val = (prescale << 8) | div;
13708 + int ret = -EBUSY;
13709 +
13710 + if (prescale >= 10 || div == 0 || div > 255)
13711 + return -EINVAL;
13712 +
13713 + spin_lock_irqsave(&pwm->lock, flags);
13714 + mr = pwm_readl(pwm, PWM_MR);
13715 + if ((mr & 0xffff) == 0) {
13716 + mr |= val;
13717 + ret = PWM_CPR_CLKA;
13718 + }
13719 + if ((mr & (0xffff << 16)) == 0) {
13720 + mr |= val << 16;
13721 + ret = PWM_CPR_CLKB;
13722 + }
13723 + if (ret > 0)
13724 + pwm_writel(pwm, PWM_MR, mr);
13725 + spin_unlock_irqrestore(&pwm->lock, flags);
13726 + return ret;
13727 +}
13728 +EXPORT_SYMBOL(pwm_clk_alloc);
13729 +
13730 +/**
13731 + * pwm_clk_free - deconfigure and release CLKA or CLKB
13732 + *
13733 + * Reverses the effect of pwm_clk_alloc().
13734 + */
13735 +void pwm_clk_free(unsigned clk)
13736 +{
13737 + unsigned long flags;
13738 + u32 mr;
13739 +
13740 + spin_lock_irqsave(&pwm->lock, flags);
13741 + mr = pwm_readl(pwm, PWM_MR);
13742 + if (clk == PWM_CPR_CLKA)
13743 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
13744 + if (clk == PWM_CPR_CLKB)
13745 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
13746 + spin_unlock_irqrestore(&pwm->lock, flags);
13747 +}
13748 +EXPORT_SYMBOL(pwm_clk_free);
13749 +
13750 +/**
13751 + * pwm_channel_handler - manage channel's IRQ handler
13752 + * @ch: the channel
13753 + * @handler: the handler to use, possibly NULL
13754 + *
13755 + * If the handler is non-null, the handler will be called after every
13756 + * period of this PWM channel. If the handler is null, this channel
13757 + * won't generate an IRQ.
13758 + */
13759 +int pwm_channel_handler(struct pwm_channel *ch,
13760 + void (*handler)(struct pwm_channel *ch))
13761 +{
13762 + unsigned long flags;
13763 + int t;
13764 +
13765 + spin_lock_irqsave(&pwm->lock, flags);
13766 + t = pwmcheck(ch);
13767 + if (t >= 0) {
13768 + pwm->handler[t] = handler;
13769 + pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
13770 + t = 0;
13771 + }
13772 + spin_unlock_irqrestore(&pwm->lock, flags);
13773 +
13774 + return t;
13775 +}
13776 +EXPORT_SYMBOL(pwm_channel_handler);
13777 +
13778 +static irqreturn_t pwm_irq(int id, void *_pwm)
13779 +{
13780 + struct pwm *p = _pwm;
13781 + irqreturn_t handled = IRQ_NONE;
13782 + u32 irqstat;
13783 + int index;
13784 +
13785 + spin_lock(&p->lock);
13786 +
13787 + /* ack irqs, then handle them */
13788 + irqstat = pwm_readl(pwm, PWM_ISR);
13789 +
13790 + while (irqstat) {
13791 + struct pwm_channel *ch;
13792 + void (*handler)(struct pwm_channel *ch);
13793 +
13794 + index = ffs(irqstat) - 1;
13795 + irqstat &= ~(1 << index);
13796 + ch = pwm->channel[index];
13797 + handler = pwm->handler[index];
13798 + if (handler && ch) {
13799 + spin_unlock(&p->lock);
13800 + handler(ch);
13801 + spin_lock(&p->lock);
13802 + handled = IRQ_HANDLED;
13803 + }
13804 + }
13805 +
13806 + spin_unlock(&p->lock);
13807 + return handled;
13808 +}
13809 +
13810 +static int __init pwm_probe(struct platform_device *pdev)
13811 +{
13812 + struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13813 + int irq = platform_get_irq(pdev, 0);
13814 + u32 *mp = pdev->dev.platform_data;
13815 + struct pwm *p;
13816 + int status = -EIO;
13817 +
13818 + if (pwm)
13819 + return -EBUSY;
13820 + if (!r || irq < 0 || !mp || !*mp)
13821 + return -ENODEV;
13822 + if (*mp & ~((1<<PWM_NCHAN)-1)) {
13823 + dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
13824 + *mp, PWM_NCHAN);
13825 + return -EINVAL;
13826 + }
13827 +
13828 + p = kzalloc(sizeof(*p), GFP_KERNEL);
13829 + if (!p)
13830 + return -ENOMEM;
13831 +
13832 + spin_lock_init(&p->lock);
13833 + p->pdev = pdev;
13834 + p->mask = *mp;
13835 + p->irq = irq;
13836 + p->base = ioremap(r->start, r->end - r->start + 1);
13837 + if (!p->base)
13838 + goto fail;
13839 + p->clk = clk_get(&pdev->dev, "mck");
13840 + if (IS_ERR(p->clk)) {
13841 + status = PTR_ERR(p->clk);
13842 + p->clk = NULL;
13843 + goto fail;
13844 + }
13845 +
13846 + status = request_irq(irq, pwm_irq, 0, pdev->name, p);
13847 + if (status < 0)
13848 + goto fail;
13849 +
13850 + pwm = p;
13851 + platform_set_drvdata(pdev, p);
13852 +
13853 + return 0;
13854 +
13855 +fail:
13856 + if (p->clk)
13857 + clk_put(p->clk);
13858 + if (p->base)
13859 + iounmap(p->base);
13860 +
13861 + kfree(p);
13862 + return status;
13863 +}
13864 +
13865 +static int __exit pwm_remove(struct platform_device *pdev)
13866 +{
13867 + struct pwm *p = platform_get_drvdata(pdev);
13868 +
13869 + if (p != pwm)
13870 + return -EINVAL;
13871 +
13872 + clk_enable(pwm->clk);
13873 + pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
13874 + pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
13875 + clk_disable(pwm->clk);
13876 +
13877 + pwm = NULL;
13878 +
13879 + free_irq(p->irq, p);
13880 + clk_put(p->clk);
13881 + iounmap(p->base);
13882 + kfree(p);
13883 +
13884 + return 0;
13885 +}
13886 +
13887 +static struct platform_driver atmel_pwm_driver = {
13888 + .driver = {
13889 + .name = "atmel_pwm",
13890 + .owner = THIS_MODULE,
13891 + },
13892 + .remove = __exit_p(pwm_remove),
13893 +
13894 + /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
13895 + * and all AT91sam9263 states, albeit at reduced clock rate if
13896 + * MCK becomes the slow clock (i.e. what Linux labels STR).
13897 + */
13898 +};
13899 +
13900 +static int __init pwm_init(void)
13901 +{
13902 + return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
13903 +}
13904 +module_init(pwm_init);
13905 +
13906 +static void __exit pwm_exit(void)
13907 +{
13908 + platform_driver_unregister(&atmel_pwm_driver);
13909 +}
13910 +module_exit(pwm_exit);
13911 +
13912 +MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
13913 +MODULE_LICENSE("GPL");
13914 diff -urN linux-2.6.24.3/drivers/misc/atmel_tclib.c avr32-2.6/drivers/misc/atmel_tclib.c
13915 --- linux-2.6.24.3/drivers/misc/atmel_tclib.c 1970-01-01 01:00:00.000000000 +0100
13916 +++ avr32-2.6/drivers/misc/atmel_tclib.c 2008-04-23 20:12:41.000000000 +0200
13917 @@ -0,0 +1,161 @@
13918 +#include <linux/atmel_tc.h>
13919 +#include <linux/clk.h>
13920 +#include <linux/err.h>
13921 +#include <linux/init.h>
13922 +#include <linux/io.h>
13923 +#include <linux/ioport.h>
13924 +#include <linux/kernel.h>
13925 +#include <linux/platform_device.h>
13926 +
13927 +/* Number of bytes to reserve for the iomem resource */
13928 +#define ATMEL_TC_IOMEM_SIZE 256
13929 +
13930 +
13931 +/*
13932 + * This is a thin library to solve the problem of how to portably allocate
13933 + * one of the TC blocks. For simplicity, it doesn't currently expect to
13934 + * share individual timers between different drivers.
13935 + */
13936 +
13937 +#if defined(CONFIG_AVR32)
13938 +/* AVR32 has these divide PBB */
13939 +const u8 atmel_tc_divisors[5] = { 0, 4, 8, 16, 32, };
13940 +EXPORT_SYMBOL(atmel_tc_divisors);
13941 +
13942 +#elif defined(CONFIG_ARCH_AT91)
13943 +/* AT91 has these divide MCK */
13944 +const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, };
13945 +EXPORT_SYMBOL(atmel_tc_divisors);
13946 +
13947 +#endif
13948 +
13949 +static DEFINE_SPINLOCK(tc_list_lock);
13950 +static LIST_HEAD(tc_list);
13951 +
13952 +/**
13953 + * atmel_tc_alloc - allocate a specified TC block
13954 + * @block: which block to allocate
13955 + * @name: name to be associated with the iomem resource
13956 + *
13957 + * Caller allocates a block. If it is available, a pointer to a
13958 + * pre-initialized struct atmel_tc is returned. The caller can access
13959 + * the registers directly through the "regs" field.
13960 + */
13961 +struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name)
13962 +{
13963 + struct atmel_tc *tc;
13964 + struct platform_device *pdev = NULL;
13965 + struct resource *r;
13966 +
13967 + spin_lock(&tc_list_lock);
13968 + list_for_each_entry(tc, &tc_list, node) {
13969 + if (tc->pdev->id == block) {
13970 + pdev = tc->pdev;
13971 + break;
13972 + }
13973 + }
13974 +
13975 + if (!pdev || tc->iomem)
13976 + goto fail;
13977 +
13978 + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13979 + r = request_mem_region(r->start, ATMEL_TC_IOMEM_SIZE, name);
13980 + if (!r)
13981 + goto fail;
13982 +
13983 + tc->regs = ioremap(r->start, ATMEL_TC_IOMEM_SIZE);
13984 + if (!tc->regs)
13985 + goto fail_ioremap;
13986 +
13987 + tc->iomem = r;
13988 +
13989 +out:
13990 + spin_unlock(&tc_list_lock);
13991 + return tc;
13992 +
13993 +fail_ioremap:
13994 + release_resource(r);
13995 +fail:
13996 + tc = NULL;
13997 + goto out;
13998 +}
13999 +EXPORT_SYMBOL_GPL(atmel_tc_alloc);
14000 +
14001 +/**
14002 + * atmel_tc_free - release a specified TC block
14003 + * @tc: Timer/counter block that was returned by atmel_tc_alloc()
14004 + *
14005 + * This reverses the effect of atmel_tc_alloc(), unmapping the I/O
14006 + * registers, invalidating the resource returned by that routine and
14007 + * making the TC available to other drivers.
14008 + */
14009 +void atmel_tc_free(struct atmel_tc *tc)
14010 +{
14011 + spin_lock(&tc_list_lock);
14012 + if (tc->regs) {
14013 + iounmap(tc->regs);
14014 + release_resource(tc->iomem);
14015 + tc->regs = NULL;
14016 + tc->iomem = NULL;
14017 + }
14018 + spin_unlock(&tc_list_lock);
14019 +}
14020 +EXPORT_SYMBOL_GPL(atmel_tc_free);
14021 +
14022 +static int __init tc_probe(struct platform_device *pdev)
14023 +{
14024 + struct atmel_tc *tc;
14025 + struct clk *clk;
14026 + int irq;
14027 +
14028 + if (!platform_get_resource(pdev, IORESOURCE_MEM, 0))
14029 + return -EINVAL;
14030 +
14031 + irq = platform_get_irq(pdev, 0);
14032 + if (irq < 0)
14033 + return -EINVAL;
14034 +
14035 + tc = kzalloc(sizeof(struct atmel_tc), GFP_KERNEL);
14036 + if (!tc)
14037 + return -ENOMEM;
14038 +
14039 + tc->pdev = pdev;
14040 +
14041 + clk = clk_get(&pdev->dev, "t0_clk");
14042 + if (IS_ERR(clk)) {
14043 + kfree(tc);
14044 + return -EINVAL;
14045 + }
14046 +
14047 + tc->clk[0] = clk;
14048 + tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
14049 + if (IS_ERR(tc->clk[1]))
14050 + tc->clk[1] = clk;
14051 + tc->clk[2] = clk_get(&pdev->dev, "t2_clk");
14052 + if (IS_ERR(tc->clk[2]))
14053 + tc->clk[2] = clk;
14054 +
14055 + tc->irq[0] = irq;
14056 + tc->irq[1] = platform_get_irq(pdev, 1);
14057 + if (tc->irq[1] < 0)
14058 + tc->irq[1] = irq;
14059 + tc->irq[2] = platform_get_irq(pdev, 2);
14060 + if (tc->irq[2] < 0)
14061 + tc->irq[2] = irq;
14062 +
14063 + spin_lock(&tc_list_lock);
14064 + list_add_tail(&tc->node, &tc_list);
14065 + spin_unlock(&tc_list_lock);
14066 +
14067 + return 0;
14068 +}
14069 +
14070 +static struct platform_driver tc_driver = {
14071 + .driver.name = "atmel_tcb",
14072 +};
14073 +
14074 +static int __init tc_init(void)
14075 +{
14076 + return platform_driver_probe(&tc_driver, tc_probe);
14077 +}
14078 +arch_initcall(tc_init);
14079 diff -urN linux-2.6.24.3/drivers/misc/Kconfig avr32-2.6/drivers/misc/Kconfig
14080 --- linux-2.6.24.3/drivers/misc/Kconfig 2008-02-26 01:20:20.000000000 +0100
14081 +++ avr32-2.6/drivers/misc/Kconfig 2008-04-23 20:12:41.000000000 +0200
14082 @@ -13,6 +13,48 @@
14083
14084 if MISC_DEVICES
14085
14086 +config ATMEL_PWM
14087 + tristate "Atmel AT32/AT91 PWM support"
14088 + depends on AVR32 || ARCH_AT91
14089 + help
14090 + This option enables device driver support for the PWM channels
14091 + on certain Atmel prcoessors. Pulse Width Modulation is used for
14092 + purposes including software controlled power-efficent backlights
14093 + on LCD displays, motor control, and waveform generation.
14094 +
14095 +config ATMEL_TCLIB
14096 + bool "Atmel AT32/AT91 Timer/Counter Library"
14097 + depends on (AVR32 || ARCH_AT91)
14098 + help
14099 + Select this if you want a library to allocate the Timer/Counter
14100 + blocks found on many Atmel processors. This facilitates using
14101 + these blocks by different drivers despite processor differences.
14102 +
14103 +config ATMEL_TCB_CLKSRC
14104 + bool "TC Block Clocksource"
14105 + depends on ATMEL_TCLIB && GENERIC_TIME
14106 + default y
14107 + help
14108 + Select this to get a high precision clocksource based on a
14109 + TC block with a 5+ MHz base clock rate. Two timer channels
14110 + are combined to make a single 32-bit timer.
14111 +
14112 + When GENERIC_CLOCKEVENTS is defined, the third timer channel
14113 + may be used as a clock event device supporting oneshot mode
14114 + (delays of up to two seconds) based on the 32 KiHz clock.
14115 +
14116 +config ATMEL_TCB_CLKSRC_BLOCK
14117 + int
14118 + depends on ATMEL_TCB_CLKSRC
14119 + prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X
14120 + default 0
14121 + range 0 1
14122 + help
14123 + Some chips provide more than one TC block, so you have the
14124 + choice of which one to use for the clock framework. The other
14125 + TC can be used for other purposes, such as PWM generation and
14126 + interval timing.
14127 +
14128 config IBM_ASM
14129 tristate "Device driver for IBM RSA service processor"
14130 depends on X86 && PCI && INPUT && EXPERIMENTAL
14131 diff -urN linux-2.6.24.3/drivers/misc/Makefile avr32-2.6/drivers/misc/Makefile
14132 --- linux-2.6.24.3/drivers/misc/Makefile 2008-02-26 01:20:20.000000000 +0100
14133 +++ avr32-2.6/drivers/misc/Makefile 2008-04-23 20:12:41.000000000 +0200
14134 @@ -7,7 +7,9 @@
14135 obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
14136 obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
14137 obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
14138 +obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
14139 obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
14140 +obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
14141 obj-$(CONFIG_LKDTM) += lkdtm.o
14142 obj-$(CONFIG_TIFM_CORE) += tifm_core.o
14143 obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
14144 diff -urN linux-2.6.24.3/drivers/mmc/host/atmel-mci.c avr32-2.6/drivers/mmc/host/atmel-mci.c
14145 --- linux-2.6.24.3/drivers/mmc/host/atmel-mci.c 1970-01-01 01:00:00.000000000 +0100
14146 +++ avr32-2.6/drivers/mmc/host/atmel-mci.c 2008-04-23 20:12:41.000000000 +0200
14147 @@ -0,0 +1,1220 @@
14148 +/*
14149 + * Atmel MultiMedia Card Interface driver
14150 + *
14151 + * Copyright (C) 2004-2006 Atmel Corporation
14152 + *
14153 + * This program is free software; you can redistribute it and/or modify
14154 + * it under the terms of the GNU General Public License version 2 as
14155 + * published by the Free Software Foundation.
14156 + */
14157 +#include <linux/blkdev.h>
14158 +#include <linux/clk.h>
14159 +#include <linux/device.h>
14160 +#include <linux/dma-mapping.h>
14161 +#include <linux/init.h>
14162 +#include <linux/interrupt.h>
14163 +#include <linux/ioport.h>
14164 +#include <linux/module.h>
14165 +#include <linux/platform_device.h>
14166 +
14167 +#include <linux/mmc/host.h>
14168 +
14169 +#include <asm/dma-controller.h>
14170 +#include <asm/io.h>
14171 +#include <asm/arch/board.h>
14172 +#include <asm/arch/gpio.h>
14173 +
14174 +#include "atmel-mci.h"
14175 +
14176 +#define DRIVER_NAME "atmel_mci"
14177 +
14178 +#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \
14179 + MCI_BIT(OVRE) | MCI_BIT(UNRE))
14180 +
14181 +enum {
14182 + EVENT_CMD_COMPLETE = 0,
14183 + EVENT_DATA_COMPLETE,
14184 + EVENT_DATA_ERROR,
14185 + EVENT_STOP_SENT,
14186 + EVENT_STOP_COMPLETE,
14187 + EVENT_DMA_COMPLETE,
14188 + EVENT_DMA_ERROR,
14189 +};
14190 +
14191 +struct atmel_mci_dma {
14192 + struct dma_request_sg req;
14193 + unsigned short rx_periph_id;
14194 + unsigned short tx_periph_id;
14195 +};
14196 +
14197 +struct atmel_mci {
14198 + struct mmc_host *mmc;
14199 + void __iomem *regs;
14200 + struct atmel_mci_dma dma;
14201 +
14202 + struct mmc_request *mrq;
14203 + struct mmc_command *cmd;
14204 + struct mmc_data *data;
14205 +
14206 + u32 cmd_status;
14207 + u32 data_status;
14208 + u32 stop_status;
14209 + u32 stop_cmdr;
14210 +
14211 + struct tasklet_struct tasklet;
14212 + unsigned long pending_events;
14213 + unsigned long completed_events;
14214 +
14215 + int present;
14216 + int detect_pin;
14217 + int wp_pin;
14218 +
14219 + /* For detect pin debouncing */
14220 + struct timer_list detect_timer;
14221 +
14222 + unsigned long bus_hz;
14223 + unsigned long mapbase;
14224 + struct clk *mck;
14225 + struct platform_device *pdev;
14226 +
14227 +#ifdef CONFIG_DEBUG_FS
14228 + struct dentry *debugfs_root;
14229 + struct dentry *debugfs_regs;
14230 + struct dentry *debugfs_req;
14231 + struct dentry *debugfs_pending_events;
14232 + struct dentry *debugfs_completed_events;
14233 +#endif
14234 +};
14235 +
14236 +/* Those printks take an awful lot of time... */
14237 +#ifndef DEBUG
14238 +static unsigned int fmax = 15000000U;
14239 +#else
14240 +static unsigned int fmax = 1000000U;
14241 +#endif
14242 +module_param(fmax, uint, 0444);
14243 +MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
14244 +
14245 +/* Test bit macros for completed events */
14246 +#define mci_cmd_is_complete(host) \
14247 + test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14248 +#define mci_data_is_complete(host) \
14249 + test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14250 +#define mci_data_error_is_complete(host) \
14251 + test_bit(EVENT_DATA_ERROR, &host->completed_events)
14252 +#define mci_stop_sent_is_complete(host) \
14253 + test_bit(EVENT_STOP_SENT, &host->completed_events)
14254 +#define mci_stop_is_complete(host) \
14255 + test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14256 +#define mci_dma_is_complete(host) \
14257 + test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14258 +#define mci_dma_error_is_complete(host) \
14259 + test_bit(EVENT_DMA_ERROR, &host->completed_events)
14260 +
14261 +/* Test and clear bit macros for pending events */
14262 +#define mci_clear_cmd_is_pending(host) \
14263 + test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14264 +#define mci_clear_data_is_pending(host) \
14265 + test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14266 +#define mci_clear_data_error_is_pending(host) \
14267 + test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14268 +#define mci_clear_stop_sent_is_pending(host) \
14269 + test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
14270 +#define mci_clear_stop_is_pending(host) \
14271 + test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14272 +#define mci_clear_dma_error_is_pending(host) \
14273 + test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14274 +
14275 +/* Test and set bit macros for completed events */
14276 +#define mci_set_cmd_is_completed(host) \
14277 + test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14278 +#define mci_set_data_is_completed(host) \
14279 + test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14280 +#define mci_set_data_error_is_completed(host) \
14281 + test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
14282 +#define mci_set_stop_sent_is_completed(host) \
14283 + test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
14284 +#define mci_set_stop_is_completed(host) \
14285 + test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14286 +#define mci_set_dma_error_is_completed(host) \
14287 + test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
14288 +
14289 +/* Set bit macros for completed events */
14290 +#define mci_set_cmd_complete(host) \
14291 + set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14292 +#define mci_set_data_complete(host) \
14293 + set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14294 +#define mci_set_data_error_complete(host) \
14295 + set_bit(EVENT_DATA_ERROR, &host->completed_events)
14296 +#define mci_set_stop_sent_complete(host) \
14297 + set_bit(EVENT_STOP_SENT, &host->completed_events)
14298 +#define mci_set_stop_complete(host) \
14299 + set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14300 +#define mci_set_dma_complete(host) \
14301 + set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14302 +#define mci_set_dma_error_complete(host) \
14303 + set_bit(EVENT_DMA_ERROR, &host->completed_events)
14304 +
14305 +/* Set bit macros for pending events */
14306 +#define mci_set_cmd_pending(host) \
14307 + set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14308 +#define mci_set_data_pending(host) \
14309 + set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14310 +#define mci_set_data_error_pending(host) \
14311 + set_bit(EVENT_DATA_ERROR, &host->pending_events)
14312 +#define mci_set_stop_sent_pending(host) \
14313 + set_bit(EVENT_STOP_SENT, &host->pending_events)
14314 +#define mci_set_stop_pending(host) \
14315 + set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14316 +#define mci_set_dma_error_pending(host) \
14317 + set_bit(EVENT_DMA_ERROR, &host->pending_events)
14318 +
14319 +/* Clear bit macros for pending events */
14320 +#define mci_clear_cmd_pending(host) \
14321 + clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14322 +#define mci_clear_data_pending(host) \
14323 + clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14324 +#define mci_clear_data_error_pending(host) \
14325 + clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14326 +#define mci_clear_stop_sent_pending(host) \
14327 + clear_bit(EVENT_STOP_SENT, &host->pending_events)
14328 +#define mci_clear_stop_pending(host) \
14329 + clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14330 +#define mci_clear_dma_error_pending(host) \
14331 + clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14332 +
14333 +
14334 +#ifdef CONFIG_DEBUG_FS
14335 +#include <linux/debugfs.h>
14336 +
14337 +#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int))
14338 +
14339 +struct req_dbg_data {
14340 + unsigned int nbytes;
14341 + char str[DBG_REQ_BUF_SIZE];
14342 +};
14343 +
14344 +static int req_dbg_open(struct inode *inode, struct file *file)
14345 +{
14346 + struct atmel_mci *host;
14347 + struct mmc_request *mrq;
14348 + struct mmc_command *cmd, *stop;
14349 + struct mmc_data *data;
14350 + struct req_dbg_data *priv;
14351 + char *str;
14352 + unsigned long n = 0;
14353 +
14354 + priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
14355 + if (!priv)
14356 + return -ENOMEM;
14357 + str = priv->str;
14358 +
14359 + mutex_lock(&inode->i_mutex);
14360 + host = inode->i_private;
14361 +
14362 + spin_lock_irq(&host->mmc->lock);
14363 + mrq = host->mrq;
14364 + if (mrq) {
14365 + cmd = mrq->cmd;
14366 + data = mrq->data;
14367 + stop = mrq->stop;
14368 + n = snprintf(str, DBG_REQ_BUF_SIZE,
14369 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14370 + cmd->opcode, cmd->arg, cmd->flags,
14371 + cmd->resp[0], cmd->resp[1], cmd->resp[2],
14372 + cmd->resp[3], cmd->error);
14373 + if (n < DBG_REQ_BUF_SIZE && data)
14374 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14375 + "DATA %u * %u (%u) %x (err %u)\n",
14376 + data->blocks, data->blksz,
14377 + data->bytes_xfered, data->flags,
14378 + data->error);
14379 + if (n < DBG_REQ_BUF_SIZE && stop)
14380 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14381 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14382 + stop->opcode, stop->arg, stop->flags,
14383 + stop->resp[0], stop->resp[1],
14384 + stop->resp[2], stop->resp[3],
14385 + stop->error);
14386 + }
14387 + spin_unlock_irq(&host->mmc->lock);
14388 + mutex_unlock(&inode->i_mutex);
14389 +
14390 + priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
14391 + file->private_data = priv;
14392 +
14393 + return 0;
14394 +}
14395 +
14396 +static ssize_t req_dbg_read(struct file *file, char __user *buf,
14397 + size_t nbytes, loff_t *ppos)
14398 +{
14399 + struct req_dbg_data *priv = file->private_data;
14400 +
14401 + return simple_read_from_buffer(buf, nbytes, ppos,
14402 + priv->str, priv->nbytes);
14403 +}
14404 +
14405 +static int req_dbg_release(struct inode *inode, struct file *file)
14406 +{
14407 + kfree(file->private_data);
14408 + return 0;
14409 +}
14410 +
14411 +static const struct file_operations req_dbg_fops = {
14412 + .owner = THIS_MODULE,
14413 + .open = req_dbg_open,
14414 + .llseek = no_llseek,
14415 + .read = req_dbg_read,
14416 + .release = req_dbg_release,
14417 +};
14418 +
14419 +static int regs_dbg_open(struct inode *inode, struct file *file)
14420 +{
14421 + struct atmel_mci *host;
14422 + unsigned int i;
14423 + u32 *data;
14424 + int ret = -ENOMEM;
14425 +
14426 + mutex_lock(&inode->i_mutex);
14427 + host = inode->i_private;
14428 + data = kmalloc(inode->i_size, GFP_KERNEL);
14429 + if (!data)
14430 + goto out;
14431 +
14432 + spin_lock_irq(&host->mmc->lock);
14433 + for (i = 0; i < inode->i_size / 4; i++)
14434 + data[i] = __raw_readl(host->regs + i * 4);
14435 + spin_unlock_irq(&host->mmc->lock);
14436 +
14437 + file->private_data = data;
14438 + ret = 0;
14439 +
14440 +out:
14441 + mutex_unlock(&inode->i_mutex);
14442 +
14443 + return ret;
14444 +}
14445 +
14446 +static ssize_t regs_dbg_read(struct file *file, char __user *buf,
14447 + size_t nbytes, loff_t *ppos)
14448 +{
14449 + struct inode *inode = file->f_dentry->d_inode;
14450 + int ret;
14451 +
14452 + mutex_lock(&inode->i_mutex);
14453 + ret = simple_read_from_buffer(buf, nbytes, ppos,
14454 + file->private_data,
14455 + file->f_dentry->d_inode->i_size);
14456 + mutex_unlock(&inode->i_mutex);
14457 +
14458 + return ret;
14459 +}
14460 +
14461 +static int regs_dbg_release(struct inode *inode, struct file *file)
14462 +{
14463 + kfree(file->private_data);
14464 + return 0;
14465 +}
14466 +
14467 +static const struct file_operations regs_dbg_fops = {
14468 + .owner = THIS_MODULE,
14469 + .open = regs_dbg_open,
14470 + .llseek = generic_file_llseek,
14471 + .read = regs_dbg_read,
14472 + .release = regs_dbg_release,
14473 +};
14474 +
14475 +static void atmci_init_debugfs(struct atmel_mci *host)
14476 +{
14477 + struct mmc_host *mmc;
14478 + struct dentry *root, *regs;
14479 + struct resource *res;
14480 +
14481 + mmc = host->mmc;
14482 + root = debugfs_create_dir(mmc_hostname(mmc), NULL);
14483 + if (IS_ERR(root) || !root)
14484 + goto err_root;
14485 + host->debugfs_root = root;
14486 +
14487 + regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
14488 + if (!regs)
14489 + goto err_regs;
14490 +
14491 + res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
14492 + regs->d_inode->i_size = res->end - res->start + 1;
14493 + host->debugfs_regs = regs;
14494 +
14495 + host->debugfs_req = debugfs_create_file("req", 0400, root,
14496 + host, &req_dbg_fops);
14497 + if (!host->debugfs_req)
14498 + goto err_req;
14499 +
14500 + host->debugfs_pending_events
14501 + = debugfs_create_u32("pending_events", 0400, root,
14502 + (u32 *)&host->pending_events);
14503 + if (!host->debugfs_pending_events)
14504 + goto err_pending_events;
14505 +
14506 + host->debugfs_completed_events
14507 + = debugfs_create_u32("completed_events", 0400, root,
14508 + (u32 *)&host->completed_events);
14509 + if (!host->debugfs_completed_events)
14510 + goto err_completed_events;
14511 +
14512 + return;
14513 +
14514 +err_completed_events:
14515 + debugfs_remove(host->debugfs_pending_events);
14516 +err_pending_events:
14517 + debugfs_remove(host->debugfs_req);
14518 +err_req:
14519 + debugfs_remove(host->debugfs_regs);
14520 +err_regs:
14521 + debugfs_remove(host->debugfs_root);
14522 +err_root:
14523 + host->debugfs_root = NULL;
14524 + dev_err(&host->pdev->dev,
14525 + "failed to initialize debugfs for %s\n",
14526 + mmc_hostname(mmc));
14527 +}
14528 +
14529 +static void atmci_cleanup_debugfs(struct atmel_mci *host)
14530 +{
14531 + if (host->debugfs_root) {
14532 + debugfs_remove(host->debugfs_completed_events);
14533 + debugfs_remove(host->debugfs_pending_events);
14534 + debugfs_remove(host->debugfs_req);
14535 + debugfs_remove(host->debugfs_regs);
14536 + debugfs_remove(host->debugfs_root);
14537 + host->debugfs_root = NULL;
14538 + }
14539 +}
14540 +#else
14541 +static inline void atmci_init_debugfs(struct atmel_mci *host)
14542 +{
14543 +
14544 +}
14545 +
14546 +static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
14547 +{
14548 +
14549 +}
14550 +#endif /* CONFIG_DEBUG_FS */
14551 +
14552 +static inline unsigned int ns_to_clocks(struct atmel_mci *host,
14553 + unsigned int ns)
14554 +{
14555 + return (ns * (host->bus_hz / 1000000) + 999) / 1000;
14556 +}
14557 +
14558 +static void atmci_set_timeout(struct atmel_mci *host,
14559 + struct mmc_data *data)
14560 +{
14561 + static unsigned dtomul_to_shift[] = {
14562 + 0, 4, 7, 8, 10, 12, 16, 20
14563 + };
14564 + unsigned timeout;
14565 + unsigned dtocyc, dtomul;
14566 +
14567 + timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
14568 +
14569 + for (dtomul = 0; dtomul < 8; dtomul++) {
14570 + unsigned shift = dtomul_to_shift[dtomul];
14571 + dtocyc = (timeout + (1 << shift) - 1) >> shift;
14572 + if (dtocyc < 15)
14573 + break;
14574 + }
14575 +
14576 + if (dtomul >= 8) {
14577 + dtomul = 7;
14578 + dtocyc = 15;
14579 + }
14580 +
14581 + dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
14582 + dtocyc << dtomul_to_shift[dtomul]);
14583 + mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
14584 + | MCI_BF(DTOCYC, dtocyc)));
14585 +}
14586 +
14587 +/*
14588 + * Return mask with command flags to be enabled for this command.
14589 + */
14590 +static u32 atmci_prepare_command(struct mmc_host *mmc,
14591 + struct mmc_command *cmd)
14592 +{
14593 + u32 cmdr;
14594 +
14595 + cmd->error = 0;
14596 +
14597 + cmdr = MCI_BF(CMDNB, cmd->opcode);
14598 +
14599 + if (cmd->flags & MMC_RSP_PRESENT) {
14600 + if (cmd->flags & MMC_RSP_136)
14601 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
14602 + else
14603 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
14604 + }
14605 +
14606 + /*
14607 + * This should really be MAXLAT_5 for CMD2 and ACMD41, but
14608 + * it's too difficult to determine whether this is an ACMD or
14609 + * not. Better make it 64.
14610 + */
14611 + cmdr |= MCI_BIT(MAXLAT);
14612 +
14613 + if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
14614 + cmdr |= MCI_BIT(OPDCMD);
14615 +
14616 + dev_dbg(&mmc->class_dev,
14617 + "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
14618 + cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
14619 +
14620 + return cmdr;
14621 +}
14622 +
14623 +static void atmci_start_command(struct atmel_mci *host,
14624 + struct mmc_command *cmd,
14625 + u32 cmd_flags)
14626 +{
14627 + WARN_ON(host->cmd);
14628 + host->cmd = cmd;
14629 +
14630 + mci_writel(host, ARGR, cmd->arg);
14631 + mci_writel(host, CMDR, cmd_flags);
14632 +
14633 + if (cmd->data)
14634 + dma_start_request(host->dma.req.req.dmac,
14635 + host->dma.req.req.channel);
14636 +}
14637 +
14638 +/*
14639 + * Returns a mask of flags to be set in the command register when the
14640 + * command to start the transfer is to be sent.
14641 + */
14642 +static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
14643 +{
14644 + struct atmel_mci *host = mmc_priv(mmc);
14645 + u32 cmd_flags;
14646 +
14647 + WARN_ON(host->data);
14648 + host->data = data;
14649 +
14650 + atmci_set_timeout(host, data);
14651 + mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
14652 + | MCI_BF(BLKLEN, data->blksz)));
14653 + host->dma.req.block_size = data->blksz;
14654 + host->dma.req.nr_blocks = data->blocks;
14655 +
14656 + cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
14657 + if (data->flags & MMC_DATA_STREAM)
14658 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14659 + else if (data->blocks > 1)
14660 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14661 + else
14662 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
14663 +
14664 + if (data->flags & MMC_DATA_READ) {
14665 + cmd_flags |= MCI_BIT(TRDIR);
14666 + host->dma.req.nr_sg
14667 + = dma_map_sg(&host->pdev->dev, data->sg,
14668 + data->sg_len, DMA_FROM_DEVICE);
14669 + host->dma.req.periph_id = host->dma.rx_periph_id;
14670 + host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
14671 + host->dma.req.data_reg = host->mapbase + MCI_RDR;
14672 + } else {
14673 + host->dma.req.nr_sg
14674 + = dma_map_sg(&host->pdev->dev, data->sg,
14675 + data->sg_len, DMA_TO_DEVICE);
14676 + host->dma.req.periph_id = host->dma.tx_periph_id;
14677 + host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
14678 + host->dma.req.data_reg = host->mapbase + MCI_TDR;
14679 + }
14680 + host->dma.req.sg = data->sg;
14681 +
14682 + dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
14683 +
14684 + return cmd_flags;
14685 +}
14686 +
14687 +static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
14688 +{
14689 + struct atmel_mci *host = mmc_priv(mmc);
14690 + struct mmc_data *data = mrq->data;
14691 + u32 iflags;
14692 + u32 cmdflags = 0;
14693 +
14694 + iflags = mci_readl(host, IMR);
14695 + if (iflags)
14696 + dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
14697 + mci_readl(host, IMR));
14698 +
14699 + WARN_ON(host->mrq != NULL);
14700 +
14701 + /*
14702 + * We may "know" the card is gone even though there's still an
14703 + * electrical connection. If so, we really need to communicate
14704 + * this to the MMC core since there won't be any more
14705 + * interrupts as the card is completely removed. Otherwise,
14706 + * the MMC core might believe the card is still there even
14707 + * though the card was just removed very slowly.
14708 + */
14709 + if (!host->present) {
14710 + mrq->cmd->error = -ENOMEDIUM;
14711 + mmc_request_done(mmc, mrq);
14712 + return;
14713 + }
14714 +
14715 + host->mrq = mrq;
14716 + host->pending_events = 0;
14717 + host->completed_events = 0;
14718 +
14719 + iflags = MCI_BIT(CMDRDY);
14720 + cmdflags = atmci_prepare_command(mmc, mrq->cmd);
14721 +
14722 + if (mrq->stop) {
14723 + WARN_ON(!data);
14724 +
14725 + host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
14726 + host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
14727 + if (!(data->flags & MMC_DATA_WRITE))
14728 + host->stop_cmdr |= MCI_BIT(TRDIR);
14729 + if (data->flags & MMC_DATA_STREAM)
14730 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14731 + else
14732 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14733 + }
14734 + if (data) {
14735 + cmdflags |= atmci_prepare_data(mmc, data);
14736 + iflags |= MCI_DATA_ERROR_FLAGS;
14737 + }
14738 +
14739 + atmci_start_command(host, mrq->cmd, cmdflags);
14740 + mci_writel(host, IER, iflags);
14741 +}
14742 +
14743 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
14744 +{
14745 + struct atmel_mci *host = mmc_priv(mmc);
14746 + u32 mr;
14747 +
14748 + if (ios->clock) {
14749 + u32 clkdiv;
14750 +
14751 + /* Set clock rate */
14752 + clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1;
14753 + if (clkdiv > 255) {
14754 + dev_warn(&mmc->class_dev,
14755 + "clock %u too slow; using %lu\n",
14756 + ios->clock, host->bus_hz / (2 * 256));
14757 + clkdiv = 255;
14758 + }
14759 +
14760 + mr = mci_readl(host, MR);
14761 + mr = MCI_BFINS(CLKDIV, clkdiv, mr)
14762 + | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
14763 + mci_writel(host, MR, mr);
14764 +
14765 + /* Enable the MCI controller */
14766 + mci_writel(host, CR, MCI_BIT(MCIEN));
14767 + } else {
14768 + /* Disable the MCI controller */
14769 + mci_writel(host, CR, MCI_BIT(MCIDIS));
14770 + }
14771 +
14772 + switch (ios->bus_width) {
14773 + case MMC_BUS_WIDTH_1:
14774 + mci_writel(host, SDCR, 0);
14775 + break;
14776 + case MMC_BUS_WIDTH_4:
14777 + mci_writel(host, SDCR, MCI_BIT(SDCBUS));
14778 + break;
14779 + }
14780 +
14781 + switch (ios->power_mode) {
14782 + case MMC_POWER_ON:
14783 + /* Send init sequence (74 clock cycles) */
14784 + mci_writel(host, IDR, ~0UL);
14785 + mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
14786 + while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
14787 + cpu_relax();
14788 + break;
14789 + default:
14790 + /*
14791 + * TODO: None of the currently available AVR32-based
14792 + * boards allow MMC power to be turned off. Implement
14793 + * power control when this can be tested properly.
14794 + */
14795 + break;
14796 + }
14797 +}
14798 +
14799 +static int atmci_get_ro(struct mmc_host *mmc)
14800 +{
14801 + int read_only = 0;
14802 + struct atmel_mci *host = mmc_priv(mmc);
14803 +
14804 + if (host->wp_pin >= 0) {
14805 + read_only = gpio_get_value(host->wp_pin);
14806 + dev_dbg(&mmc->class_dev, "card is %s\n",
14807 + read_only ? "read-only" : "read-write");
14808 + } else {
14809 + dev_dbg(&mmc->class_dev,
14810 + "no pin for checking read-only switch."
14811 + " Assuming write-enable.\n");
14812 + }
14813 +
14814 + return read_only;
14815 +}
14816 +
14817 +static struct mmc_host_ops atmci_ops = {
14818 + .request = atmci_request,
14819 + .set_ios = atmci_set_ios,
14820 + .get_ro = atmci_get_ro,
14821 +};
14822 +
14823 +static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
14824 +{
14825 + struct atmel_mci *host = mmc_priv(mmc);
14826 +
14827 + WARN_ON(host->cmd || host->data);
14828 + host->mrq = NULL;
14829 +
14830 + mmc_request_done(mmc, mrq);
14831 +}
14832 +
14833 +static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
14834 + u32 flags)
14835 +{
14836 + struct atmel_mci *host = mmc_priv(mmc);
14837 +
14838 + atmci_start_command(host, data->stop, host->stop_cmdr | flags);
14839 + mci_writel(host, IER, MCI_BIT(CMDRDY));
14840 +}
14841 +
14842 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
14843 +{
14844 + host->data = NULL;
14845 + dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
14846 + ((data->flags & MMC_DATA_WRITE)
14847 + ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
14848 +
14849 + /*
14850 + * Data might complete before command for very short transfers
14851 + * (like READ_SCR)
14852 + */
14853 + if (mci_cmd_is_complete(host)
14854 + && (!data->stop || mci_stop_is_complete(host)))
14855 + atmci_request_end(host->mmc, data->mrq);
14856 +}
14857 +
14858 +static void atmci_command_complete(struct atmel_mci *host,
14859 + struct mmc_command *cmd, u32 status)
14860 +{
14861 + if (status & MCI_BIT(RTOE))
14862 + cmd->error = -ETIMEDOUT;
14863 + else if ((cmd->flags & MMC_RSP_CRC)
14864 + && (status & MCI_BIT(RCRCE)))
14865 + cmd->error = -EILSEQ;
14866 + else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
14867 + cmd->error = -EIO;
14868 +
14869 + if (cmd->error) {
14870 + dev_dbg(&host->mmc->class_dev,
14871 + "command error: op=0x%x status=0x%08x\n",
14872 + cmd->opcode, status);
14873 +
14874 + if (cmd->data) {
14875 + dma_stop_request(host->dma.req.req.dmac,
14876 + host->dma.req.req.channel);
14877 + mci_writel(host, IDR, MCI_BIT(NOTBUSY)
14878 + | MCI_DATA_ERROR_FLAGS);
14879 + host->data = NULL;
14880 + }
14881 + }
14882 +}
14883 +
14884 +static void atmci_detect_change(unsigned long data)
14885 +{
14886 + struct atmel_mci *host = (struct atmel_mci *)data;
14887 + struct mmc_request *mrq = host->mrq;
14888 + int present;
14889 +
14890 + /*
14891 + * atmci_remove() sets detect_pin to -1 before freeing the
14892 + * interrupt. We must not re-enable the interrupt if it has
14893 + * been freed.
14894 + */
14895 + smp_rmb();
14896 + if (host->detect_pin < 0)
14897 + return;
14898 +
14899 + enable_irq(gpio_to_irq(host->detect_pin));
14900 + present = !gpio_get_value(host->detect_pin);
14901 +
14902 + dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
14903 + present, host->present);
14904 +
14905 + if (present != host->present) {
14906 + dev_dbg(&host->mmc->class_dev, "card %s\n",
14907 + present ? "inserted" : "removed");
14908 + host->present = present;
14909 +
14910 + /* Reset controller if card is gone */
14911 + if (!present) {
14912 + mci_writel(host, CR, MCI_BIT(SWRST));
14913 + mci_writel(host, IDR, ~0UL);
14914 + mci_writel(host, CR, MCI_BIT(MCIEN));
14915 + }
14916 +
14917 + /* Clean up queue if present */
14918 + if (mrq) {
14919 + if (!mci_cmd_is_complete(host))
14920 + mrq->cmd->error = -ENOMEDIUM;
14921 + if (mrq->data && !mci_data_is_complete(host)
14922 + && !mci_data_error_is_complete(host)) {
14923 + dma_stop_request(host->dma.req.req.dmac,
14924 + host->dma.req.req.channel);
14925 + host->data->error = -ENOMEDIUM;
14926 + atmci_data_complete(host, host->data);
14927 + }
14928 + if (mrq->stop && !mci_stop_is_complete(host))
14929 + mrq->stop->error = -ENOMEDIUM;
14930 +
14931 + host->cmd = NULL;
14932 + atmci_request_end(host->mmc, mrq);
14933 + }
14934 +
14935 + mmc_detect_change(host->mmc, 0);
14936 + }
14937 +}
14938 +
14939 +static void atmci_tasklet_func(unsigned long priv)
14940 +{
14941 + struct mmc_host *mmc = (struct mmc_host *)priv;
14942 + struct atmel_mci *host = mmc_priv(mmc);
14943 + struct mmc_request *mrq = host->mrq;
14944 + struct mmc_data *data = host->data;
14945 +
14946 + dev_vdbg(&mmc->class_dev,
14947 + "tasklet: pending/completed/mask %lx/%lx/%x\n",
14948 + host->pending_events, host->completed_events,
14949 + mci_readl(host, IMR));
14950 +
14951 + if (mci_clear_cmd_is_pending(host)) {
14952 + mci_set_cmd_complete(host);
14953 + atmci_command_complete(host, mrq->cmd, host->cmd_status);
14954 + if (!host->data || mci_data_is_complete(host)
14955 + || mci_data_error_is_complete(host))
14956 + atmci_request_end(mmc, mrq);
14957 + }
14958 + if (mci_clear_stop_is_pending(host)) {
14959 + mci_set_stop_complete(host);
14960 + atmci_command_complete(host, mrq->stop, host->stop_status);
14961 + if (mci_data_is_complete(host)
14962 + || mci_data_error_is_complete(host))
14963 + atmci_request_end(mmc, mrq);
14964 + }
14965 + if (mci_clear_dma_error_is_pending(host)) {
14966 + mci_set_dma_error_complete(host);
14967 + mci_clear_data_pending(host);
14968 +
14969 + /* DMA controller got bus error => invalid address */
14970 + data->error = -EIO;
14971 +
14972 + dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
14973 + host->data->bytes_xfered);
14974 +
14975 + if (data->stop
14976 + && !mci_set_stop_sent_is_completed(host))
14977 + /* TODO: Check if card is still present */
14978 + send_stop_cmd(host->mmc, data, 0);
14979 +
14980 + atmci_data_complete(host, data);
14981 + }
14982 + if (mci_clear_data_error_is_pending(host)) {
14983 + u32 status = host->data_status;
14984 +
14985 + mci_set_data_error_complete(host);
14986 + mci_clear_data_pending(host);
14987 +
14988 + dma_stop_request(host->dma.req.req.dmac,
14989 + host->dma.req.req.channel);
14990 +
14991 + if (status & MCI_BIT(DCRCE)) {
14992 + dev_dbg(&mmc->class_dev, "data CRC error\n");
14993 + data->error = -EILSEQ;
14994 + } else if (status & MCI_BIT(DTOE)) {
14995 + dev_dbg(&mmc->class_dev, "data timeout error\n");
14996 + data->error = -ETIMEDOUT;
14997 + } else {
14998 + dev_dbg(&mmc->class_dev, "data FIFO error\n");
14999 + data->error = -EIO;
15000 + }
15001 + dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
15002 + data->bytes_xfered);
15003 +
15004 + if (data->stop
15005 + && !mci_set_stop_sent_is_completed(host))
15006 + /* TODO: Check if card is still present */
15007 + send_stop_cmd(host->mmc, data, 0);
15008 +
15009 + atmci_data_complete(host, data);
15010 + }
15011 + if (mci_clear_data_is_pending(host)) {
15012 + mci_set_data_complete(host);
15013 + data->bytes_xfered = data->blocks * data->blksz;
15014 + atmci_data_complete(host, data);
15015 + }
15016 +}
15017 +
15018 +static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
15019 +{
15020 + struct atmel_mci *host = mmc_priv(mmc);
15021 + struct mmc_command *cmd = host->cmd;
15022 +
15023 + /*
15024 + * Read the response now so that we're free to send a new
15025 + * command immediately.
15026 + */
15027 + cmd->resp[0] = mci_readl(host, RSPR);
15028 + cmd->resp[1] = mci_readl(host, RSPR);
15029 + cmd->resp[2] = mci_readl(host, RSPR);
15030 + cmd->resp[3] = mci_readl(host, RSPR);
15031 +
15032 + mci_writel(host, IDR, MCI_BIT(CMDRDY));
15033 + host->cmd = NULL;
15034 +
15035 + if (mci_stop_sent_is_complete(host)) {
15036 + host->stop_status = status;
15037 + mci_set_stop_pending(host);
15038 + } else {
15039 + struct mmc_request *mrq = host->mrq;
15040 +
15041 + if (mrq->stop && mci_dma_is_complete(host)
15042 + && !mci_set_stop_sent_is_completed(host))
15043 + send_stop_cmd(host->mmc, mrq->data, 0);
15044 + host->cmd_status = status;
15045 + mci_set_cmd_pending(host);
15046 + }
15047 +
15048 + tasklet_schedule(&host->tasklet);
15049 +}
15050 +
15051 +static void atmci_xfer_complete(struct dma_request *_req)
15052 +{
15053 + struct dma_request_sg *req = to_dma_request_sg(_req);
15054 + struct atmel_mci_dma *dma;
15055 + struct atmel_mci *host;
15056 + struct mmc_data *data;
15057 +
15058 + dma = container_of(req, struct atmel_mci_dma, req);
15059 + host = container_of(dma, struct atmel_mci, dma);
15060 + data = host->data;
15061 +
15062 + /*
15063 + * This callback may be called before we see the CMDRDY
15064 + * interrupt under heavy irq load (possibly caused by other
15065 + * drivers) or when interrupts are disabled for a long time.
15066 + */
15067 + mci_set_dma_complete(host);
15068 + if (data->stop && mci_cmd_is_complete(host)
15069 + && !mci_set_stop_sent_is_completed(host))
15070 + send_stop_cmd(host->mmc, data, 0);
15071 +
15072 + /*
15073 + * Regardless of what the documentation says, we have to wait
15074 + * for NOTBUSY even after block read operations.
15075 + *
15076 + * When the DMA transfer is complete, the controller may still
15077 + * be reading the CRC from the card, i.e. the data transfer is
15078 + * still in progress and we haven't seen all the potential
15079 + * error bits yet.
15080 + */
15081 + mci_writel(host, IER, MCI_BIT(NOTBUSY));
15082 +}
15083 +
15084 +static void atmci_dma_error(struct dma_request *_req)
15085 +{
15086 + struct dma_request_sg *req = to_dma_request_sg(_req);
15087 + struct atmel_mci_dma *dma;
15088 + struct atmel_mci *host;
15089 +
15090 + dma = container_of(req, struct atmel_mci_dma, req);
15091 + host = container_of(dma, struct atmel_mci, dma);
15092 +
15093 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15094 + | MCI_DATA_ERROR_FLAGS));
15095 +
15096 + mci_set_dma_error_pending(host);
15097 + tasklet_schedule(&host->tasklet);
15098 +}
15099 +
15100 +static irqreturn_t atmci_interrupt(int irq, void *dev_id)
15101 +{
15102 + struct mmc_host *mmc = dev_id;
15103 + struct atmel_mci *host = mmc_priv(mmc);
15104 + u32 status, mask, pending;
15105 +
15106 + spin_lock(&mmc->lock);
15107 +
15108 + status = mci_readl(host, SR);
15109 + mask = mci_readl(host, IMR);
15110 + pending = status & mask;
15111 +
15112 + do {
15113 + if (pending & MCI_DATA_ERROR_FLAGS) {
15114 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15115 + | MCI_DATA_ERROR_FLAGS));
15116 + host->data_status = status;
15117 + mci_set_data_error_pending(host);
15118 + tasklet_schedule(&host->tasklet);
15119 + break;
15120 + }
15121 + if (pending & MCI_BIT(CMDRDY))
15122 + atmci_cmd_interrupt(mmc, status);
15123 + if (pending & MCI_BIT(NOTBUSY)) {
15124 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15125 + | MCI_DATA_ERROR_FLAGS));
15126 + mci_set_data_pending(host);
15127 + tasklet_schedule(&host->tasklet);
15128 + }
15129 +
15130 + status = mci_readl(host, SR);
15131 + mask = mci_readl(host, IMR);
15132 + pending = status & mask;
15133 + } while (pending);
15134 +
15135 + spin_unlock(&mmc->lock);
15136 +
15137 + return IRQ_HANDLED;
15138 +}
15139 +
15140 +static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
15141 +{
15142 + struct mmc_host *mmc = dev_id;
15143 + struct atmel_mci *host = mmc_priv(mmc);
15144 +
15145 + /*
15146 + * Disable interrupts until the pin has stabilized and check
15147 + * the state then. Use mod_timer() since we may be in the
15148 + * middle of the timer routine when this interrupt triggers.
15149 + */
15150 + disable_irq_nosync(irq);
15151 + mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
15152 +
15153 + return IRQ_HANDLED;
15154 +}
15155 +
15156 +static int __devinit atmci_probe(struct platform_device *pdev)
15157 +{
15158 + struct mci_platform_data *board;
15159 + struct atmel_mci *host;
15160 + struct mmc_host *mmc;
15161 + struct resource *regs;
15162 + int irq;
15163 + int ret;
15164 +
15165 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
15166 + if (!regs)
15167 + return -ENXIO;
15168 + irq = platform_get_irq(pdev, 0);
15169 + if (irq < 0)
15170 + return irq;
15171 +
15172 + board = pdev->dev.platform_data;
15173 +
15174 + mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
15175 + if (!mmc)
15176 + return -ENOMEM;
15177 +
15178 + host = mmc_priv(mmc);
15179 + host->pdev = pdev;
15180 + host->mmc = mmc;
15181 + if (board) {
15182 + host->detect_pin = board->detect_pin;
15183 + host->wp_pin = board->wp_pin;
15184 + } else {
15185 + host->detect_pin = -1;
15186 + host->wp_pin = -1;
15187 + }
15188 +
15189 + host->mck = clk_get(&pdev->dev, "mci_clk");
15190 + if (IS_ERR(host->mck)) {
15191 + ret = PTR_ERR(host->mck);
15192 + goto out_free_host;
15193 + }
15194 + clk_enable(host->mck);
15195 +
15196 + ret = -ENOMEM;
15197 + host->regs = ioremap(regs->start, regs->end - regs->start + 1);
15198 + if (!host->regs)
15199 + goto out_disable_clk;
15200 +
15201 + host->bus_hz = clk_get_rate(host->mck);
15202 + host->mapbase = regs->start;
15203 +
15204 + mmc->ops = &atmci_ops;
15205 + mmc->f_min = (host->bus_hz + 511) / 512;
15206 + mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
15207 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
15208 + mmc->caps |= MMC_CAP_4_BIT_DATA;
15209 +
15210 + tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
15211 +
15212 + ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
15213 + if (ret)
15214 + goto out_unmap;
15215 +
15216 + /* Assume card is present if we don't have a detect pin */
15217 + host->present = 1;
15218 + if (host->detect_pin >= 0) {
15219 + if (gpio_request(host->detect_pin, "mmc_detect")) {
15220 + dev_dbg(&mmc->class_dev, "no detect pin available\n");
15221 + host->detect_pin = -1;
15222 + } else {
15223 + host->present = !gpio_get_value(host->detect_pin);
15224 + }
15225 + }
15226 + if (host->wp_pin >= 0) {
15227 + if (gpio_request(host->wp_pin, "mmc_wp")) {
15228 + dev_dbg(&mmc->class_dev, "no WP pin available\n");
15229 + host->wp_pin = -1;
15230 + }
15231 + }
15232 +
15233 + /* TODO: Get this information from platform data */
15234 + ret = -ENOMEM;
15235 + host->dma.req.req.dmac = find_dma_controller(0);
15236 + if (!host->dma.req.req.dmac) {
15237 + dev_dbg(&mmc->class_dev, "no DMA controller available\n");
15238 + goto out_free_irq;
15239 + }
15240 + ret = dma_alloc_channel(host->dma.req.req.dmac);
15241 + if (ret < 0) {
15242 + dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
15243 + goto out_free_irq;
15244 + }
15245 + host->dma.req.req.channel = ret;
15246 + host->dma.req.width = DMA_WIDTH_32BIT;
15247 + host->dma.req.req.xfer_complete = atmci_xfer_complete;
15248 + host->dma.req.req.block_complete = NULL; // atmci_block_complete;
15249 + host->dma.req.req.error = atmci_dma_error;
15250 + host->dma.rx_periph_id = 0;
15251 + host->dma.tx_periph_id = 1;
15252 +
15253 + mci_writel(host, CR, MCI_BIT(SWRST));
15254 + mci_writel(host, IDR, ~0UL);
15255 +
15256 + platform_set_drvdata(pdev, host);
15257 +
15258 + mmc_add_host(mmc);
15259 +
15260 + if (host->detect_pin >= 0) {
15261 + setup_timer(&host->detect_timer, atmci_detect_change,
15262 + (unsigned long)host);
15263 +
15264 + ret = request_irq(gpio_to_irq(host->detect_pin),
15265 + atmci_detect_interrupt,
15266 + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
15267 + DRIVER_NAME, mmc);
15268 + if (ret) {
15269 + dev_dbg(&mmc->class_dev,
15270 + "could not request IRQ %d for detect pin\n",
15271 + gpio_to_irq(host->detect_pin));
15272 + gpio_free(host->detect_pin);
15273 + host->detect_pin = -1;
15274 + }
15275 + }
15276 +
15277 + dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
15278 + host->mapbase, irq);
15279 +
15280 + atmci_init_debugfs(host);
15281 +
15282 + return 0;
15283 +
15284 +out_free_irq:
15285 + if (host->detect_pin >= 0)
15286 + gpio_free(host->detect_pin);
15287 + if (host->wp_pin >= 0)
15288 + gpio_free(host->wp_pin);
15289 + free_irq(irq, mmc);
15290 +out_unmap:
15291 + iounmap(host->regs);
15292 +out_disable_clk:
15293 + clk_disable(host->mck);
15294 + clk_put(host->mck);
15295 +out_free_host:
15296 + mmc_free_host(mmc);
15297 + return ret;
15298 +}
15299 +
15300 +static int __devexit atmci_remove(struct platform_device *pdev)
15301 +{
15302 + struct atmel_mci *host = platform_get_drvdata(pdev);
15303 +
15304 + platform_set_drvdata(pdev, NULL);
15305 +
15306 + if (host) {
15307 + atmci_cleanup_debugfs(host);
15308 +
15309 + if (host->detect_pin >= 0) {
15310 + int pin = host->detect_pin;
15311 +
15312 + /* Make sure our timer doesn't enable the interrupt */
15313 + host->detect_pin = -1;
15314 + smp_wmb();
15315 +
15316 + free_irq(gpio_to_irq(pin), host->mmc);
15317 + del_timer_sync(&host->detect_timer);
15318 + cancel_delayed_work(&host->mmc->detect);
15319 + gpio_free(pin);
15320 + }
15321 +
15322 + mmc_remove_host(host->mmc);
15323 +
15324 + mci_writel(host, IDR, ~0UL);
15325 + mci_writel(host, CR, MCI_BIT(MCIDIS));
15326 + mci_readl(host, SR);
15327 +
15328 + dma_release_channel(host->dma.req.req.dmac,
15329 + host->dma.req.req.channel);
15330 +
15331 + if (host->wp_pin >= 0)
15332 + gpio_free(host->wp_pin);
15333 +
15334 + free_irq(platform_get_irq(pdev, 0), host->mmc);
15335 + iounmap(host->regs);
15336 +
15337 + clk_disable(host->mck);
15338 + clk_put(host->mck);
15339 +
15340 + mmc_free_host(host->mmc);
15341 + }
15342 + return 0;
15343 +}
15344 +
15345 +static struct platform_driver atmci_driver = {
15346 + .probe = atmci_probe,
15347 + .remove = __devexit_p(atmci_remove),
15348 + .driver = {
15349 + .name = DRIVER_NAME,
15350 + },
15351 +};
15352 +
15353 +static int __init atmci_init(void)
15354 +{
15355 + return platform_driver_register(&atmci_driver);
15356 +}
15357 +
15358 +static void __exit atmci_exit(void)
15359 +{
15360 + platform_driver_unregister(&atmci_driver);
15361 +}
15362 +
15363 +module_init(atmci_init);
15364 +module_exit(atmci_exit);
15365 +
15366 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
15367 +MODULE_LICENSE("GPL");
15368 diff -urN linux-2.6.24.3/drivers/mmc/host/atmel-mci.h avr32-2.6/drivers/mmc/host/atmel-mci.h
15369 --- linux-2.6.24.3/drivers/mmc/host/atmel-mci.h 1970-01-01 01:00:00.000000000 +0100
15370 +++ avr32-2.6/drivers/mmc/host/atmel-mci.h 2008-04-23 19:33:40.000000000 +0200
15371 @@ -0,0 +1,192 @@
15372 +/*
15373 + * Atmel MultiMedia Card Interface driver
15374 + *
15375 + * Copyright (C) 2004-2006 Atmel Corporation
15376 + *
15377 + * This program is free software; you can redistribute it and/or modify
15378 + * it under the terms of the GNU General Public License version 2 as
15379 + * published by the Free Software Foundation.
15380 + */
15381 +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
15382 +#define __DRIVERS_MMC_ATMEL_MCI_H__
15383 +
15384 +/* MCI register offsets */
15385 +#define MCI_CR 0x0000
15386 +#define MCI_MR 0x0004
15387 +#define MCI_DTOR 0x0008
15388 +#define MCI_SDCR 0x000c
15389 +#define MCI_ARGR 0x0010
15390 +#define MCI_CMDR 0x0014
15391 +#define MCI_BLKR 0x0018
15392 +#define MCI_RSPR 0x0020
15393 +#define MCI_RSPR1 0x0024
15394 +#define MCI_RSPR2 0x0028
15395 +#define MCI_RSPR3 0x002c
15396 +#define MCI_RDR 0x0030
15397 +#define MCI_TDR 0x0034
15398 +#define MCI_SR 0x0040
15399 +#define MCI_IER 0x0044
15400 +#define MCI_IDR 0x0048
15401 +#define MCI_IMR 0x004c
15402 +
15403 +/* Bitfields in CR */
15404 +#define MCI_MCIEN_OFFSET 0
15405 +#define MCI_MCIEN_SIZE 1
15406 +#define MCI_MCIDIS_OFFSET 1
15407 +#define MCI_MCIDIS_SIZE 1
15408 +#define MCI_PWSEN_OFFSET 2
15409 +#define MCI_PWSEN_SIZE 1
15410 +#define MCI_PWSDIS_OFFSET 3
15411 +#define MCI_PWSDIS_SIZE 1
15412 +#define MCI_SWRST_OFFSET 7
15413 +#define MCI_SWRST_SIZE 1
15414 +
15415 +/* Bitfields in MR */
15416 +#define MCI_CLKDIV_OFFSET 0
15417 +#define MCI_CLKDIV_SIZE 8
15418 +#define MCI_PWSDIV_OFFSET 8
15419 +#define MCI_PWSDIV_SIZE 3
15420 +#define MCI_RDPROOF_OFFSET 11
15421 +#define MCI_RDPROOF_SIZE 1
15422 +#define MCI_WRPROOF_OFFSET 12
15423 +#define MCI_WRPROOF_SIZE 1
15424 +#define MCI_DMAPADV_OFFSET 14
15425 +#define MCI_DMAPADV_SIZE 1
15426 +#define MCI_BLKLEN_OFFSET 16
15427 +#define MCI_BLKLEN_SIZE 16
15428 +
15429 +/* Bitfields in DTOR */
15430 +#define MCI_DTOCYC_OFFSET 0
15431 +#define MCI_DTOCYC_SIZE 4
15432 +#define MCI_DTOMUL_OFFSET 4
15433 +#define MCI_DTOMUL_SIZE 3
15434 +
15435 +/* Bitfields in SDCR */
15436 +#define MCI_SDCSEL_OFFSET 0
15437 +#define MCI_SDCSEL_SIZE 4
15438 +#define MCI_SDCBUS_OFFSET 7
15439 +#define MCI_SDCBUS_SIZE 1
15440 +
15441 +/* Bitfields in ARGR */
15442 +#define MCI_ARG_OFFSET 0
15443 +#define MCI_ARG_SIZE 32
15444 +
15445 +/* Bitfields in CMDR */
15446 +#define MCI_CMDNB_OFFSET 0
15447 +#define MCI_CMDNB_SIZE 6
15448 +#define MCI_RSPTYP_OFFSET 6
15449 +#define MCI_RSPTYP_SIZE 2
15450 +#define MCI_SPCMD_OFFSET 8
15451 +#define MCI_SPCMD_SIZE 3
15452 +#define MCI_OPDCMD_OFFSET 11
15453 +#define MCI_OPDCMD_SIZE 1
15454 +#define MCI_MAXLAT_OFFSET 12
15455 +#define MCI_MAXLAT_SIZE 1
15456 +#define MCI_TRCMD_OFFSET 16
15457 +#define MCI_TRCMD_SIZE 2
15458 +#define MCI_TRDIR_OFFSET 18
15459 +#define MCI_TRDIR_SIZE 1
15460 +#define MCI_TRTYP_OFFSET 19
15461 +#define MCI_TRTYP_SIZE 2
15462 +
15463 +/* Bitfields in BLKR */
15464 +#define MCI_BCNT_OFFSET 0
15465 +#define MCI_BCNT_SIZE 16
15466 +
15467 +/* Bitfields in RSPRn */
15468 +#define MCI_RSP_OFFSET 0
15469 +#define MCI_RSP_SIZE 32
15470 +
15471 +/* Bitfields in SR/IER/IDR/IMR */
15472 +#define MCI_CMDRDY_OFFSET 0
15473 +#define MCI_CMDRDY_SIZE 1
15474 +#define MCI_RXRDY_OFFSET 1
15475 +#define MCI_RXRDY_SIZE 1
15476 +#define MCI_TXRDY_OFFSET 2
15477 +#define MCI_TXRDY_SIZE 1
15478 +#define MCI_BLKE_OFFSET 3
15479 +#define MCI_BLKE_SIZE 1
15480 +#define MCI_DTIP_OFFSET 4
15481 +#define MCI_DTIP_SIZE 1
15482 +#define MCI_NOTBUSY_OFFSET 5
15483 +#define MCI_NOTBUSY_SIZE 1
15484 +#define MCI_ENDRX_OFFSET 6
15485 +#define MCI_ENDRX_SIZE 1
15486 +#define MCI_ENDTX_OFFSET 7
15487 +#define MCI_ENDTX_SIZE 1
15488 +#define MCI_RXBUFF_OFFSET 14
15489 +#define MCI_RXBUFF_SIZE 1
15490 +#define MCI_TXBUFE_OFFSET 15
15491 +#define MCI_TXBUFE_SIZE 1
15492 +#define MCI_RINDE_OFFSET 16
15493 +#define MCI_RINDE_SIZE 1
15494 +#define MCI_RDIRE_OFFSET 17
15495 +#define MCI_RDIRE_SIZE 1
15496 +#define MCI_RCRCE_OFFSET 18
15497 +#define MCI_RCRCE_SIZE 1
15498 +#define MCI_RENDE_OFFSET 19
15499 +#define MCI_RENDE_SIZE 1
15500 +#define MCI_RTOE_OFFSET 20
15501 +#define MCI_RTOE_SIZE 1
15502 +#define MCI_DCRCE_OFFSET 21
15503 +#define MCI_DCRCE_SIZE 1
15504 +#define MCI_DTOE_OFFSET 22
15505 +#define MCI_DTOE_SIZE 1
15506 +#define MCI_OVRE_OFFSET 30
15507 +#define MCI_OVRE_SIZE 1
15508 +#define MCI_UNRE_OFFSET 31
15509 +#define MCI_UNRE_SIZE 1
15510 +
15511 +/* Constants for DTOMUL */
15512 +#define MCI_DTOMUL_1_CYCLE 0
15513 +#define MCI_DTOMUL_16_CYCLES 1
15514 +#define MCI_DTOMUL_128_CYCLES 2
15515 +#define MCI_DTOMUL_256_CYCLES 3
15516 +#define MCI_DTOMUL_1024_CYCLES 4
15517 +#define MCI_DTOMUL_4096_CYCLES 5
15518 +#define MCI_DTOMUL_65536_CYCLES 6
15519 +#define MCI_DTOMUL_1048576_CYCLES 7
15520 +
15521 +/* Constants for RSPTYP */
15522 +#define MCI_RSPTYP_NO_RESP 0
15523 +#define MCI_RSPTYP_48_BIT 1
15524 +#define MCI_RSPTYP_136_BIT 2
15525 +
15526 +/* Constants for SPCMD */
15527 +#define MCI_SPCMD_NO_SPEC_CMD 0
15528 +#define MCI_SPCMD_INIT_CMD 1
15529 +#define MCI_SPCMD_SYNC_CMD 2
15530 +#define MCI_SPCMD_INT_CMD 4
15531 +#define MCI_SPCMD_INT_RESP 5
15532 +
15533 +/* Constants for TRCMD */
15534 +#define MCI_TRCMD_NO_TRANS 0
15535 +#define MCI_TRCMD_START_TRANS 1
15536 +#define MCI_TRCMD_STOP_TRANS 2
15537 +
15538 +/* Constants for TRTYP */
15539 +#define MCI_TRTYP_BLOCK 0
15540 +#define MCI_TRTYP_MULTI_BLOCK 1
15541 +#define MCI_TRTYP_STREAM 2
15542 +
15543 +/* Bit manipulation macros */
15544 +#define MCI_BIT(name) \
15545 + (1 << MCI_##name##_OFFSET)
15546 +#define MCI_BF(name,value) \
15547 + (((value) & ((1 << MCI_##name##_SIZE) - 1)) \
15548 + << MCI_##name##_OFFSET)
15549 +#define MCI_BFEXT(name,value) \
15550 + (((value) >> MCI_##name##_OFFSET) \
15551 + & ((1 << MCI_##name##_SIZE) - 1))
15552 +#define MCI_BFINS(name,value,old) \
15553 + (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \
15554 + << MCI_##name##_OFFSET)) \
15555 + | MCI_BF(name,value))
15556 +
15557 +/* Register access macros */
15558 +#define mci_readl(port,reg) \
15559 + __raw_readl((port)->regs + MCI_##reg)
15560 +#define mci_writel(port,reg,value) \
15561 + __raw_writel((value), (port)->regs + MCI_##reg)
15562 +
15563 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
15564 diff -urN linux-2.6.24.3/drivers/mmc/host/Kconfig avr32-2.6/drivers/mmc/host/Kconfig
15565 --- linux-2.6.24.3/drivers/mmc/host/Kconfig 2008-02-26 01:20:20.000000000 +0100
15566 +++ avr32-2.6/drivers/mmc/host/Kconfig 2008-04-23 19:33:40.000000000 +0200
15567 @@ -91,6 +91,16 @@
15568
15569 If unsure, say N.
15570
15571 +config MMC_ATMELMCI
15572 + tristate "Atmel Multimedia Card Interface support"
15573 + depends on AVR32 && MMC
15574 + help
15575 + This selects the Atmel Multimedia Card Interface. If you have
15576 + a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
15577 + slot, say Y or M here.
15578 +
15579 + If unsure, say N.
15580 +
15581 config MMC_IMX
15582 tristate "Motorola i.MX Multimedia Card Interface support"
15583 depends on ARCH_IMX
15584 diff -urN linux-2.6.24.3/drivers/mmc/host/Makefile avr32-2.6/drivers/mmc/host/Makefile
15585 --- linux-2.6.24.3/drivers/mmc/host/Makefile 2008-02-26 01:20:20.000000000 +0100
15586 +++ avr32-2.6/drivers/mmc/host/Makefile 2008-04-23 19:33:40.000000000 +0200
15587 @@ -15,6 +15,7 @@
15588 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
15589 obj-$(CONFIG_MMC_OMAP) += omap.o
15590 obj-$(CONFIG_MMC_AT91) += at91_mci.o
15591 +obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
15592 obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
15593 obj-$(CONFIG_MMC_SPI) += mmc_spi.o
15594
15595 diff -urN linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0001.c avr32-2.6/drivers/mtd/chips/cfi_cmdset_0001.c
15596 --- linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0001.c 2008-02-26 01:20:20.000000000 +0100
15597 +++ avr32-2.6/drivers/mtd/chips/cfi_cmdset_0001.c 2008-04-23 20:12:41.000000000 +0200
15598 @@ -50,6 +50,7 @@
15599 #define I82802AC 0x00ac
15600 #define MANUFACTURER_ST 0x0020
15601 #define M50LPW080 0x002F
15602 +#define AT49BV640D 0x02de
15603
15604 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
15605 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
15606 @@ -157,6 +158,47 @@
15607 }
15608 #endif
15609
15610 +/* Atmel chips don't use the same PRI format as Intel chips */
15611 +static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
15612 +{
15613 + struct map_info *map = mtd->priv;
15614 + struct cfi_private *cfi = map->fldrv_priv;
15615 + struct cfi_pri_intelext *extp = cfi->cmdset_priv;
15616 + struct cfi_pri_atmel atmel_pri;
15617 + uint32_t features = 0;
15618 +
15619 + /* Reverse byteswapping */
15620 + extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
15621 + extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
15622 + extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
15623 +
15624 + memcpy(&atmel_pri, extp, sizeof(atmel_pri));
15625 + memset((char *)extp + 5, 0, sizeof(*extp) - 5);
15626 +
15627 + printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
15628 +
15629 + if (atmel_pri.Features & 0x01) /* chip erase supported */
15630 + features |= (1<<0);
15631 + if (atmel_pri.Features & 0x02) /* erase suspend supported */
15632 + features |= (1<<1);
15633 + if (atmel_pri.Features & 0x04) /* program suspend supported */
15634 + features |= (1<<2);
15635 + if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
15636 + features |= (1<<9);
15637 + if (atmel_pri.Features & 0x20) /* page mode read supported */
15638 + features |= (1<<7);
15639 + if (atmel_pri.Features & 0x40) /* queued erase supported */
15640 + features |= (1<<4);
15641 + if (atmel_pri.Features & 0x80) /* Protection bits supported */
15642 + features |= (1<<6);
15643 +
15644 + extp->FeatureSupport = features;
15645 +
15646 + /* burst write mode not supported */
15647 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15648 + cfi->cfiq->BufWriteTimeoutMax = 0;
15649 +}
15650 +
15651 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15652 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
15653 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
15654 @@ -234,6 +276,7 @@
15655 }
15656
15657 static struct cfi_fixup cfi_fixup_table[] = {
15658 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15659 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15660 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
15661 #endif
15662 diff -urN linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0002.c avr32-2.6/drivers/mtd/chips/cfi_cmdset_0002.c
15663 --- linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0002.c 2008-02-26 01:20:20.000000000 +0100
15664 +++ avr32-2.6/drivers/mtd/chips/cfi_cmdset_0002.c 2008-04-23 20:12:41.000000000 +0200
15665 @@ -185,6 +185,10 @@
15666 extp->TopBottom = 2;
15667 else
15668 extp->TopBottom = 3;
15669 +
15670 + /* burst write mode not supported */
15671 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15672 + cfi->cfiq->BufWriteTimeoutMax = 0;
15673 }
15674
15675 static void fixup_use_secsi(struct mtd_info *mtd, void *param)
15676 @@ -217,6 +221,7 @@
15677 }
15678
15679 static struct cfi_fixup cfi_fixup_table[] = {
15680 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15681 #ifdef AMD_BOOTLOC_BUG
15682 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
15683 #endif
15684 @@ -229,7 +234,6 @@
15685 #if !FORCE_WORD_WRITE
15686 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
15687 #endif
15688 - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15689 { 0, 0, NULL, NULL }
15690 };
15691 static struct cfi_fixup jedec_fixup_table[] = {
15692 diff -urN linux-2.6.24.3/drivers/net/macb.c avr32-2.6/drivers/net/macb.c
15693 --- linux-2.6.24.3/drivers/net/macb.c 2008-02-26 01:20:20.000000000 +0100
15694 +++ avr32-2.6/drivers/net/macb.c 2008-04-23 20:12:41.000000000 +0200
15695 @@ -148,7 +148,7 @@
15696
15697 if (phydev->duplex)
15698 reg |= MACB_BIT(FD);
15699 - if (phydev->speed)
15700 + if (phydev->speed == SPEED_100)
15701 reg |= MACB_BIT(SPD);
15702
15703 macb_writel(bp, NCFGR, reg);
15704 diff -urN linux-2.6.24.3/drivers/pcmcia/at32_cf.c avr32-2.6/drivers/pcmcia/at32_cf.c
15705 --- linux-2.6.24.3/drivers/pcmcia/at32_cf.c 1970-01-01 01:00:00.000000000 +0100
15706 +++ avr32-2.6/drivers/pcmcia/at32_cf.c 2008-04-23 19:33:42.000000000 +0200
15707 @@ -0,0 +1,533 @@
15708 +/*
15709 + * Driver for AVR32 Static Memory Controller: CompactFlash support
15710 + *
15711 + * Copyright (C) 2006 Atmel Norway
15712 + *
15713 + * This program is free software; you can redistribute it and/or
15714 + * modify it under the terms of the GNU General Public License as
15715 + * published by the Free Software Foundation; either version 2 of the
15716 + * License, or (at your option) any later version.
15717 + *
15718 + * This program is distributed in the hope that it will be useful, but
15719 + * WITHOUT ANY WARRANTY; without even the implied warranty of
15720 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15721 + * General Public License for more details.
15722 + *
15723 + * You should have received a copy of the GNU General Public License
15724 + * along with this program; if not, write to the Free Software
15725 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
15726 + * 02111-1307, USA.
15727 + *
15728 + * The full GNU General Public License is included in this
15729 + * distribution in the file called COPYING.
15730 + */
15731 +#include <linux/module.h>
15732 +#include <linux/kernel.h>
15733 +#include <linux/platform_device.h>
15734 +#include <linux/init.h>
15735 +#include <linux/device.h>
15736 +#include <linux/delay.h>
15737 +#include <linux/interrupt.h>
15738 +#include <linux/err.h>
15739 +#include <linux/clk.h>
15740 +#include <linux/dma-mapping.h>
15741 +
15742 +#include <pcmcia/ss.h>
15743 +
15744 +#include <asm/gpio.h>
15745 +#include <asm/io.h>
15746 +#include <asm/arch/board.h>
15747 +
15748 +#include <asm/arch/smc.h>
15749 +
15750 +struct at32_cf_socket {
15751 + struct pcmcia_socket socket;
15752 + int detect_pin;
15753 + int reset_pin;
15754 + int vcc_pin;
15755 + int ready_pin;
15756 + struct resource res_attr;
15757 + struct resource res_mem;
15758 + struct resource res_io;
15759 + struct smc_config smc;
15760 + unsigned int irq;
15761 + unsigned int cf_cs;
15762 + socket_state_t state;
15763 + unsigned present:1;
15764 +};
15765 +#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
15766 +
15767 +/*
15768 + * We have the following memory layout relative to the base address:
15769 + *
15770 + * Alt IDE Mode: 00e0 0000 -> 00ff ffff
15771 + * True IDE Mode: 00c0 0000 -> 00df ffff
15772 + * I/O memory: 0080 0000 -> 00bf ffff
15773 + * Common memory: 0040 0000 -> 007f ffff
15774 + * Attribute memory: 0000 0000 -> 003f ffff
15775 + */
15776 +#define CF_ATTR_OFFSET 0x00000000
15777 +#define CF_MEM_OFFSET 0x00400000
15778 +#define CF_IO_OFFSET 0x00800000
15779 +#define CF_RES_SIZE 4096
15780 +
15781 +#ifdef DEBUG
15782 +
15783 +static int pc_debug;
15784 +module_param(pc_debug, int, 0644);
15785 +
15786 +static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
15787 + int level, const char *fmt, ...)
15788 +{
15789 + va_list args;
15790 +
15791 + if (pc_debug > level) {
15792 + printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
15793 + va_start(args, fmt);
15794 + vprintk(fmt, args);
15795 + va_end(args);
15796 + }
15797 +}
15798 +
15799 +#define debug(cf, lvl, fmt, arg...) \
15800 + at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
15801 +
15802 +#else
15803 +#define debug(cf, lvl, fmt, arg...) do { } while (0)
15804 +#endif
15805 +
15806 +static inline int at32_cf_present(struct at32_cf_socket *cf)
15807 +{
15808 + int present = 1;
15809 +
15810 + /* If we don't have a detect pin, assume the card is present */
15811 + if (cf->detect_pin >= 0)
15812 + present = !gpio_get_value(cf->detect_pin);
15813 +
15814 + return present;
15815 +}
15816 +
15817 +static irqreturn_t at32_cf_irq(int irq, void *dev_id)
15818 +{
15819 + struct at32_cf_socket *cf = dev_id;
15820 + unsigned int present;
15821 +
15822 + present = at32_cf_present(cf);
15823 + if (present != cf->present) {
15824 + cf->present = present;
15825 + debug(cf, 3, "card %s\n", present ? "present" : "gone");
15826 + pcmcia_parse_events(&cf->socket, SS_DETECT);
15827 + }
15828 +
15829 + return IRQ_HANDLED;
15830 +}
15831 +
15832 +static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
15833 +{
15834 + struct at32_cf_socket *cf;
15835 + u_int status = 0;
15836 +
15837 + cf = container_of(sock, struct at32_cf_socket, socket);
15838 +
15839 + if (at32_cf_present(cf)) {
15840 + /* NOTE: gpio on AP7xxx is 3.3V */
15841 + status = SS_DETECT | SS_3VCARD;
15842 + if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
15843 + status |= SS_READY;
15844 + if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
15845 + status |= SS_POWERON;
15846 + }
15847 +
15848 + *value = status;
15849 + return 0;
15850 +}
15851 +
15852 +static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
15853 +{
15854 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15855 +
15856 + debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
15857 + (state->csc_mask==0)?"<NONE> ":"",
15858 + (state->csc_mask&SS_DETECT)?"DETECT ":"",
15859 + (state->csc_mask&SS_READY)?"READY ":"",
15860 + (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
15861 + (state->csc_mask&SS_BATWARN)?"BATWARN ":"",
15862 + (state->csc_mask&SS_STSCHG)?"STSCHG ":"",
15863 + (state->flags==0)?"<NONE> ":"",
15864 + (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
15865 + (state->flags&SS_IOCARD)?"IOCARD ":"",
15866 + (state->flags&SS_RESET)?"RESET ":"",
15867 + (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
15868 + (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
15869 + state->Vcc, state->Vpp, state->io_irq);
15870 +
15871 + /*
15872 + * TODO: Allow boards to override this in case they have level
15873 + * converters.
15874 + */
15875 + switch (state->Vcc) {
15876 + case 0:
15877 + if (cf->vcc_pin >= 0)
15878 + gpio_set_value(cf->vcc_pin, 0);
15879 + break;
15880 + case 33:
15881 + if (cf->vcc_pin >= 0)
15882 + gpio_set_value(cf->vcc_pin, 1);
15883 + break;
15884 + default:
15885 + return -EINVAL;
15886 + }
15887 +
15888 + if (cf->reset_pin >= 0)
15889 + gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
15890 +
15891 + cf->state = *state;
15892 +
15893 + return 0;
15894 +}
15895 +
15896 +static int at32_cf_socket_init(struct pcmcia_socket *sock)
15897 +{
15898 + debug(to_at32_cf(sock), 2, "called\n");
15899 +
15900 + return 0;
15901 +}
15902 +
15903 +static int at32_cf_suspend(struct pcmcia_socket *sock)
15904 +{
15905 + debug(to_at32_cf(sock), 2, "called\n");
15906 +
15907 + at32_cf_set_socket(sock, &dead_socket);
15908 +
15909 + return 0;
15910 +}
15911 +
15912 +static int at32_cf_set_io_map(struct pcmcia_socket *sock,
15913 + struct pccard_io_map *map)
15914 +{
15915 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15916 + int retval;
15917 +
15918 + debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n",
15919 + map->map, map->speed, map->start, map->stop);
15920 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15921 + (map->flags == 0) ? "<NONE>":"",
15922 + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
15923 + (map->flags & MAP_16BIT) ? "16BIT " : "",
15924 + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
15925 + (map->flags & MAP_0WS) ? "0WS " : "",
15926 + (map->flags & MAP_WRPROT) ? "WRPROT " : "",
15927 + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
15928 + (map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
15929 +
15930 + map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
15931 +
15932 + if (map->flags & MAP_16BIT)
15933 + cf->smc.bus_width = 2;
15934 + else
15935 + cf->smc.bus_width = 1;
15936 +
15937 + if (map->flags & MAP_USE_WAIT)
15938 + cf->smc.nwait_mode = 3;
15939 + else
15940 + cf->smc.nwait_mode = 0;
15941 +
15942 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15943 + if (retval) {
15944 + printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
15945 + return retval;
15946 + }
15947 +
15948 + map->start = cf->socket.io_offset;
15949 + map->stop = map->start + CF_RES_SIZE - 1;
15950 +
15951 + return 0;
15952 +}
15953 +
15954 +static int
15955 +at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
15956 +{
15957 + struct at32_cf_socket *cf;
15958 + struct resource *res;
15959 + int retval;
15960 +
15961 + cf = container_of(sock, struct at32_cf_socket, socket);
15962 +
15963 + debug(cf, 2, "map %u speed %u card_start %08x\n",
15964 + map->map, map->speed, map->card_start);
15965 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15966 + (map->flags==0)?"<NONE>":"",
15967 + (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
15968 + (map->flags&MAP_16BIT)?"16BIT ":"",
15969 + (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
15970 + (map->flags&MAP_0WS)?"0WS ":"",
15971 + (map->flags&MAP_WRPROT)?"WRPROT ":"",
15972 + (map->flags&MAP_ATTRIB)?"ATTRIB ":"",
15973 + (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
15974 +
15975 + if (map->card_start)
15976 + return -EINVAL;
15977 +
15978 + map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
15979 +
15980 + if (map->flags & MAP_ATTRIB) {
15981 + res = &cf->res_attr;
15982 +
15983 + /* Linksys WCF12 seems to use WAIT when reading CIS */
15984 + map->flags |= MAP_USE_WAIT;
15985 + } else {
15986 + res = &cf->res_mem;
15987 + }
15988 +
15989 + if (map->flags & MAP_USE_WAIT)
15990 + cf->smc.nwait_mode = 3;
15991 + else
15992 + cf->smc.nwait_mode = 0;
15993 +
15994 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15995 + if (retval) {
15996 + printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
15997 + return retval;
15998 + }
15999 +
16000 + map->static_start = res->start;
16001 +
16002 + return 0;
16003 +}
16004 +
16005 +static struct pccard_operations at32_cf_ops = {
16006 + .init = at32_cf_socket_init,
16007 + .suspend = at32_cf_suspend,
16008 + .get_status = at32_cf_get_status,
16009 + .set_socket = at32_cf_set_socket,
16010 + .set_io_map = at32_cf_set_io_map,
16011 + .set_mem_map = at32_cf_set_mem_map,
16012 +};
16013 +
16014 +static int __init request_pin(struct platform_device *pdev,
16015 + unsigned int pin, const char *name)
16016 +{
16017 + if (gpio_request(pin, name)) {
16018 + dev_warn(&pdev->dev, "failed to request %s pin\n", name);
16019 + return -1;
16020 + }
16021 +
16022 + return pin;
16023 +}
16024 +
16025 +static struct smc_timing at32_cf_timing __initdata = {
16026 + .ncs_read_setup = 30,
16027 + .nrd_setup = 100,
16028 + .ncs_write_setup = 30,
16029 + .nwe_setup = 100,
16030 +
16031 + .ncs_read_pulse = 360,
16032 + .nrd_pulse = 290,
16033 + .ncs_write_pulse = 360,
16034 + .nwe_pulse = 290,
16035 +
16036 + .read_cycle = 420,
16037 + .write_cycle = 420,
16038 +};
16039 +
16040 +static int __init at32_cf_probe(struct platform_device *pdev)
16041 +{
16042 + struct at32_cf_socket *cf;
16043 + struct cf_platform_data *board = pdev->dev.platform_data;
16044 + struct resource *res_skt;
16045 + int irq;
16046 + int ret;
16047 +
16048 + dev_dbg(&pdev->dev, "probe");
16049 +
16050 + if (!board)
16051 + return -ENXIO;
16052 +
16053 + res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
16054 + if (!res_skt)
16055 + return -ENXIO;
16056 +
16057 + irq = platform_get_irq(pdev, 0);
16058 + if (irq < 0)
16059 + return irq;
16060 +
16061 + cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
16062 + if (!cf)
16063 + return -ENOMEM;
16064 +
16065 + cf->detect_pin = -1;
16066 + cf->reset_pin = -1;
16067 + cf->vcc_pin = -1;
16068 + cf->ready_pin = -1;
16069 + cf->cf_cs = board->cs;
16070 +
16071 + if (board->detect_pin != GPIO_PIN_NONE)
16072 + cf->detect_pin = request_pin(pdev, board->detect_pin,
16073 + "cf_detect");
16074 + if (board->reset_pin != GPIO_PIN_NONE)
16075 + cf->reset_pin = request_pin(pdev, board->reset_pin,
16076 + "cf_reset");
16077 + if (board->vcc_pin != GPIO_PIN_NONE)
16078 + cf->vcc_pin = request_pin(pdev, board->vcc_pin,
16079 + "cf_vcc");
16080 + if (board->ready_pin != GPIO_PIN_NONE)
16081 + /* READY is also used for irq through EIM */
16082 + cf->ready_pin = board->ready_pin;
16083 +
16084 + debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
16085 + cf->detect_pin, cf->reset_pin, cf->vcc_pin);
16086 +
16087 + cf->socket.pci_irq = irq;
16088 + cf->socket.ops = &at32_cf_ops;
16089 + cf->socket.resource_ops = &pccard_static_ops;
16090 + cf->socket.dev.parent = &pdev->dev;
16091 + cf->socket.owner = THIS_MODULE;
16092 + cf->socket.features =
16093 + SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
16094 + cf->socket.map_size = CF_RES_SIZE;
16095 +
16096 + cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
16097 + cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
16098 + cf->res_attr.name = "attribute";
16099 + cf->res_attr.flags = IORESOURCE_MEM;
16100 + ret = request_resource(res_skt, &cf->res_attr);
16101 + if (ret)
16102 + goto err_request_res_attr;
16103 +
16104 + cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
16105 + cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
16106 + cf->res_mem.name = "memory";
16107 + cf->res_mem.flags = IORESOURCE_MEM;
16108 + ret = request_resource(res_skt, &cf->res_mem);
16109 + if (ret)
16110 + goto err_request_res_mem;
16111 +
16112 + cf->res_io.start = res_skt->start + CF_IO_OFFSET;
16113 + cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
16114 + cf->res_io.name = "io";
16115 + cf->res_io.flags = IORESOURCE_MEM;
16116 + ret = request_resource(res_skt, &cf->res_io);
16117 + if (ret)
16118 + goto err_request_res_io;
16119 +
16120 + cf->socket.io_offset = cf->res_io.start;
16121 +
16122 + if (cf->detect_pin >= 0) {
16123 + ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
16124 + IRQF_SHARED, "cf_detect", cf);
16125 + if (ret) {
16126 + debug(cf, 1,
16127 + "failed to request cf_detect interrupt\n");
16128 + goto err_detect_irq;
16129 + }
16130 + }
16131 +
16132 + cf->present = at32_cf_present(cf);
16133 +
16134 + /* Setup SMC timings */
16135 + smc_set_timing(&cf->smc, &at32_cf_timing);
16136 +
16137 + cf->smc.bus_width = 2;
16138 + cf->smc.nrd_controlled = 1;
16139 + cf->smc.nwe_controlled = 1;
16140 + cf->smc.nwait_mode = 0;
16141 + cf->smc.byte_write = 0;
16142 + cf->smc.tdf_cycles = 8;
16143 + cf->smc.tdf_mode = 0;
16144 +
16145 + ret = smc_set_configuration(cf->cf_cs, &cf->smc);
16146 + if (ret) {
16147 + debug(cf, 1, "failed to configure SMC\n", ret);
16148 + goto err_smc;
16149 + }
16150 +
16151 + ret = pcmcia_register_socket(&cf->socket);
16152 + if (ret) {
16153 + debug(cf, 1, "failed to register socket: %d\n", ret);
16154 + goto err_register_socket;
16155 + }
16156 +
16157 + if (cf->reset_pin >= 0)
16158 + gpio_direction_output(cf->reset_pin, 0);
16159 +
16160 + platform_set_drvdata(pdev, cf);
16161 +
16162 + dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
16163 + (unsigned long)res_skt->start);
16164 +
16165 + return 0;
16166 +
16167 +err_register_socket:
16168 +err_smc:
16169 + if (cf->detect_pin >= 0)
16170 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16171 +err_detect_irq:
16172 + release_resource(&cf->res_io);
16173 +err_request_res_io:
16174 + release_resource(&cf->res_mem);
16175 +err_request_res_mem:
16176 + release_resource(&cf->res_attr);
16177 +err_request_res_attr:
16178 + if (cf->vcc_pin >= 0)
16179 + gpio_free(cf->vcc_pin);
16180 + if (cf->reset_pin >= 0)
16181 + gpio_free(cf->reset_pin);
16182 + if (cf->detect_pin >= 0)
16183 + gpio_free(cf->detect_pin);
16184 + kfree(cf);
16185 +
16186 + return ret;
16187 +}
16188 +
16189 +static int __exit at32_cf_remove(struct platform_device *pdev)
16190 +{
16191 + struct at32_cf_socket *cf = platform_get_drvdata(pdev);
16192 +
16193 + pcmcia_unregister_socket(&cf->socket);
16194 + if (cf->detect_pin >= 0) {
16195 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16196 + gpio_free(cf->detect_pin);
16197 + }
16198 + if (cf->vcc_pin >= 0)
16199 + gpio_free(cf->vcc_pin);
16200 + if (cf->reset_pin >= 0)
16201 + gpio_free(cf->reset_pin);
16202 +
16203 + release_resource(&cf->res_io);
16204 + release_resource(&cf->res_mem);
16205 + release_resource(&cf->res_attr);
16206 + kfree(cf);
16207 + platform_set_drvdata(pdev, NULL);
16208 +
16209 + return 0;
16210 +}
16211 +
16212 +static struct platform_driver at32_cf_driver = {
16213 + .remove = __exit_p(at32_cf_remove),
16214 + .driver = {
16215 + .name = "at32_cf",
16216 + .owner = THIS_MODULE,
16217 + },
16218 +};
16219 +
16220 +static int __init at32_cf_init(void)
16221 +{
16222 + int ret;
16223 +
16224 + ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
16225 + if (ret)
16226 + printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
16227 + return ret;
16228 +}
16229 +
16230 +static void __exit at32_cf_exit(void)
16231 +{
16232 + platform_driver_unregister(&at32_cf_driver);
16233 +}
16234 +
16235 +module_init(at32_cf_init);
16236 +module_exit(at32_cf_exit);
16237 +
16238 +MODULE_LICENSE("GPL");
16239 +MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
16240 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
16241 diff -urN linux-2.6.24.3/drivers/pcmcia/Kconfig avr32-2.6/drivers/pcmcia/Kconfig
16242 --- linux-2.6.24.3/drivers/pcmcia/Kconfig 2008-02-26 01:20:20.000000000 +0100
16243 +++ avr32-2.6/drivers/pcmcia/Kconfig 2008-04-23 19:33:42.000000000 +0200
16244 @@ -276,6 +276,13 @@
16245 Say Y here to support the CompactFlash controller on the
16246 PA Semi Electra eval board.
16247
16248 +config AT32_CF
16249 + tristate "AT32AP CompactFlash Controller"
16250 + depends on PCMCIA && AVR32 && PLATFORM_AT32AP
16251 + help
16252 + Say Y here to support the CompactFlash controller on AT32 chips.
16253 + Or choose M to compile the driver as a module named "at32_cf".
16254 +
16255 config PCCARD_NONSTATIC
16256 tristate
16257
16258 diff -urN linux-2.6.24.3/drivers/pcmcia/Makefile avr32-2.6/drivers/pcmcia/Makefile
16259 --- linux-2.6.24.3/drivers/pcmcia/Makefile 2008-02-26 01:20:20.000000000 +0100
16260 +++ avr32-2.6/drivers/pcmcia/Makefile 2008-04-23 19:33:42.000000000 +0200
16261 @@ -38,6 +38,7 @@
16262 obj-$(CONFIG_OMAP_CF) += omap_cf.o
16263 obj-$(CONFIG_AT91_CF) += at91_cf.o
16264 obj-$(CONFIG_ELECTRA_CF) += electra_cf.o
16265 +obj-$(CONFIG_AT32_CF) += at32_cf.o
16266
16267 sa11xx_core-y += soc_common.o sa11xx_base.o
16268 pxa2xx_core-y += soc_common.o pxa2xx_base.o
16269 diff -urN linux-2.6.24.3/drivers/serial/atmel_serial.c avr32-2.6/drivers/serial/atmel_serial.c
16270 --- linux-2.6.24.3/drivers/serial/atmel_serial.c 2008-02-26 01:20:20.000000000 +0100
16271 +++ avr32-2.6/drivers/serial/atmel_serial.c 2008-04-23 20:12:44.000000000 +0200
16272 @@ -7,6 +7,8 @@
16273 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
16274 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
16275 *
16276 + * DMA support added by Chip Coldwell.
16277 + *
16278 * This program is free software; you can redistribute it and/or modify
16279 * it under the terms of the GNU General Public License as published by
16280 * the Free Software Foundation; either version 2 of the License, or
16281 @@ -33,7 +35,9 @@
16282 #include <linux/sysrq.h>
16283 #include <linux/tty_flip.h>
16284 #include <linux/platform_device.h>
16285 +#include <linux/dma-mapping.h>
16286 #include <linux/atmel_pdc.h>
16287 +#include <linux/atmel_serial.h>
16288
16289 #include <asm/io.h>
16290
16291 @@ -45,7 +49,9 @@
16292 #include <asm/arch/gpio.h>
16293 #endif
16294
16295 -#include "atmel_serial.h"
16296 +#define PDC_BUFFER_SIZE 512
16297 +/* Revisit: We should calculate this based on the actual port settings */
16298 +#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
16299
16300 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
16301 #define SUPPORT_SYSRQ
16302 @@ -74,6 +80,7 @@
16303
16304 #define ATMEL_ISR_PASS_LIMIT 256
16305
16306 +/* UART registers. CR is write-only, hence no GET macro */
16307 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
16308 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
16309 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
16310 @@ -87,8 +94,6 @@
16311 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
16312 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
16313
16314 -// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
16315 -
16316 /* PDC registers */
16317 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
16318 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
16319 @@ -101,12 +106,24 @@
16320
16321 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
16322 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
16323 -//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
16324 -//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
16325
16326 static int (*atmel_open_hook)(struct uart_port *);
16327 static void (*atmel_close_hook)(struct uart_port *);
16328
16329 +struct atmel_dma_buffer {
16330 + unsigned char *buf;
16331 + dma_addr_t dma_addr;
16332 + unsigned int dma_size;
16333 + unsigned int ofs;
16334 +};
16335 +
16336 +struct atmel_uart_char {
16337 + u16 status;
16338 + u16 ch;
16339 +};
16340 +
16341 +#define ATMEL_SERIAL_RINGSIZE 1024
16342 +
16343 /*
16344 * We wrap our port structure around the generic uart_port.
16345 */
16346 @@ -115,6 +132,19 @@
16347 struct clk *clk; /* uart clock */
16348 unsigned short suspended; /* is port suspended? */
16349 int break_active; /* break being received */
16350 +
16351 + short use_dma_rx; /* enable PDC receiver */
16352 + short pdc_rx_idx; /* current PDC RX buffer */
16353 + struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
16354 +
16355 + short use_dma_tx; /* enable PDC transmitter */
16356 + struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
16357 +
16358 + struct tasklet_struct tasklet;
16359 + unsigned int irq_status;
16360 + unsigned int irq_status_prev;
16361 +
16362 + struct circ_buf rx_ring;
16363 };
16364
16365 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
16366 @@ -123,6 +153,38 @@
16367 static struct console atmel_console;
16368 #endif
16369
16370 +static inline struct atmel_uart_port *
16371 +to_atmel_uart_port(struct uart_port *uart)
16372 +{
16373 + return container_of(uart, struct atmel_uart_port, uart);
16374 +}
16375 +
16376 +#ifdef CONFIG_SERIAL_ATMEL_PDC
16377 +static bool atmel_use_dma_rx(struct uart_port *port)
16378 +{
16379 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16380 +
16381 + return atmel_port->use_dma_rx;
16382 +}
16383 +
16384 +static bool atmel_use_dma_tx(struct uart_port *port)
16385 +{
16386 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16387 +
16388 + return atmel_port->use_dma_tx;
16389 +}
16390 +#else
16391 +static bool atmel_use_dma_rx(struct uart_port *port)
16392 +{
16393 + return false;
16394 +}
16395 +
16396 +static bool atmel_use_dma_tx(struct uart_port *port)
16397 +{
16398 + return false;
16399 +}
16400 +#endif
16401 +
16402 /*
16403 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
16404 */
16405 @@ -142,8 +204,8 @@
16406 #ifdef CONFIG_ARCH_AT91RM9200
16407 if (cpu_is_at91rm9200()) {
16408 /*
16409 - * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
16410 - * We need to drive the pin manually.
16411 + * AT91RM9200 Errata #39: RTS0 is not internally connected
16412 + * to PA21. We need to drive the pin manually.
16413 */
16414 if (port->mapbase == AT91RM9200_BASE_US0) {
16415 if (mctrl & TIOCM_RTS)
16416 @@ -204,7 +266,12 @@
16417 */
16418 static void atmel_stop_tx(struct uart_port *port)
16419 {
16420 - UART_PUT_IDR(port, ATMEL_US_TXRDY);
16421 + if (atmel_use_dma_tx(port)) {
16422 + /* disable PDC transmit */
16423 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16424 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16425 + } else
16426 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16427 }
16428
16429 /*
16430 @@ -212,7 +279,17 @@
16431 */
16432 static void atmel_start_tx(struct uart_port *port)
16433 {
16434 - UART_PUT_IER(port, ATMEL_US_TXRDY);
16435 + if (atmel_use_dma_tx(port)) {
16436 + if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
16437 + /* The transmitter is already running. Yes, we
16438 + really need this.*/
16439 + return;
16440 +
16441 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16442 + /* re-enable PDC transmit */
16443 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16444 + } else
16445 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16446 }
16447
16448 /*
16449 @@ -220,7 +297,12 @@
16450 */
16451 static void atmel_stop_rx(struct uart_port *port)
16452 {
16453 - UART_PUT_IDR(port, ATMEL_US_RXRDY);
16454 + if (atmel_use_dma_rx(port)) {
16455 + /* disable PDC receive */
16456 + UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
16457 + UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16458 + } else
16459 + UART_PUT_IDR(port, ATMEL_US_RXRDY);
16460 }
16461
16462 /*
16463 @@ -228,7 +310,8 @@
16464 */
16465 static void atmel_enable_ms(struct uart_port *port)
16466 {
16467 - UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16468 + UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
16469 + | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16470 }
16471
16472 /*
16473 @@ -243,22 +326,63 @@
16474 }
16475
16476 /*
16477 + * Stores the incoming character in the ring buffer
16478 + */
16479 +static void
16480 +atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
16481 + unsigned int ch)
16482 +{
16483 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16484 + struct circ_buf *ring = &atmel_port->rx_ring;
16485 + struct atmel_uart_char *c;
16486 +
16487 + if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
16488 + /* Buffer overflow, ignore char */
16489 + return;
16490 +
16491 + c = &((struct atmel_uart_char *)ring->buf)[ring->head];
16492 + c->status = status;
16493 + c->ch = ch;
16494 +
16495 + /* Make sure the character is stored before we update head. */
16496 + smp_wmb();
16497 +
16498 + ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16499 +}
16500 +
16501 +/*
16502 + * Deal with parity, framing and overrun errors.
16503 + */
16504 +static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
16505 +{
16506 + /* clear error */
16507 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16508 +
16509 + if (status & ATMEL_US_RXBRK) {
16510 + /* ignore side-effect */
16511 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16512 + port->icount.brk++;
16513 + }
16514 + if (status & ATMEL_US_PARE)
16515 + port->icount.parity++;
16516 + if (status & ATMEL_US_FRAME)
16517 + port->icount.frame++;
16518 + if (status & ATMEL_US_OVRE)
16519 + port->icount.overrun++;
16520 +}
16521 +
16522 +/*
16523 * Characters received (called from interrupt handler)
16524 */
16525 static void atmel_rx_chars(struct uart_port *port)
16526 {
16527 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16528 - struct tty_struct *tty = port->info->tty;
16529 - unsigned int status, ch, flg;
16530 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16531 + unsigned int status, ch;
16532
16533 status = UART_GET_CSR(port);
16534 while (status & ATMEL_US_RXRDY) {
16535 ch = UART_GET_CHAR(port);
16536
16537 - port->icount.rx++;
16538 -
16539 - flg = TTY_NORMAL;
16540 -
16541 /*
16542 * note that the error handling code is
16543 * out of the main execution path
16544 @@ -266,15 +390,14 @@
16545 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16546 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
16547 || atmel_port->break_active)) {
16548 - UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
16549 +
16550 + /* clear error */
16551 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16552 +
16553 if (status & ATMEL_US_RXBRK
16554 && !atmel_port->break_active) {
16555 - status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
16556 - port->icount.brk++;
16557 atmel_port->break_active = 1;
16558 UART_PUT_IER(port, ATMEL_US_RXBRK);
16559 - if (uart_handle_break(port))
16560 - goto ignore_char;
16561 } else {
16562 /*
16563 * This is either the end-of-break
16564 @@ -287,52 +410,30 @@
16565 status &= ~ATMEL_US_RXBRK;
16566 atmel_port->break_active = 0;
16567 }
16568 - if (status & ATMEL_US_PARE)
16569 - port->icount.parity++;
16570 - if (status & ATMEL_US_FRAME)
16571 - port->icount.frame++;
16572 - if (status & ATMEL_US_OVRE)
16573 - port->icount.overrun++;
16574 -
16575 - status &= port->read_status_mask;
16576 -
16577 - if (status & ATMEL_US_RXBRK)
16578 - flg = TTY_BREAK;
16579 - else if (status & ATMEL_US_PARE)
16580 - flg = TTY_PARITY;
16581 - else if (status & ATMEL_US_FRAME)
16582 - flg = TTY_FRAME;
16583 }
16584
16585 - if (uart_handle_sysrq_char(port, ch))
16586 - goto ignore_char;
16587 -
16588 - uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
16589 -
16590 - ignore_char:
16591 + atmel_buffer_rx_char(port, status, ch);
16592 status = UART_GET_CSR(port);
16593 }
16594
16595 - tty_flip_buffer_push(tty);
16596 + tasklet_schedule(&atmel_port->tasklet);
16597 }
16598
16599 /*
16600 - * Transmit characters (called from interrupt handler)
16601 + * Transmit characters (called from tasklet with TXRDY interrupt
16602 + * disabled)
16603 */
16604 static void atmel_tx_chars(struct uart_port *port)
16605 {
16606 struct circ_buf *xmit = &port->info->xmit;
16607
16608 - if (port->x_char) {
16609 + if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16610 UART_PUT_CHAR(port, port->x_char);
16611 port->icount.tx++;
16612 port->x_char = 0;
16613 - return;
16614 }
16615 - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
16616 - atmel_stop_tx(port);
16617 + if (uart_circ_empty(xmit) || uart_tx_stopped(port))
16618 return;
16619 - }
16620
16621 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16622 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
16623 @@ -345,8 +446,88 @@
16624 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16625 uart_write_wakeup(port);
16626
16627 - if (uart_circ_empty(xmit))
16628 - atmel_stop_tx(port);
16629 + if (!uart_circ_empty(xmit))
16630 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16631 +}
16632 +
16633 +/*
16634 + * receive interrupt handler.
16635 + */
16636 +static void
16637 +atmel_handle_receive(struct uart_port *port, unsigned int pending)
16638 +{
16639 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16640 +
16641 + if (atmel_use_dma_rx(port)) {
16642 + /*
16643 + * PDC receive. Just schedule the tasklet and let it
16644 + * figure out the details.
16645 + *
16646 + * TODO: We're not handling error flags correctly at
16647 + * the moment.
16648 + */
16649 + if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
16650 + UART_PUT_IDR(port, (ATMEL_US_ENDRX
16651 + | ATMEL_US_TIMEOUT));
16652 + tasklet_schedule(&atmel_port->tasklet);
16653 + }
16654 +
16655 + if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
16656 + ATMEL_US_FRAME | ATMEL_US_PARE))
16657 + atmel_pdc_rxerr(port, pending);
16658 + }
16659 +
16660 + /* Interrupt receive */
16661 + if (pending & ATMEL_US_RXRDY)
16662 + atmel_rx_chars(port);
16663 + else if (pending & ATMEL_US_RXBRK) {
16664 + /*
16665 + * End of break detected. If it came along with a
16666 + * character, atmel_rx_chars will handle it.
16667 + */
16668 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16669 + UART_PUT_IDR(port, ATMEL_US_RXBRK);
16670 + atmel_port->break_active = 0;
16671 + }
16672 +}
16673 +
16674 +/*
16675 + * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
16676 + */
16677 +static void
16678 +atmel_handle_transmit(struct uart_port *port, unsigned int pending)
16679 +{
16680 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16681 +
16682 + if (atmel_use_dma_tx(port)) {
16683 + /* PDC transmit */
16684 + if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
16685 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16686 + tasklet_schedule(&atmel_port->tasklet);
16687 + }
16688 + } else {
16689 + /* Interrupt transmit */
16690 + if (pending & ATMEL_US_TXRDY) {
16691 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16692 + tasklet_schedule(&atmel_port->tasklet);
16693 + }
16694 + }
16695 +}
16696 +
16697 +/*
16698 + * status flags interrupt handler.
16699 + */
16700 +static void
16701 +atmel_handle_status(struct uart_port *port, unsigned int pending,
16702 + unsigned int status)
16703 +{
16704 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16705 +
16706 + if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
16707 + | ATMEL_US_CTSIC)) {
16708 + atmel_port->irq_status = status;
16709 + tasklet_schedule(&atmel_port->tasklet);
16710 + }
16711 }
16712
16713 /*
16714 @@ -355,47 +536,255 @@
16715 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
16716 {
16717 struct uart_port *port = dev_id;
16718 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16719 unsigned int status, pending, pass_counter = 0;
16720
16721 - status = UART_GET_CSR(port);
16722 - pending = status & UART_GET_IMR(port);
16723 - while (pending) {
16724 - /* Interrupt receive */
16725 - if (pending & ATMEL_US_RXRDY)
16726 - atmel_rx_chars(port);
16727 - else if (pending & ATMEL_US_RXBRK) {
16728 + do {
16729 + status = UART_GET_CSR(port);
16730 + pending = status & UART_GET_IMR(port);
16731 + if (!pending)
16732 + break;
16733 +
16734 + atmel_handle_receive(port, pending);
16735 + atmel_handle_status(port, pending, status);
16736 + atmel_handle_transmit(port, pending);
16737 + } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
16738 +
16739 + return IRQ_HANDLED;
16740 +}
16741 +
16742 +/*
16743 + * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
16744 + */
16745 +static void atmel_tx_dma(struct uart_port *port)
16746 +{
16747 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16748 + struct circ_buf *xmit = &port->info->xmit;
16749 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
16750 + int count;
16751 +
16752 + xmit->tail += pdc->ofs;
16753 + xmit->tail &= UART_XMIT_SIZE - 1;
16754 +
16755 + port->icount.tx += pdc->ofs;
16756 + pdc->ofs = 0;
16757 +
16758 + if (!uart_circ_empty(xmit)) {
16759 + /* more to transmit - setup next transfer */
16760 +
16761 + /* disable PDC transmit */
16762 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16763 + dma_sync_single_for_device(port->dev,
16764 + pdc->dma_addr,
16765 + pdc->dma_size,
16766 + DMA_TO_DEVICE);
16767 +
16768 + count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
16769 + pdc->ofs = count;
16770 +
16771 + UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
16772 + UART_PUT_TCR(port, count);
16773 + /* re-enable PDC transmit and interrupts */
16774 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16775 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16776 + } else {
16777 + /* nothing left to transmit - disable the transmitter */
16778 +
16779 + /* disable PDC transmit */
16780 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16781 + }
16782 +
16783 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16784 + uart_write_wakeup(port);
16785 +}
16786 +
16787 +static void atmel_rx_from_ring(struct uart_port *port)
16788 +{
16789 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16790 + struct circ_buf *ring = &atmel_port->rx_ring;
16791 + unsigned int flg;
16792 + unsigned int status;
16793 +
16794 + while (ring->head != ring->tail) {
16795 + struct atmel_uart_char c;
16796 +
16797 + /* Make sure c is loaded after head. */
16798 + smp_rmb();
16799 +
16800 + c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
16801 +
16802 + ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16803 +
16804 + port->icount.rx++;
16805 + status = c.status;
16806 + flg = TTY_NORMAL;
16807 +
16808 + /*
16809 + * note that the error handling code is
16810 + * out of the main execution path
16811 + */
16812 + if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16813 + | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
16814 + if (status & ATMEL_US_RXBRK) {
16815 + /* ignore side-effect */
16816 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16817 +
16818 + port->icount.brk++;
16819 + if (uart_handle_break(port))
16820 + continue;
16821 + }
16822 + if (status & ATMEL_US_PARE)
16823 + port->icount.parity++;
16824 + if (status & ATMEL_US_FRAME)
16825 + port->icount.frame++;
16826 + if (status & ATMEL_US_OVRE)
16827 + port->icount.overrun++;
16828 +
16829 + status &= port->read_status_mask;
16830 +
16831 + if (status & ATMEL_US_RXBRK)
16832 + flg = TTY_BREAK;
16833 + else if (status & ATMEL_US_PARE)
16834 + flg = TTY_PARITY;
16835 + else if (status & ATMEL_US_FRAME)
16836 + flg = TTY_FRAME;
16837 + }
16838 +
16839 +
16840 + if (uart_handle_sysrq_char(port, c.ch))
16841 + continue;
16842 +
16843 + uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
16844 + }
16845 +
16846 + /*
16847 + * Drop the lock here since it might end up calling
16848 + * uart_start(), which takes the lock.
16849 + */
16850 + spin_unlock(&port->lock);
16851 + tty_flip_buffer_push(port->info->tty);
16852 + spin_lock(&port->lock);
16853 +}
16854 +
16855 +static void atmel_rx_from_dma(struct uart_port *port)
16856 +{
16857 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16858 + struct tty_struct *tty = port->info->tty;
16859 + struct atmel_dma_buffer *pdc;
16860 + int rx_idx = atmel_port->pdc_rx_idx;
16861 + unsigned int head;
16862 + unsigned int tail;
16863 + unsigned int count;
16864 +
16865 + do {
16866 + /* Reset the UART timeout early so that we don't miss one */
16867 + UART_PUT_CR(port, ATMEL_US_STTTO);
16868 +
16869 + pdc = &atmel_port->pdc_rx[rx_idx];
16870 + head = UART_GET_RPR(port) - pdc->dma_addr;
16871 + tail = pdc->ofs;
16872 +
16873 + /* If the PDC has switched buffers, RPR won't contain
16874 + * any address within the current buffer. Since head
16875 + * is unsigned, we just need a one-way comparison to
16876 + * find out.
16877 + *
16878 + * In this case, we just need to consume the entire
16879 + * buffer and resubmit it for DMA. This will clear the
16880 + * ENDRX bit as well, so that we can safely re-enable
16881 + * all interrupts below.
16882 + */
16883 + head = min(head, pdc->dma_size);
16884 +
16885 + if (likely(head != tail)) {
16886 + dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
16887 + pdc->dma_size, DMA_FROM_DEVICE);
16888 +
16889 /*
16890 - * End of break detected. If it came along
16891 - * with a character, atmel_rx_chars will
16892 - * handle it.
16893 + * head will only wrap around when we recycle
16894 + * the DMA buffer, and when that happens, we
16895 + * explicitly set tail to 0. So head will
16896 + * always be greater than tail.
16897 */
16898 - UART_PUT_CR(port, ATMEL_US_RSTSTA);
16899 - UART_PUT_IDR(port, ATMEL_US_RXBRK);
16900 - atmel_port->break_active = 0;
16901 + count = head - tail;
16902 +
16903 + tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
16904 +
16905 + dma_sync_single_for_device(port->dev, pdc->dma_addr,
16906 + pdc->dma_size, DMA_FROM_DEVICE);
16907 +
16908 + port->icount.rx += count;
16909 + pdc->ofs = head;
16910 + }
16911 +
16912 + /*
16913 + * If the current buffer is full, we need to check if
16914 + * the next one contains any additional data.
16915 + */
16916 + if (head >= pdc->dma_size) {
16917 + pdc->ofs = 0;
16918 + UART_PUT_RNPR(port, pdc->dma_addr);
16919 + UART_PUT_RNCR(port, pdc->dma_size);
16920 +
16921 + rx_idx = !rx_idx;
16922 + atmel_port->pdc_rx_idx = rx_idx;
16923 }
16924 + } while (head >= pdc->dma_size);
16925 +
16926 + /*
16927 + * Drop the lock here since it might end up calling
16928 + * uart_start(), which takes the lock.
16929 + */
16930 + spin_unlock(&port->lock);
16931 + tty_flip_buffer_push(tty);
16932 + spin_lock(&port->lock);
16933 +
16934 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16935 +}
16936
16937 - // TODO: All reads to CSR will clear these interrupts!
16938 - if (pending & ATMEL_US_RIIC) port->icount.rng++;
16939 - if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
16940 - if (pending & ATMEL_US_DCDIC)
16941 +/*
16942 + * tasklet handling tty stuff outside the interrupt handler.
16943 + */
16944 +static void atmel_tasklet_func(unsigned long data)
16945 +{
16946 + struct uart_port *port = (struct uart_port *)data;
16947 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16948 + unsigned int status;
16949 + unsigned int status_change;
16950 +
16951 + /* The interrupt handler does not take the lock */
16952 + spin_lock(&port->lock);
16953 +
16954 + if (atmel_use_dma_tx(port))
16955 + atmel_tx_dma(port);
16956 + else
16957 + atmel_tx_chars(port);
16958 +
16959 + status = atmel_port->irq_status;
16960 + status_change = status ^ atmel_port->irq_status_prev;
16961 +
16962 + if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
16963 + | ATMEL_US_DCD | ATMEL_US_CTS)) {
16964 + /* TODO: All reads to CSR will clear these interrupts! */
16965 + if (status_change & ATMEL_US_RI)
16966 + port->icount.rng++;
16967 + if (status_change & ATMEL_US_DSR)
16968 + port->icount.dsr++;
16969 + if (status_change & ATMEL_US_DCD)
16970 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
16971 - if (pending & ATMEL_US_CTSIC)
16972 + if (status_change & ATMEL_US_CTS)
16973 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
16974 - if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
16975 - wake_up_interruptible(&port->info->delta_msr_wait);
16976 -
16977 - /* Interrupt transmit */
16978 - if (pending & ATMEL_US_TXRDY)
16979 - atmel_tx_chars(port);
16980
16981 - if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
16982 - break;
16983 + wake_up_interruptible(&port->info->delta_msr_wait);
16984
16985 - status = UART_GET_CSR(port);
16986 - pending = status & UART_GET_IMR(port);
16987 + atmel_port->irq_status_prev = status;
16988 }
16989 - return IRQ_HANDLED;
16990 +
16991 + if (atmel_use_dma_rx(port))
16992 + atmel_rx_from_dma(port);
16993 + else
16994 + atmel_rx_from_ring(port);
16995 +
16996 + spin_unlock(&port->lock);
16997 }
16998
16999 /*
17000 @@ -403,6 +792,8 @@
17001 */
17002 static int atmel_startup(struct uart_port *port)
17003 {
17004 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17005 + struct tty_struct *tty = port->info->tty;
17006 int retval;
17007
17008 /*
17009 @@ -415,13 +806,64 @@
17010 /*
17011 * Allocate the IRQ
17012 */
17013 - retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
17014 + retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
17015 + tty ? tty->name : "atmel_serial", port);
17016 if (retval) {
17017 printk("atmel_serial: atmel_startup - Can't get irq\n");
17018 return retval;
17019 }
17020
17021 /*
17022 + * Initialize DMA (if necessary)
17023 + */
17024 + if (atmel_use_dma_rx(port)) {
17025 + int i;
17026 +
17027 + for (i = 0; i < 2; i++) {
17028 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
17029 +
17030 + pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
17031 + if (pdc->buf == NULL) {
17032 + if (i != 0) {
17033 + dma_unmap_single(port->dev,
17034 + atmel_port->pdc_rx[0].dma_addr,
17035 + PDC_BUFFER_SIZE,
17036 + DMA_FROM_DEVICE);
17037 + kfree(atmel_port->pdc_rx[0].buf);
17038 + }
17039 + free_irq(port->irq, port);
17040 + return -ENOMEM;
17041 + }
17042 + pdc->dma_addr = dma_map_single(port->dev,
17043 + pdc->buf,
17044 + PDC_BUFFER_SIZE,
17045 + DMA_FROM_DEVICE);
17046 + pdc->dma_size = PDC_BUFFER_SIZE;
17047 + pdc->ofs = 0;
17048 + }
17049 +
17050 + atmel_port->pdc_rx_idx = 0;
17051 +
17052 + UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
17053 + UART_PUT_RCR(port, PDC_BUFFER_SIZE);
17054 +
17055 + UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
17056 + UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
17057 + }
17058 + if (atmel_use_dma_tx(port)) {
17059 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
17060 + struct circ_buf *xmit = &port->info->xmit;
17061 +
17062 + pdc->buf = xmit->buf;
17063 + pdc->dma_addr = dma_map_single(port->dev,
17064 + pdc->buf,
17065 + UART_XMIT_SIZE,
17066 + DMA_TO_DEVICE);
17067 + pdc->dma_size = UART_XMIT_SIZE;
17068 + pdc->ofs = 0;
17069 + }
17070 +
17071 + /*
17072 * If there is a specific "open" function (to register
17073 * control line interrupts)
17074 */
17075 @@ -437,9 +879,21 @@
17076 * Finally, enable the serial port
17077 */
17078 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
17079 - UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
17080 + /* enable xmit & rcvr */
17081 + UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
17082
17083 - UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
17084 + if (atmel_use_dma_rx(port)) {
17085 + /* set UART timeout */
17086 + UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
17087 + UART_PUT_CR(port, ATMEL_US_STTTO);
17088 +
17089 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
17090 + /* enable PDC controller */
17091 + UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
17092 + } else {
17093 + /* enable receive only */
17094 + UART_PUT_IER(port, ATMEL_US_RXRDY);
17095 + }
17096
17097 return 0;
17098 }
17099 @@ -449,6 +903,38 @@
17100 */
17101 static void atmel_shutdown(struct uart_port *port)
17102 {
17103 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17104 + /*
17105 + * Ensure everything is stopped.
17106 + */
17107 + atmel_stop_rx(port);
17108 + atmel_stop_tx(port);
17109 +
17110 + /*
17111 + * Shut-down the DMA.
17112 + */
17113 + if (atmel_use_dma_rx(port)) {
17114 + int i;
17115 +
17116 + for (i = 0; i < 2; i++) {
17117 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
17118 +
17119 + dma_unmap_single(port->dev,
17120 + pdc->dma_addr,
17121 + pdc->dma_size,
17122 + DMA_FROM_DEVICE);
17123 + kfree(pdc->buf);
17124 + }
17125 + }
17126 + if (atmel_use_dma_tx(port)) {
17127 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
17128 +
17129 + dma_unmap_single(port->dev,
17130 + pdc->dma_addr,
17131 + pdc->dma_size,
17132 + DMA_TO_DEVICE);
17133 + }
17134 +
17135 /*
17136 * Disable all interrupts, port and break condition.
17137 */
17138 @@ -471,45 +957,48 @@
17139 /*
17140 * Power / Clock management.
17141 */
17142 -static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
17143 +static void atmel_serial_pm(struct uart_port *port, unsigned int state,
17144 + unsigned int oldstate)
17145 {
17146 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17147 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17148
17149 switch (state) {
17150 - case 0:
17151 - /*
17152 - * Enable the peripheral clock for this serial port.
17153 - * This is called on uart_open() or a resume event.
17154 - */
17155 - clk_enable(atmel_port->clk);
17156 - break;
17157 - case 3:
17158 - /*
17159 - * Disable the peripheral clock for this serial port.
17160 - * This is called on uart_close() or a suspend event.
17161 - */
17162 - clk_disable(atmel_port->clk);
17163 - break;
17164 - default:
17165 - printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17166 + case 0:
17167 + /*
17168 + * Enable the peripheral clock for this serial port.
17169 + * This is called on uart_open() or a resume event.
17170 + */
17171 + clk_enable(atmel_port->clk);
17172 + break;
17173 + case 3:
17174 + /*
17175 + * Disable the peripheral clock for this serial port.
17176 + * This is called on uart_close() or a suspend event.
17177 + */
17178 + clk_disable(atmel_port->clk);
17179 + break;
17180 + default:
17181 + printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17182 }
17183 }
17184
17185 /*
17186 * Change the port parameters
17187 */
17188 -static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
17189 +static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
17190 + struct ktermios *old)
17191 {
17192 unsigned long flags;
17193 unsigned int mode, imr, quot, baud;
17194
17195 /* Get current mode register */
17196 - mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17197 + mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
17198 + | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17199
17200 - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
17201 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
17202 quot = uart_get_divisor(port, baud);
17203
17204 - if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17205 + if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17206 quot /= 8;
17207 mode |= ATMEL_US_USCLKS_MCK_DIV8;
17208 }
17209 @@ -536,18 +1025,17 @@
17210
17211 /* parity */
17212 if (termios->c_cflag & PARENB) {
17213 - if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
17214 + /* Mark or Space parity */
17215 + if (termios->c_cflag & CMSPAR) {
17216 if (termios->c_cflag & PARODD)
17217 mode |= ATMEL_US_PAR_MARK;
17218 else
17219 mode |= ATMEL_US_PAR_SPACE;
17220 - }
17221 - else if (termios->c_cflag & PARODD)
17222 + } else if (termios->c_cflag & PARODD)
17223 mode |= ATMEL_US_PAR_ODD;
17224 else
17225 mode |= ATMEL_US_PAR_EVEN;
17226 - }
17227 - else
17228 + } else
17229 mode |= ATMEL_US_PAR_NONE;
17230
17231 spin_lock_irqsave(&port->lock, flags);
17232 @@ -558,6 +1046,10 @@
17233 if (termios->c_iflag & (BRKINT | PARMRK))
17234 port->read_status_mask |= ATMEL_US_RXBRK;
17235
17236 + if (atmel_use_dma_rx(port))
17237 + /* need to enable error interrupts */
17238 + UART_PUT_IER(port, port->read_status_mask);
17239 +
17240 /*
17241 * Characters to ignore
17242 */
17243 @@ -573,16 +1065,16 @@
17244 if (termios->c_iflag & IGNPAR)
17245 port->ignore_status_mask |= ATMEL_US_OVRE;
17246 }
17247 -
17248 - // TODO: Ignore all characters if CREAD is set.
17249 + /* TODO: Ignore all characters if CREAD is set.*/
17250
17251 /* update the per-port timeout */
17252 uart_update_timeout(port, termios->c_cflag, baud);
17253
17254 - /* disable interrupts and drain transmitter */
17255 - imr = UART_GET_IMR(port); /* get interrupt mask */
17256 - UART_PUT_IDR(port, -1); /* disable all interrupts */
17257 - while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
17258 + /* save/disable interrupts and drain transmitter */
17259 + imr = UART_GET_IMR(port);
17260 + UART_PUT_IDR(port, -1);
17261 + while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
17262 + cpu_relax();
17263
17264 /* disable receiver and transmitter */
17265 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
17266 @@ -708,7 +1200,8 @@
17267 /*
17268 * Configure the port from the platform device resource info.
17269 */
17270 -static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
17271 +static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
17272 + struct platform_device *pdev)
17273 {
17274 struct uart_port *port = &atmel_port->uart;
17275 struct atmel_uart_data *data = pdev->dev.platform_data;
17276 @@ -723,6 +1216,11 @@
17277 port->mapbase = pdev->resource[0].start;
17278 port->irq = pdev->resource[1].start;
17279
17280 + tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
17281 + (unsigned long)port);
17282 +
17283 + memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
17284 +
17285 if (data->regs)
17286 /* Already mapped by setup code */
17287 port->membase = data->regs;
17288 @@ -731,11 +1229,17 @@
17289 port->membase = NULL;
17290 }
17291
17292 - if (!atmel_port->clk) { /* for console, the clock could already be configured */
17293 + /* for console, the clock could already be configured */
17294 + if (!atmel_port->clk) {
17295 atmel_port->clk = clk_get(&pdev->dev, "usart");
17296 clk_enable(atmel_port->clk);
17297 port->uartclk = clk_get_rate(atmel_port->clk);
17298 }
17299 +
17300 + atmel_port->use_dma_rx = data->use_dma_rx;
17301 + atmel_port->use_dma_tx = data->use_dma_tx;
17302 + if (atmel_use_dma_tx(port))
17303 + port->fifosize = PDC_BUFFER_SIZE;
17304 }
17305
17306 /*
17307 @@ -755,12 +1259,11 @@
17308 atmel_pops.set_wake = fns->set_wake;
17309 }
17310
17311 -
17312 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
17313 static void atmel_console_putchar(struct uart_port *port, int ch)
17314 {
17315 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
17316 - barrier();
17317 + cpu_relax();
17318 UART_PUT_CHAR(port, ch);
17319 }
17320
17321 @@ -773,38 +1276,40 @@
17322 unsigned int status, imr;
17323
17324 /*
17325 - * First, save IMR and then disable interrupts
17326 + * First, save IMR and then disable interrupts
17327 */
17328 - imr = UART_GET_IMR(port); /* get interrupt mask */
17329 + imr = UART_GET_IMR(port);
17330 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
17331
17332 uart_console_write(port, s, count, atmel_console_putchar);
17333
17334 /*
17335 - * Finally, wait for transmitter to become empty
17336 - * and restore IMR
17337 + * Finally, wait for transmitter to become empty
17338 + * and restore IMR
17339 */
17340 do {
17341 status = UART_GET_CSR(port);
17342 } while (!(status & ATMEL_US_TXRDY));
17343 - UART_PUT_IER(port, imr); /* set interrupts back the way they were */
17344 + /* set interrupts back the way they were */
17345 + UART_PUT_IER(port, imr);
17346 }
17347
17348 /*
17349 - * If the port was already initialised (eg, by a boot loader), try to determine
17350 - * the current setup.
17351 + * If the port was already initialised (eg, by a boot loader),
17352 + * try to determine the current setup.
17353 */
17354 -static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
17355 +static void __init atmel_console_get_options(struct uart_port *port, int *baud,
17356 + int *parity, int *bits)
17357 {
17358 unsigned int mr, quot;
17359
17360 -// TODO: CR is a write-only register
17361 -// unsigned int cr;
17362 -//
17363 -// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
17364 -// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
17365 -// /* ok, the port was enabled */
17366 -// }
17367 + /*
17368 + * If the baud rate generator isn't running, the port wasn't
17369 + * initialized by the boot loader.
17370 + */
17371 + quot = UART_GET_BRGR(port);
17372 + if (!quot)
17373 + return;
17374
17375 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
17376 if (mr == ATMEL_US_CHRL_8)
17377 @@ -824,7 +1329,6 @@
17378 * lower than one of those, as it would make us fall through
17379 * to a much lower baud rate than we really want.
17380 */
17381 - quot = UART_GET_BRGR(port);
17382 *baud = port->uartclk / (16 * (quot - 1));
17383 }
17384
17385 @@ -836,10 +1340,12 @@
17386 int parity = 'n';
17387 int flow = 'n';
17388
17389 - if (port->membase == 0) /* Port not initialized yet - delay setup */
17390 + if (port->membase == NULL) {
17391 + /* Port not initialized yet - delay setup */
17392 return -ENODEV;
17393 + }
17394
17395 - UART_PUT_IDR(port, -1); /* disable interrupts */
17396 + UART_PUT_IDR(port, -1);
17397 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
17398 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
17399
17400 @@ -871,13 +1377,16 @@
17401 static int __init atmel_console_init(void)
17402 {
17403 if (atmel_default_console_device) {
17404 - add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
17405 - atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
17406 + add_preferred_console(ATMEL_DEVICENAME,
17407 + atmel_default_console_device->id, NULL);
17408 + atmel_init_port(&atmel_ports[atmel_default_console_device->id],
17409 + atmel_default_console_device);
17410 register_console(&atmel_console);
17411 }
17412
17413 return 0;
17414 }
17415 +
17416 console_initcall(atmel_console_init);
17417
17418 /*
17419 @@ -885,34 +1394,48 @@
17420 */
17421 static int __init atmel_late_console_init(void)
17422 {
17423 - if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
17424 + if (atmel_default_console_device
17425 + && !(atmel_console.flags & CON_ENABLED))
17426 register_console(&atmel_console);
17427
17428 return 0;
17429 }
17430 +
17431 core_initcall(atmel_late_console_init);
17432
17433 +static inline bool atmel_is_console_port(struct uart_port *port)
17434 +{
17435 + return port->cons && port->cons->index == port->line;
17436 +}
17437 +
17438 #else
17439 #define ATMEL_CONSOLE_DEVICE NULL
17440 +
17441 +static inline bool atmel_is_console_port(struct uart_port *port)
17442 +{
17443 + return false;
17444 +}
17445 #endif
17446
17447 static struct uart_driver atmel_uart = {
17448 - .owner = THIS_MODULE,
17449 - .driver_name = "atmel_serial",
17450 - .dev_name = ATMEL_DEVICENAME,
17451 - .major = SERIAL_ATMEL_MAJOR,
17452 - .minor = MINOR_START,
17453 - .nr = ATMEL_MAX_UART,
17454 - .cons = ATMEL_CONSOLE_DEVICE,
17455 + .owner = THIS_MODULE,
17456 + .driver_name = "atmel_serial",
17457 + .dev_name = ATMEL_DEVICENAME,
17458 + .major = SERIAL_ATMEL_MAJOR,
17459 + .minor = MINOR_START,
17460 + .nr = ATMEL_MAX_UART,
17461 + .cons = ATMEL_CONSOLE_DEVICE,
17462 };
17463
17464 #ifdef CONFIG_PM
17465 -static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
17466 +static int atmel_serial_suspend(struct platform_device *pdev,
17467 + pm_message_t state)
17468 {
17469 struct uart_port *port = platform_get_drvdata(pdev);
17470 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17471 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17472
17473 - if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
17474 + if (device_may_wakeup(&pdev->dev)
17475 + && !at91_suspend_entering_slow_clock())
17476 enable_irq_wake(port->irq);
17477 else {
17478 uart_suspend_port(&atmel_uart, port);
17479 @@ -925,13 +1448,12 @@
17480 static int atmel_serial_resume(struct platform_device *pdev)
17481 {
17482 struct uart_port *port = platform_get_drvdata(pdev);
17483 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17484 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17485
17486 if (atmel_port->suspended) {
17487 uart_resume_port(&atmel_uart, port);
17488 atmel_port->suspended = 0;
17489 - }
17490 - else
17491 + } else
17492 disable_irq_wake(port->irq);
17493
17494 return 0;
17495 @@ -944,15 +1466,40 @@
17496 static int __devinit atmel_serial_probe(struct platform_device *pdev)
17497 {
17498 struct atmel_uart_port *port;
17499 + void *data;
17500 int ret;
17501
17502 + BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
17503 +
17504 port = &atmel_ports[pdev->id];
17505 atmel_init_port(port, pdev);
17506
17507 + if (!atmel_use_dma_rx(&port->uart)) {
17508 + ret = -ENOMEM;
17509 + data = kmalloc(sizeof(struct atmel_uart_char)
17510 + * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
17511 + if (!data)
17512 + goto err_alloc_ring;
17513 + port->rx_ring.buf = data;
17514 + }
17515 +
17516 ret = uart_add_one_port(&atmel_uart, &port->uart);
17517 - if (!ret) {
17518 - device_init_wakeup(&pdev->dev, 1);
17519 - platform_set_drvdata(pdev, port);
17520 + if (ret)
17521 + goto err_add_port;
17522 +
17523 + device_init_wakeup(&pdev->dev, 1);
17524 + platform_set_drvdata(pdev, port);
17525 +
17526 + return 0;
17527 +
17528 +err_add_port:
17529 + kfree(port->rx_ring.buf);
17530 + port->rx_ring.buf = NULL;
17531 +err_alloc_ring:
17532 + if (!atmel_is_console_port(&port->uart)) {
17533 + clk_disable(port->clk);
17534 + clk_put(port->clk);
17535 + port->clk = NULL;
17536 }
17537
17538 return ret;
17539 @@ -961,19 +1508,21 @@
17540 static int __devexit atmel_serial_remove(struct platform_device *pdev)
17541 {
17542 struct uart_port *port = platform_get_drvdata(pdev);
17543 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17544 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17545 int ret = 0;
17546
17547 - clk_disable(atmel_port->clk);
17548 - clk_put(atmel_port->clk);
17549 -
17550 device_init_wakeup(&pdev->dev, 0);
17551 platform_set_drvdata(pdev, NULL);
17552
17553 - if (port) {
17554 - ret = uart_remove_one_port(&atmel_uart, port);
17555 - kfree(port);
17556 - }
17557 + ret = uart_remove_one_port(&atmel_uart, port);
17558 +
17559 + tasklet_kill(&atmel_port->tasklet);
17560 + kfree(atmel_port->rx_ring.buf);
17561 +
17562 + /* "port" is allocated statically, so we shouldn't free it */
17563 +
17564 + clk_disable(atmel_port->clk);
17565 + clk_put(atmel_port->clk);
17566
17567 return ret;
17568 }
17569 diff -urN linux-2.6.24.3/drivers/serial/atmel_serial.h avr32-2.6/drivers/serial/atmel_serial.h
17570 --- linux-2.6.24.3/drivers/serial/atmel_serial.h 2008-02-26 01:20:20.000000000 +0100
17571 +++ avr32-2.6/drivers/serial/atmel_serial.h 1970-01-01 01:00:00.000000000 +0100
17572 @@ -1,127 +0,0 @@
17573 -/*
17574 - * drivers/serial/atmel_serial.h
17575 - *
17576 - * Copyright (C) 2005 Ivan Kokshaysky
17577 - * Copyright (C) SAN People
17578 - *
17579 - * USART registers.
17580 - * Based on AT91RM9200 datasheet revision E.
17581 - *
17582 - * This program is free software; you can redistribute it and/or modify
17583 - * it under the terms of the GNU General Public License as published by
17584 - * the Free Software Foundation; either version 2 of the License, or
17585 - * (at your option) any later version.
17586 - */
17587 -
17588 -#ifndef ATMEL_SERIAL_H
17589 -#define ATMEL_SERIAL_H
17590 -
17591 -#define ATMEL_US_CR 0x00 /* Control Register */
17592 -#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
17593 -#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
17594 -#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
17595 -#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
17596 -#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
17597 -#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
17598 -#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
17599 -#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
17600 -#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
17601 -#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
17602 -#define ATMEL_US_SENDA (1 << 12) /* Send Address */
17603 -#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
17604 -#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
17605 -#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
17606 -#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
17607 -#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
17608 -#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
17609 -#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
17610 -
17611 -#define ATMEL_US_MR 0x04 /* Mode Register */
17612 -#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
17613 -#define ATMEL_US_USMODE_NORMAL 0
17614 -#define ATMEL_US_USMODE_RS485 1
17615 -#define ATMEL_US_USMODE_HWHS 2
17616 -#define ATMEL_US_USMODE_MODEM 3
17617 -#define ATMEL_US_USMODE_ISO7816_T0 4
17618 -#define ATMEL_US_USMODE_ISO7816_T1 6
17619 -#define ATMEL_US_USMODE_IRDA 8
17620 -#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
17621 -#define ATMEL_US_USCLKS_MCK (0 << 4)
17622 -#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
17623 -#define ATMEL_US_USCLKS_SCK (3 << 4)
17624 -#define ATMEL_US_CHRL (3 << 6) /* Character Length */
17625 -#define ATMEL_US_CHRL_5 (0 << 6)
17626 -#define ATMEL_US_CHRL_6 (1 << 6)
17627 -#define ATMEL_US_CHRL_7 (2 << 6)
17628 -#define ATMEL_US_CHRL_8 (3 << 6)
17629 -#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
17630 -#define ATMEL_US_PAR (7 << 9) /* Parity Type */
17631 -#define ATMEL_US_PAR_EVEN (0 << 9)
17632 -#define ATMEL_US_PAR_ODD (1 << 9)
17633 -#define ATMEL_US_PAR_SPACE (2 << 9)
17634 -#define ATMEL_US_PAR_MARK (3 << 9)
17635 -#define ATMEL_US_PAR_NONE (4 << 9)
17636 -#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
17637 -#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
17638 -#define ATMEL_US_NBSTOP_1 (0 << 12)
17639 -#define ATMEL_US_NBSTOP_1_5 (1 << 12)
17640 -#define ATMEL_US_NBSTOP_2 (2 << 12)
17641 -#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
17642 -#define ATMEL_US_CHMODE_NORMAL (0 << 14)
17643 -#define ATMEL_US_CHMODE_ECHO (1 << 14)
17644 -#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
17645 -#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
17646 -#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
17647 -#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
17648 -#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
17649 -#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
17650 -#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
17651 -#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
17652 -#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
17653 -#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
17654 -
17655 -#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
17656 -#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
17657 -#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
17658 -#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
17659 -#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
17660 -#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
17661 -#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
17662 -#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
17663 -#define ATMEL_US_PARE (1 << 7) /* Parity Error */
17664 -#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
17665 -#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
17666 -#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
17667 -#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
17668 -#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
17669 -#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
17670 -#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
17671 -#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
17672 -#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
17673 -#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
17674 -#define ATMEL_US_RI (1 << 20) /* RI */
17675 -#define ATMEL_US_DSR (1 << 21) /* DSR */
17676 -#define ATMEL_US_DCD (1 << 22) /* DCD */
17677 -#define ATMEL_US_CTS (1 << 23) /* CTS */
17678 -
17679 -#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
17680 -#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
17681 -#define ATMEL_US_CSR 0x14 /* Channel Status Register */
17682 -#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
17683 -#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
17684 -#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
17685 -
17686 -#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
17687 -#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
17688 -
17689 -#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
17690 -#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
17691 -
17692 -#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
17693 -#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
17694 -
17695 -#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
17696 -#define ATMEL_US_NER 0x44 /* Number of Errors Register */
17697 -#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
17698 -
17699 -#endif
17700 diff -urN linux-2.6.24.3/drivers/serial/Kconfig avr32-2.6/drivers/serial/Kconfig
17701 --- linux-2.6.24.3/drivers/serial/Kconfig 2008-02-26 01:20:20.000000000 +0100
17702 +++ avr32-2.6/drivers/serial/Kconfig 2008-04-23 20:12:44.000000000 +0200
17703 @@ -380,6 +380,21 @@
17704 console is the device which receives all kernel messages and
17705 warnings and which allows logins in single user mode).
17706
17707 +config SERIAL_ATMEL_PDC
17708 + bool "Support DMA transfers on AT91 / AT32 serial port"
17709 + depends on SERIAL_ATMEL
17710 + default y
17711 + help
17712 + Say Y here if you wish to use the PDC to do DMA transfers to
17713 + and from the Atmel AT91 / AT32 serial port. In order to
17714 + actually use DMA transfers, make sure that the use_dma_tx
17715 + and use_dma_rx members in the atmel_uart_data struct is set
17716 + appropriately for each port.
17717 +
17718 + Note that break and error handling currently doesn't work
17719 + properly when DMA is enabled. Make sure that ports where
17720 + this matters don't use DMA.
17721 +
17722 config SERIAL_ATMEL_TTYAT
17723 bool "Install as device ttyATn instead of ttySn"
17724 depends on SERIAL_ATMEL=y
17725 diff -urN linux-2.6.24.3/drivers/spi/atmel_spi.c avr32-2.6/drivers/spi/atmel_spi.c
17726 --- linux-2.6.24.3/drivers/spi/atmel_spi.c 2008-02-26 01:20:20.000000000 +0100
17727 +++ avr32-2.6/drivers/spi/atmel_spi.c 2008-04-23 20:12:44.000000000 +0200
17728 @@ -51,7 +51,9 @@
17729 u8 stopping;
17730 struct list_head queue;
17731 struct spi_transfer *current_transfer;
17732 - unsigned long remaining_bytes;
17733 + unsigned long current_remaining_bytes;
17734 + struct spi_transfer *next_transfer;
17735 + unsigned long next_remaining_bytes;
17736
17737 void *buffer;
17738 dma_addr_t buffer_dma;
17739 @@ -85,6 +87,16 @@
17740 unsigned gpio = (unsigned) spi->controller_data;
17741 unsigned active = spi->mode & SPI_CS_HIGH;
17742 u32 mr;
17743 + int i;
17744 + u32 csr;
17745 + u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
17746 +
17747 + /* Make sure clock polarity is correct */
17748 + for (i = 0; i < spi->master->num_chipselect; i++) {
17749 + csr = spi_readl(as, CSR0 + 4 * i);
17750 + if ((csr ^ cpol) & SPI_BIT(CPOL))
17751 + spi_writel(as, CSR0 + 4 * i, csr ^ SPI_BIT(CPOL));
17752 + }
17753
17754 mr = spi_readl(as, MR);
17755 mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
17756 @@ -121,6 +133,48 @@
17757 gpio_set_value(gpio, !active);
17758 }
17759
17760 +static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
17761 + struct spi_transfer *xfer)
17762 +{
17763 + return msg->transfers.prev == &xfer->transfer_list;
17764 +}
17765 +
17766 +static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
17767 +{
17768 + return xfer->delay_usecs == 0 && !xfer->cs_change;
17769 +}
17770 +
17771 +static void atmel_spi_next_xfer_data(struct spi_master *master,
17772 + struct spi_transfer *xfer,
17773 + dma_addr_t *tx_dma,
17774 + dma_addr_t *rx_dma,
17775 + u32 *plen)
17776 +{
17777 + struct atmel_spi *as = spi_master_get_devdata(master);
17778 + u32 len = *plen;
17779 +
17780 + /* use scratch buffer only when rx or tx data is unspecified */
17781 + if (xfer->rx_buf)
17782 + *rx_dma = xfer->rx_dma + xfer->len - len;
17783 + else {
17784 + *rx_dma = as->buffer_dma;
17785 + if (len > BUFFER_SIZE)
17786 + len = BUFFER_SIZE;
17787 + }
17788 + if (xfer->tx_buf)
17789 + *tx_dma = xfer->tx_dma + xfer->len - len;
17790 + else {
17791 + *tx_dma = as->buffer_dma;
17792 + if (len > BUFFER_SIZE)
17793 + len = BUFFER_SIZE;
17794 + memset(as->buffer, 0, len);
17795 + dma_sync_single_for_device(&as->pdev->dev,
17796 + as->buffer_dma, len, DMA_TO_DEVICE);
17797 + }
17798 +
17799 + *plen = len;
17800 +}
17801 +
17802 /*
17803 * Submit next transfer for DMA.
17804 * lock is held, spi irq is blocked
17805 @@ -130,53 +184,78 @@
17806 {
17807 struct atmel_spi *as = spi_master_get_devdata(master);
17808 struct spi_transfer *xfer;
17809 - u32 len;
17810 + u32 len, remaining, total;
17811 dma_addr_t tx_dma, rx_dma;
17812
17813 - xfer = as->current_transfer;
17814 - if (!xfer || as->remaining_bytes == 0) {
17815 - if (xfer)
17816 - xfer = list_entry(xfer->transfer_list.next,
17817 - struct spi_transfer, transfer_list);
17818 - else
17819 - xfer = list_entry(msg->transfers.next,
17820 - struct spi_transfer, transfer_list);
17821 - as->remaining_bytes = xfer->len;
17822 - as->current_transfer = xfer;
17823 + if (!as->current_transfer)
17824 + xfer = list_entry(msg->transfers.next,
17825 + struct spi_transfer, transfer_list);
17826 + else if (!as->next_transfer)
17827 + xfer = list_entry(as->current_transfer->transfer_list.next,
17828 + struct spi_transfer, transfer_list);
17829 + else
17830 + xfer = NULL;
17831 +
17832 + if (xfer) {
17833 + len = xfer->len;
17834 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17835 + remaining = xfer->len - len;
17836 +
17837 + spi_writel(as, RPR, rx_dma);
17838 + spi_writel(as, TPR, tx_dma);
17839 +
17840 + if (msg->spi->bits_per_word > 8)
17841 + len >>= 1;
17842 + spi_writel(as, RCR, len);
17843 + spi_writel(as, TCR, len);
17844 +
17845 + dev_dbg(&msg->spi->dev,
17846 + " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17847 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17848 + xfer->rx_buf, xfer->rx_dma);
17849 + } else {
17850 + xfer = as->next_transfer;
17851 + remaining = as->next_remaining_bytes;
17852 }
17853
17854 - len = as->remaining_bytes;
17855 + as->current_transfer = xfer;
17856 + as->current_remaining_bytes = remaining;
17857
17858 - tx_dma = xfer->tx_dma + xfer->len - len;
17859 - rx_dma = xfer->rx_dma + xfer->len - len;
17860 + if (remaining > 0)
17861 + len = remaining;
17862 + else if (!atmel_spi_xfer_is_last(msg, xfer)
17863 + && atmel_spi_xfer_can_be_chained(xfer)) {
17864 + xfer = list_entry(xfer->transfer_list.next,
17865 + struct spi_transfer, transfer_list);
17866 + len = xfer->len;
17867 + } else
17868 + xfer = NULL;
17869
17870 - /* use scratch buffer only when rx or tx data is unspecified */
17871 - if (!xfer->rx_buf) {
17872 - rx_dma = as->buffer_dma;
17873 - if (len > BUFFER_SIZE)
17874 - len = BUFFER_SIZE;
17875 - }
17876 - if (!xfer->tx_buf) {
17877 - tx_dma = as->buffer_dma;
17878 - if (len > BUFFER_SIZE)
17879 - len = BUFFER_SIZE;
17880 - memset(as->buffer, 0, len);
17881 - dma_sync_single_for_device(&as->pdev->dev,
17882 - as->buffer_dma, len, DMA_TO_DEVICE);
17883 - }
17884 + as->next_transfer = xfer;
17885
17886 - spi_writel(as, RPR, rx_dma);
17887 - spi_writel(as, TPR, tx_dma);
17888 + if (xfer) {
17889 + total = len;
17890 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17891 + as->next_remaining_bytes = total - len;
17892 +
17893 + spi_writel(as, RNPR, rx_dma);
17894 + spi_writel(as, TNPR, tx_dma);
17895 +
17896 + if (msg->spi->bits_per_word > 8)
17897 + len >>= 1;
17898 + spi_writel(as, RNCR, len);
17899 + spi_writel(as, TNCR, len);
17900 +
17901 + dev_dbg(&msg->spi->dev,
17902 + " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17903 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17904 + xfer->rx_buf, xfer->rx_dma);
17905 + } else {
17906 + spi_writel(as, RNCR, 0);
17907 + spi_writel(as, TNCR, 0);
17908 + }
17909
17910 - as->remaining_bytes -= len;
17911 - if (msg->spi->bits_per_word > 8)
17912 - len >>= 1;
17913 -
17914 - /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
17915 - * mechanism might help avoid the IRQ latency between transfers
17916 - * (and improve the nCS0 errata handling on at91rm9200 chips)
17917 - *
17918 - * We're also waiting for ENDRX before we start the next
17919 + /* REVISIT: We're waiting for ENDRX before we start the next
17920 * transfer because we need to handle some difficult timing
17921 * issues otherwise. If we wait for ENDTX in one transfer and
17922 * then starts waiting for ENDRX in the next, it's difficult
17923 @@ -186,17 +265,7 @@
17924 *
17925 * It should be doable, though. Just not now...
17926 */
17927 - spi_writel(as, TNCR, 0);
17928 - spi_writel(as, RNCR, 0);
17929 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
17930 -
17931 - dev_dbg(&msg->spi->dev,
17932 - " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
17933 - xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17934 - xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
17935 -
17936 - spi_writel(as, RCR, len);
17937 - spi_writel(as, TCR, len);
17938 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
17939 }
17940
17941 @@ -294,6 +363,7 @@
17942 spin_lock(&as->lock);
17943
17944 as->current_transfer = NULL;
17945 + as->next_transfer = NULL;
17946
17947 /* continue if needed */
17948 if (list_empty(&as->queue) || as->stopping)
17949 @@ -377,7 +447,7 @@
17950
17951 spi_writel(as, IDR, pending);
17952
17953 - if (as->remaining_bytes == 0) {
17954 + if (as->current_remaining_bytes == 0) {
17955 msg->actual_length += xfer->len;
17956
17957 if (!msg->is_dma_mapped)
17958 @@ -387,7 +457,7 @@
17959 if (xfer->delay_usecs)
17960 udelay(xfer->delay_usecs);
17961
17962 - if (msg->transfers.prev == &xfer->transfer_list) {
17963 + if (atmel_spi_xfer_is_last(msg, xfer)) {
17964 /* report completed message */
17965 atmel_spi_msg_done(master, as, msg, 0,
17966 xfer->cs_change);
17967 @@ -490,9 +560,14 @@
17968 if (!(spi->mode & SPI_CPHA))
17969 csr |= SPI_BIT(NCPHA);
17970
17971 - /* TODO: DLYBS and DLYBCT */
17972 - csr |= SPI_BF(DLYBS, 10);
17973 - csr |= SPI_BF(DLYBCT, 10);
17974 + /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
17975 + *
17976 + * DLYBCT would add delays between words, slowing down transfers.
17977 + * It could potentially be useful to cope with DMA bottlenecks, but
17978 + * in those cases it's probably best to just use a lower bitrate.
17979 + */
17980 + csr |= SPI_BF(DLYBS, 0);
17981 + csr |= SPI_BF(DLYBCT, 0);
17982
17983 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
17984 npcs_pin = (unsigned int)spi->controller_data;
17985 diff -urN linux-2.6.24.3/drivers/usb/gadget/atmel_usba_udc.c avr32-2.6/drivers/usb/gadget/atmel_usba_udc.c
17986 --- linux-2.6.24.3/drivers/usb/gadget/atmel_usba_udc.c 2008-02-26 01:20:20.000000000 +0100
17987 +++ avr32-2.6/drivers/usb/gadget/atmel_usba_udc.c 2008-04-23 20:12:45.000000000 +0200
17988 @@ -18,6 +18,7 @@
17989 #include <linux/platform_device.h>
17990 #include <linux/usb/ch9.h>
17991 #include <linux/usb/gadget.h>
17992 +#include <linux/usb/atmel_usba_udc.h>
17993 #include <linux/delay.h>
17994
17995 #include <asm/gpio.h>
17996 @@ -27,6 +28,7 @@
17997
17998
17999 static struct usba_udc the_udc;
18000 +static struct usba_ep *usba_ep;
18001
18002 #ifdef CONFIG_USB_GADGET_DEBUG_FS
18003 #include <linux/debugfs.h>
18004 @@ -324,53 +326,6 @@
18005 return 1;
18006 }
18007
18008 -static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
18009 -{
18010 - unsigned long tmp;
18011 -
18012 - DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
18013 - for (; len > 0; len -= 4, buf += 4, fifo += 4) {
18014 - tmp = *(unsigned long *)buf;
18015 - if (len >= 4) {
18016 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
18017 - __raw_writel(tmp, fifo);
18018 - } else {
18019 - do {
18020 - DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24);
18021 - __raw_writeb(tmp >> 24, fifo);
18022 - fifo++;
18023 - tmp <<= 8;
18024 - } while (--len);
18025 - break;
18026 - }
18027 - }
18028 -}
18029 -
18030 -static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
18031 -{
18032 - union {
18033 - unsigned long *w;
18034 - unsigned char *b;
18035 - } p;
18036 - unsigned long tmp;
18037 -
18038 - DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
18039 - for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
18040 - if (len >= 4) {
18041 - tmp = __raw_readl(fifo);
18042 - *p.w = tmp;
18043 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
18044 - } else {
18045 - do {
18046 - tmp = __raw_readb(fifo);
18047 - *p.b = tmp;
18048 - DBG(DBG_FIFO, " -> %02lx\n", tmp);
18049 - fifo++, p.b++;
18050 - } while (--len);
18051 - }
18052 - }
18053 -}
18054 -
18055 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
18056 {
18057 unsigned int transaction_len;
18058 @@ -387,7 +342,7 @@
18059 ep->ep.name, req, transaction_len,
18060 req->last_transaction ? ", done" : "");
18061
18062 - copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
18063 + memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
18064 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
18065 req->req.actual += transaction_len;
18066 }
18067 @@ -476,7 +431,7 @@
18068 bytecount = req->req.length - req->req.actual;
18069 }
18070
18071 - copy_from_fifo(req->req.buf + req->req.actual,
18072 + memcpy_fromio(req->req.buf + req->req.actual,
18073 ep->fifo, bytecount);
18074 req->req.actual += bytecount;
18075
18076 @@ -1029,33 +984,6 @@
18077 .set_selfpowered = usba_udc_set_selfpowered,
18078 };
18079
18080 -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
18081 -{ \
18082 - .ep = { \
18083 - .ops = &usba_ep_ops, \
18084 - .name = nam, \
18085 - .maxpacket = maxpkt, \
18086 - }, \
18087 - .udc = &the_udc, \
18088 - .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \
18089 - .fifo_size = maxpkt, \
18090 - .nr_banks = maxbk, \
18091 - .index = idx, \
18092 - .can_dma = dma, \
18093 - .can_isoc = isoc, \
18094 -}
18095 -
18096 -static struct usba_ep usba_ep[] = {
18097 - EP("ep0", 0, 64, 1, 0, 0),
18098 - EP("ep1in-bulk", 1, 512, 2, 1, 1),
18099 - EP("ep2out-bulk", 2, 512, 2, 1, 1),
18100 - EP("ep3in-int", 3, 64, 3, 1, 0),
18101 - EP("ep4out-int", 4, 64, 3, 1, 0),
18102 - EP("ep5in-iso", 5, 1024, 3, 1, 1),
18103 - EP("ep6out-iso", 6, 1024, 3, 1, 1),
18104 -};
18105 -#undef EP
18106 -
18107 static struct usb_endpoint_descriptor usba_ep0_desc = {
18108 .bLength = USB_DT_ENDPOINT_SIZE,
18109 .bDescriptorType = USB_DT_ENDPOINT,
18110 @@ -1074,7 +1002,6 @@
18111 static struct usba_udc the_udc = {
18112 .gadget = {
18113 .ops = &usba_udc_ops,
18114 - .ep0 = &usba_ep[0].ep,
18115 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
18116 .is_dualspeed = 1,
18117 .name = "atmel_usba_udc",
18118 @@ -1231,7 +1158,7 @@
18119 } else {
18120 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
18121 usba_writel(udc, TST, USBA_TST_PKT_MODE);
18122 - copy_to_fifo(ep->fifo, test_packet_buffer,
18123 + memcpy_toio(ep->fifo, test_packet_buffer,
18124 sizeof(test_packet_buffer));
18125 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
18126 dev_info(dev, "Entering Test_Packet mode...\n");
18127 @@ -1539,7 +1466,7 @@
18128 }
18129
18130 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
18131 - copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
18132 + memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
18133
18134 /* Free up one bank in the FIFO so that we can
18135 * generate or receive a reply right away. */
18136 @@ -1911,7 +1838,7 @@
18137
18138 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
18139 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
18140 - if (!regs || !fifo)
18141 + if (!regs || !fifo || !pdata)
18142 return -ENXIO;
18143
18144 irq = platform_get_irq(pdev, 0);
18145 @@ -1959,16 +1886,44 @@
18146 usba_writel(udc, CTRL, 0);
18147 clk_disable(pclk);
18148
18149 + usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
18150 + GFP_KERNEL);
18151 + if (!usba_ep)
18152 + goto err_alloc_ep;
18153 +
18154 + the_udc.gadget.ep0 = &usba_ep[0].ep;
18155 +
18156 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
18157 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
18158 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
18159 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
18160 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
18161 + usba_ep[0].ep.ops = &usba_ep_ops;
18162 + usba_ep[0].ep.name = pdata->ep[0].name;
18163 + usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
18164 + usba_ep[0].udc = &the_udc;
18165 + INIT_LIST_HEAD(&usba_ep[0].queue);
18166 + usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
18167 + usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
18168 + usba_ep[0].index = pdata->ep[0].index;
18169 + usba_ep[0].can_dma = pdata->ep[0].can_dma;
18170 + usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
18171 +
18172 + for (i = 1; i < pdata->num_ep; i++) {
18173 struct usba_ep *ep = &usba_ep[i];
18174
18175 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
18176 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
18177 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
18178 + ep->ep.ops = &usba_ep_ops;
18179 + ep->ep.name = pdata->ep[i].name;
18180 + ep->ep.maxpacket = pdata->ep[i].fifo_size;
18181 + ep->udc = &the_udc;
18182 + INIT_LIST_HEAD(&ep->queue);
18183 + ep->fifo_size = pdata->ep[i].fifo_size;
18184 + ep->nr_banks = pdata->ep[i].nr_banks;
18185 + ep->index = pdata->ep[i].index;
18186 + ep->can_dma = pdata->ep[i].can_dma;
18187 + ep->can_isoc = pdata->ep[i].can_isoc;
18188
18189 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
18190 }
18191 @@ -1987,7 +1942,7 @@
18192 goto err_device_add;
18193 }
18194
18195 - if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
18196 + if (pdata->vbus_pin >= 0) {
18197 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
18198 udc->vbus_pin = pdata->vbus_pin;
18199
18200 @@ -2007,7 +1962,7 @@
18201 }
18202
18203 usba_init_debugfs(udc);
18204 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18205 + for (i = 1; i < pdata->num_ep; i++)
18206 usba_ep_init_debugfs(udc, &usba_ep[i]);
18207
18208 return 0;
18209 @@ -2015,6 +1970,8 @@
18210 err_device_add:
18211 free_irq(irq, udc);
18212 err_request_irq:
18213 + kfree(usba_ep);
18214 +err_alloc_ep:
18215 iounmap(udc->fifo);
18216 err_map_fifo:
18217 iounmap(udc->regs);
18218 @@ -2032,10 +1989,11 @@
18219 {
18220 struct usba_udc *udc;
18221 int i;
18222 + struct usba_platform_data *pdata = pdev->dev.platform_data;
18223
18224 udc = platform_get_drvdata(pdev);
18225
18226 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18227 + for (i = 1; i < pdata->num_ep; i++)
18228 usba_ep_cleanup_debugfs(&usba_ep[i]);
18229 usba_cleanup_debugfs(udc);
18230
18231 diff -urN linux-2.6.24.3/drivers/video/atmel_lcdfb.c avr32-2.6/drivers/video/atmel_lcdfb.c
18232 --- linux-2.6.24.3/drivers/video/atmel_lcdfb.c 2008-02-26 01:20:20.000000000 +0100
18233 +++ avr32-2.6/drivers/video/atmel_lcdfb.c 2008-04-23 20:12:45.000000000 +0200
18234 @@ -16,6 +16,7 @@
18235 #include <linux/fb.h>
18236 #include <linux/init.h>
18237 #include <linux/delay.h>
18238 +#include <linux/backlight.h>
18239
18240 #include <asm/arch/board.h>
18241 #include <asm/arch/cpu.h>
18242 @@ -37,7 +38,9 @@
18243 #endif
18244
18245 #if defined(CONFIG_ARCH_AT91)
18246 -#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
18247 +#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
18248 + | FBINFO_PARTIAL_PAN_OK \
18249 + | FBINFO_HWACCEL_YPAN)
18250
18251 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
18252 struct fb_var_screeninfo *var)
18253 @@ -69,12 +72,113 @@
18254 }
18255 #endif
18256
18257 +static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
18258 + | ATMEL_LCDC_POL_POSITIVE
18259 + | ATMEL_LCDC_ENA_PWMENABLE;
18260 +
18261 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
18262 +
18263 +/* some bl->props field just changed */
18264 +static int atmel_bl_update_status(struct backlight_device *bl)
18265 +{
18266 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18267 + int power = sinfo->bl_power;
18268 + int brightness = bl->props.brightness;
18269 +
18270 + /* REVISIT there may be a meaningful difference between
18271 + * fb_blank and power ... there seem to be some cases
18272 + * this doesn't handle correctly.
18273 + */
18274 + if (bl->props.fb_blank != sinfo->bl_power)
18275 + power = bl->props.fb_blank;
18276 + else if (bl->props.power != sinfo->bl_power)
18277 + power = bl->props.power;
18278 +
18279 + if (brightness < 0 && power == FB_BLANK_UNBLANK)
18280 + brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18281 + else if (power != FB_BLANK_UNBLANK)
18282 + brightness = 0;
18283 +
18284 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
18285 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
18286 + brightness ? contrast_ctr : 0);
18287 +
18288 + bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
18289 +
18290 + return 0;
18291 +}
18292 +
18293 +static int atmel_bl_get_brightness(struct backlight_device *bl)
18294 +{
18295 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18296 +
18297 + return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18298 +}
18299 +
18300 +static struct backlight_ops atmel_lcdc_bl_ops = {
18301 + .update_status = atmel_bl_update_status,
18302 + .get_brightness = atmel_bl_get_brightness,
18303 +};
18304 +
18305 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18306 +{
18307 + struct backlight_device *bl;
18308 +
18309 + sinfo->bl_power = FB_BLANK_UNBLANK;
18310 +
18311 + if (sinfo->backlight)
18312 + return;
18313 +
18314 + bl = backlight_device_register("backlight", &sinfo->pdev->dev,
18315 + sinfo, &atmel_lcdc_bl_ops);
18316 + if (IS_ERR(sinfo->backlight)) {
18317 + dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
18318 + PTR_ERR(bl));
18319 + return;
18320 + }
18321 + sinfo->backlight = bl;
18322 +
18323 + bl->props.power = FB_BLANK_UNBLANK;
18324 + bl->props.fb_blank = FB_BLANK_UNBLANK;
18325 + bl->props.max_brightness = 0xff;
18326 + bl->props.brightness = atmel_bl_get_brightness(bl);
18327 +}
18328 +
18329 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18330 +{
18331 + if (sinfo->backlight)
18332 + backlight_device_unregister(sinfo->backlight);
18333 +}
18334 +
18335 +#else
18336 +
18337 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18338 +{
18339 + dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
18340 +}
18341 +
18342 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18343 +{
18344 +}
18345 +
18346 +#endif
18347 +
18348 +static void init_contrast(struct atmel_lcdfb_info *sinfo)
18349 +{
18350 + /* have some default contrast/backlight settings */
18351 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
18352 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18353 +
18354 + if (sinfo->lcdcon_is_backlight)
18355 + init_backlight(sinfo);
18356 +}
18357 +
18358
18359 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
18360 .type = FB_TYPE_PACKED_PIXELS,
18361 .visual = FB_VISUAL_TRUECOLOR,
18362 .xpanstep = 0,
18363 - .ypanstep = 0,
18364 + .ypanstep = 1,
18365 .ywrapstep = 0,
18366 .accel = FB_ACCEL_NONE,
18367 };
18368 @@ -148,6 +252,8 @@
18369 return -ENOMEM;
18370 }
18371
18372 + memset(info->screen_base, 0, info->fix.smem_len);
18373 +
18374 return 0;
18375 }
18376
18377 @@ -203,6 +309,26 @@
18378 var->transp.offset = var->transp.length = 0;
18379 var->xoffset = var->yoffset = 0;
18380
18381 + /* Saturate vertical and horizontal timings at maximum values */
18382 + var->vsync_len = min_t(u32, var->vsync_len,
18383 + (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
18384 + var->upper_margin = min_t(u32, var->upper_margin,
18385 + ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
18386 + var->lower_margin = min_t(u32, var->lower_margin,
18387 + ATMEL_LCDC_VFP);
18388 + var->right_margin = min_t(u32, var->right_margin,
18389 + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
18390 + var->hsync_len = min_t(u32, var->hsync_len,
18391 + (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
18392 + var->left_margin = min_t(u32, var->left_margin,
18393 + ATMEL_LCDC_HBP + 1);
18394 +
18395 + /* Some parameters can't be zero */
18396 + var->vsync_len = max_t(u32, var->vsync_len, 1);
18397 + var->right_margin = max_t(u32, var->right_margin, 1);
18398 + var->hsync_len = max_t(u32, var->hsync_len, 1);
18399 + var->left_margin = max_t(u32, var->left_margin, 1);
18400 +
18401 switch (var->bits_per_pixel) {
18402 case 1:
18403 case 2:
18404 @@ -370,10 +496,6 @@
18405 /* Disable all interrupts */
18406 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
18407
18408 - /* Set contrast */
18409 - value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
18410 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
18411 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18412 /* ...wait for DMA engine to become idle... */
18413 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
18414 msleep(10);
18415 @@ -516,7 +638,6 @@
18416 struct fb_info *info = sinfo->info;
18417 int ret = 0;
18418
18419 - memset_io(info->screen_base, 0, info->fix.smem_len);
18420 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
18421
18422 dev_info(info->device,
18423 @@ -577,6 +698,7 @@
18424 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
18425 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
18426 sinfo->guard_time = pdata_sinfo->guard_time;
18427 + sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
18428 } else {
18429 dev_err(dev, "cannot get default configuration\n");
18430 goto free_info;
18431 @@ -645,6 +767,11 @@
18432 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
18433 if (!info->screen_base)
18434 goto release_intmem;
18435 +
18436 + /*
18437 + * Don't clear the framebuffer -- someone may have set
18438 + * up a splash image.
18439 + */
18440 } else {
18441 /* alocate memory buffer */
18442 ret = atmel_lcdfb_alloc_video_memory(sinfo);
18443 @@ -670,6 +797,9 @@
18444 goto release_mem;
18445 }
18446
18447 + /* Initialize PWM for contrast or backlight ("off") */
18448 + init_contrast(sinfo);
18449 +
18450 /* interrupt */
18451 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
18452 if (ret) {
18453 @@ -721,6 +851,7 @@
18454 unregister_irqs:
18455 free_irq(sinfo->irq_base, info);
18456 unmap_mmio:
18457 + exit_backlight(sinfo);
18458 iounmap(sinfo->mmio);
18459 release_mem:
18460 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
18461 @@ -755,6 +886,7 @@
18462 if (!sinfo)
18463 return 0;
18464
18465 + exit_backlight(sinfo);
18466 if (sinfo->atmel_lcdfb_power_control)
18467 sinfo->atmel_lcdfb_power_control(0);
18468 unregister_framebuffer(info);
18469 @@ -781,6 +913,9 @@
18470
18471 static struct platform_driver atmel_lcdfb_driver = {
18472 .remove = __exit_p(atmel_lcdfb_remove),
18473 +
18474 +// FIXME need suspend, resume
18475 +
18476 .driver = {
18477 .name = "atmel_lcdfb",
18478 .owner = THIS_MODULE,
18479 diff -urN linux-2.6.24.3/drivers/video/backlight/Kconfig avr32-2.6/drivers/video/backlight/Kconfig
18480 --- linux-2.6.24.3/drivers/video/backlight/Kconfig 2008-02-26 01:20:20.000000000 +0100
18481 +++ avr32-2.6/drivers/video/backlight/Kconfig 2008-04-23 20:12:45.000000000 +0200
18482 @@ -50,6 +50,19 @@
18483 To have support for your specific LCD panel you will have to
18484 select the proper drivers which depend on this option.
18485
18486 +config BACKLIGHT_ATMEL_LCDC
18487 + bool "Atmel LCDC Contrast-as-Backlight control"
18488 + depends on BACKLIGHT_CLASS_DEVICE && FB_ATMEL
18489 + default y if MACH_SAM9261EK || MACH_SAM9263EK
18490 + help
18491 + This provides a backlight control internal to the Atmel LCDC
18492 + driver. If the LCD "contrast control" on your board is wired
18493 + so it controls the backlight brightness, select this option to
18494 + export this as a PWM-based backlight control.
18495 +
18496 + If in doubt, it's safe to enable this option; it doesn't kick
18497 + in unless the board's description says it's wired that way.
18498 +
18499 config BACKLIGHT_CORGI
18500 tristate "Generic (aka Sharp Corgi) Backlight Driver"
18501 depends on BACKLIGHT_CLASS_DEVICE
18502 diff -urN linux-2.6.24.3/drivers/video/console/Kconfig avr32-2.6/drivers/video/console/Kconfig
18503 --- linux-2.6.24.3/drivers/video/console/Kconfig 2008-02-26 01:20:20.000000000 +0100
18504 +++ avr32-2.6/drivers/video/console/Kconfig 2008-04-23 19:33:46.000000000 +0200
18505 @@ -6,7 +6,7 @@
18506
18507 config VGA_CONSOLE
18508 bool "VGA text console" if EMBEDDED || !X86
18509 - depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
18510 + depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
18511 default y
18512 help
18513 Saying Y here will allow you to use Linux in text mode through a
18514 diff -urN linux-2.6.24.3/drivers/watchdog/Kconfig avr32-2.6/drivers/watchdog/Kconfig
18515 --- linux-2.6.24.3/drivers/watchdog/Kconfig 2008-02-26 01:20:20.000000000 +0100
18516 +++ avr32-2.6/drivers/watchdog/Kconfig 2008-04-23 20:12:45.000000000 +0200
18517 @@ -223,7 +223,7 @@
18518
18519 config AT32AP700X_WDT
18520 tristate "AT32AP700x watchdog"
18521 - depends on CPU_AT32AP7000
18522 + depends on CPU_AT32AP700X
18523 help
18524 Watchdog timer embedded into AT32AP700x devices. This will reboot
18525 your system when the timeout is reached.
18526 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/at91rm9200.h avr32-2.6/include/asm-arm/arch-at91/at91rm9200.h
18527 --- linux-2.6.24.3/include/asm-arm/arch-at91/at91rm9200.h 2008-02-26 01:20:20.000000000 +0100
18528 +++ avr32-2.6/include/asm-arm/arch-at91/at91rm9200.h 2008-04-23 19:33:48.000000000 +0200
18529 @@ -93,6 +93,11 @@
18530 #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
18531 #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
18532
18533 +#define AT91_USART0 AT91RM9200_BASE_US0
18534 +#define AT91_USART1 AT91RM9200_BASE_US1
18535 +#define AT91_USART2 AT91RM9200_BASE_US2
18536 +#define AT91_USART3 AT91RM9200_BASE_US3
18537 +
18538 #define AT91_MATRIX 0 /* not supported */
18539
18540 /*
18541 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9260.h avr32-2.6/include/asm-arm/arch-at91/at91sam9260.h
18542 --- linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9260.h 2008-02-26 01:20:20.000000000 +0100
18543 +++ avr32-2.6/include/asm-arm/arch-at91/at91sam9260.h 2008-04-23 19:33:48.000000000 +0200
18544 @@ -99,6 +99,13 @@
18545 #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
18546 #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
18547
18548 +#define AT91_USART0 AT91SAM9260_BASE_US0
18549 +#define AT91_USART1 AT91SAM9260_BASE_US1
18550 +#define AT91_USART2 AT91SAM9260_BASE_US2
18551 +#define AT91_USART3 AT91SAM9260_BASE_US3
18552 +#define AT91_USART4 AT91SAM9260_BASE_US4
18553 +#define AT91_USART5 AT91SAM9260_BASE_US5
18554 +
18555
18556 /*
18557 * Internal Memory.
18558 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9261.h avr32-2.6/include/asm-arm/arch-at91/at91sam9261.h
18559 --- linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9261.h 2008-02-26 01:20:20.000000000 +0100
18560 +++ avr32-2.6/include/asm-arm/arch-at91/at91sam9261.h 2008-04-23 19:33:48.000000000 +0200
18561 @@ -84,6 +84,10 @@
18562 #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
18563 #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
18564
18565 +#define AT91_USART0 AT91SAM9261_BASE_US0
18566 +#define AT91_USART1 AT91SAM9261_BASE_US1
18567 +#define AT91_USART2 AT91SAM9261_BASE_US2
18568 +
18569
18570 /*
18571 * Internal Memory.
18572 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9263.h avr32-2.6/include/asm-arm/arch-at91/at91sam9263.h
18573 --- linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9263.h 2008-02-26 01:20:20.000000000 +0100
18574 +++ avr32-2.6/include/asm-arm/arch-at91/at91sam9263.h 2008-04-23 19:33:48.000000000 +0200
18575 @@ -101,6 +101,10 @@
18576 #define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
18577 #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
18578
18579 +#define AT91_USART0 AT91SAM9263_BASE_US0
18580 +#define AT91_USART1 AT91SAM9263_BASE_US1
18581 +#define AT91_USART2 AT91SAM9263_BASE_US2
18582 +
18583 #define AT91_SMC AT91_SMC0
18584
18585 /*
18586 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9rl.h avr32-2.6/include/asm-arm/arch-at91/at91sam9rl.h
18587 --- linux-2.6.24.3/include/asm-arm/arch-at91/at91sam9rl.h 2008-02-26 01:20:20.000000000 +0100
18588 +++ avr32-2.6/include/asm-arm/arch-at91/at91sam9rl.h 2008-04-23 19:33:48.000000000 +0200
18589 @@ -94,6 +94,11 @@
18590 #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
18591 #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
18592
18593 +#define AT91_USART0 AT91SAM9RL_BASE_US0
18594 +#define AT91_USART1 AT91SAM9RL_BASE_US1
18595 +#define AT91_USART2 AT91SAM9RL_BASE_US2
18596 +#define AT91_USART3 AT91SAM9RL_BASE_US3
18597 +
18598
18599 /*
18600 * Internal Memory.
18601 diff -urN linux-2.6.24.3/include/asm-arm/arch-at91/uncompress.h avr32-2.6/include/asm-arm/arch-at91/uncompress.h
18602 --- linux-2.6.24.3/include/asm-arm/arch-at91/uncompress.h 2008-02-26 01:20:20.000000000 +0100
18603 +++ avr32-2.6/include/asm-arm/arch-at91/uncompress.h 2008-04-23 19:33:48.000000000 +0200
18604 @@ -22,7 +22,23 @@
18605 #define __ASM_ARCH_UNCOMPRESS_H
18606
18607 #include <asm/io.h>
18608 -#include <asm/arch/at91_dbgu.h>
18609 +#include <linux/atmel_serial.h>
18610 +
18611 +#if defined(CONFIG_AT91_EARLY_DBGU)
18612 +#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
18613 +#elif defined(CONFIG_AT91_EARLY_USART0)
18614 +#define UART_OFFSET AT91_USART0
18615 +#elif defined(CONFIG_AT91_EARLY_USART1)
18616 +#define UART_OFFSET AT91_USART1
18617 +#elif defined(CONFIG_AT91_EARLY_USART2)
18618 +#define UART_OFFSET AT91_USART2
18619 +#elif defined(CONFIG_AT91_EARLY_USART3)
18620 +#define UART_OFFSET AT91_USART3
18621 +#elif defined(CONFIG_AT91_EARLY_USART4)
18622 +#define UART_OFFSET AT91_USART4
18623 +#elif defined(CONFIG_AT91_EARLY_USART5)
18624 +#define UART_OFFSET AT91_USART5
18625 +#endif
18626
18627 /*
18628 * The following code assumes the serial port has already been
18629 @@ -33,22 +49,22 @@
18630 */
18631 static void putc(int c)
18632 {
18633 -#ifdef AT91_DBGU
18634 - void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
18635 +#ifdef UART_OFFSET
18636 + void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
18637
18638 - while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
18639 + while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
18640 barrier();
18641 - __raw_writel(c, sys + AT91_DBGU_THR);
18642 + __raw_writel(c, sys + ATMEL_US_THR);
18643 #endif
18644 }
18645
18646 static inline void flush(void)
18647 {
18648 -#ifdef AT91_DBGU
18649 - void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
18650 +#ifdef UART_OFFSET
18651 + void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
18652
18653 /* wait for transmission to complete */
18654 - while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
18655 + while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
18656 barrier();
18657 #endif
18658 }
18659 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap7000.h avr32-2.6/include/asm-avr32/arch-at32ap/at32ap7000.h
18660 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap7000.h 2008-02-26 01:20:20.000000000 +0100
18661 +++ avr32-2.6/include/asm-avr32/arch-at32ap/at32ap7000.h 1970-01-01 01:00:00.000000000 +0100
18662 @@ -1,35 +0,0 @@
18663 -/*
18664 - * Pin definitions for AT32AP7000.
18665 - *
18666 - * Copyright (C) 2006 Atmel Corporation
18667 - *
18668 - * This program is free software; you can redistribute it and/or modify
18669 - * it under the terms of the GNU General Public License version 2 as
18670 - * published by the Free Software Foundation.
18671 - */
18672 -#ifndef __ASM_ARCH_AT32AP7000_H__
18673 -#define __ASM_ARCH_AT32AP7000_H__
18674 -
18675 -#define GPIO_PERIPH_A 0
18676 -#define GPIO_PERIPH_B 1
18677 -
18678 -#define NR_GPIO_CONTROLLERS 4
18679 -
18680 -/*
18681 - * Pin numbers identifying specific GPIO pins on the chip. They can
18682 - * also be converted to IRQ numbers by passing them through
18683 - * gpio_to_irq().
18684 - */
18685 -#define GPIO_PIOA_BASE (0)
18686 -#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18687 -#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18688 -#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18689 -#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18690 -
18691 -#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18692 -#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18693 -#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18694 -#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18695 -#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18696 -
18697 -#endif /* __ASM_ARCH_AT32AP7000_H__ */
18698 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap700x.h avr32-2.6/include/asm-avr32/arch-at32ap/at32ap700x.h
18699 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap700x.h 1970-01-01 01:00:00.000000000 +0100
18700 +++ avr32-2.6/include/asm-avr32/arch-at32ap/at32ap700x.h 2008-04-23 20:12:46.000000000 +0200
18701 @@ -0,0 +1,35 @@
18702 +/*
18703 + * Pin definitions for AT32AP7000.
18704 + *
18705 + * Copyright (C) 2006 Atmel Corporation
18706 + *
18707 + * This program is free software; you can redistribute it and/or modify
18708 + * it under the terms of the GNU General Public License version 2 as
18709 + * published by the Free Software Foundation.
18710 + */
18711 +#ifndef __ASM_ARCH_AT32AP700X_H__
18712 +#define __ASM_ARCH_AT32AP700X_H__
18713 +
18714 +#define GPIO_PERIPH_A 0
18715 +#define GPIO_PERIPH_B 1
18716 +
18717 +#define NR_GPIO_CONTROLLERS 4
18718 +
18719 +/*
18720 + * Pin numbers identifying specific GPIO pins on the chip. They can
18721 + * also be converted to IRQ numbers by passing them through
18722 + * gpio_to_irq().
18723 + */
18724 +#define GPIO_PIOA_BASE (0)
18725 +#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18726 +#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18727 +#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18728 +#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18729 +
18730 +#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18731 +#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18732 +#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18733 +#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18734 +#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18735 +
18736 +#endif /* __ASM_ARCH_AT32AP700X_H__ */
18737 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/board.h avr32-2.6/include/asm-avr32/arch-at32ap/board.h
18738 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/board.h 2008-02-26 01:20:20.000000000 +0100
18739 +++ avr32-2.6/include/asm-avr32/arch-at32ap/board.h 2008-04-23 20:12:46.000000000 +0200
18740 @@ -38,9 +38,7 @@
18741 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
18742 unsigned long fbmem_start, unsigned long fbmem_len);
18743
18744 -struct usba_platform_data {
18745 - int vbus_pin;
18746 -};
18747 +struct usba_platform_data;
18748 struct platform_device *
18749 at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
18750
18751 @@ -51,6 +49,9 @@
18752 at32_add_device_ide(unsigned int id, unsigned int extint,
18753 struct ide_platform_data *data);
18754
18755 +/* mask says which PWM channels to mux */
18756 +struct platform_device *at32_add_device_pwm(u32 mask);
18757 +
18758 /* depending on what's hooked up, not all SSC pins will be used */
18759 #define ATMEL_SSC_TK 0x01
18760 #define ATMEL_SSC_TF 0x02
18761 @@ -65,8 +66,17 @@
18762 struct platform_device *
18763 at32_add_device_ssc(unsigned int id, unsigned int flags);
18764
18765 -struct platform_device *at32_add_device_twi(unsigned int id);
18766 -struct platform_device *at32_add_device_mci(unsigned int id);
18767 +struct i2c_board_info;
18768 +struct platform_device *at32_add_device_twi(unsigned int id,
18769 + struct i2c_board_info *b,
18770 + unsigned int n);
18771 +
18772 +struct mci_platform_data {
18773 + int detect_pin;
18774 + int wp_pin;
18775 +};
18776 +struct platform_device *
18777 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
18778 struct platform_device *at32_add_device_ac97c(unsigned int id);
18779 struct platform_device *at32_add_device_abdac(unsigned int id);
18780
18781 @@ -81,4 +91,7 @@
18782 at32_add_device_cf(unsigned int id, unsigned int extint,
18783 struct cf_platform_data *data);
18784
18785 +struct platform_device *
18786 +at32_add_device_psif(unsigned int id);
18787 +
18788 #endif /* __ASM_ARCH_BOARD_H */
18789 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/cpu.h avr32-2.6/include/asm-avr32/arch-at32ap/cpu.h
18790 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/cpu.h 2008-02-26 01:20:20.000000000 +0100
18791 +++ avr32-2.6/include/asm-avr32/arch-at32ap/cpu.h 2008-04-23 20:12:46.000000000 +0200
18792 @@ -14,7 +14,7 @@
18793 * Only AT32AP7000 is defined for now. We can identify the specific
18794 * chip at runtime, but I'm not sure if it's really worth it.
18795 */
18796 -#ifdef CONFIG_CPU_AT32AP7000
18797 +#ifdef CONFIG_CPU_AT32AP700X
18798 # define cpu_is_at32ap7000() (1)
18799 #else
18800 # define cpu_is_at32ap7000() (0)
18801 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/io.h avr32-2.6/include/asm-avr32/arch-at32ap/io.h
18802 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/io.h 2008-02-26 01:20:20.000000000 +0100
18803 +++ avr32-2.6/include/asm-avr32/arch-at32ap/io.h 2008-04-23 19:33:48.000000000 +0200
18804 @@ -4,7 +4,7 @@
18805 /* For "bizarre" halfword swapping */
18806 #include <linux/byteorder/swabb.h>
18807
18808 -#if defined(CONFIG_AP7000_32_BIT_SMC)
18809 +#if defined(CONFIG_AP700X_32_BIT_SMC)
18810 # define __swizzle_addr_b(addr) (addr ^ 3UL)
18811 # define __swizzle_addr_w(addr) (addr ^ 2UL)
18812 # define __swizzle_addr_l(addr) (addr)
18813 @@ -14,7 +14,7 @@
18814 # define __mem_ioswabb(a, x) (x)
18815 # define __mem_ioswabw(a, x) swab16(x)
18816 # define __mem_ioswabl(a, x) swab32(x)
18817 -#elif defined(CONFIG_AP7000_16_BIT_SMC)
18818 +#elif defined(CONFIG_AP700X_16_BIT_SMC)
18819 # define __swizzle_addr_b(addr) (addr ^ 1UL)
18820 # define __swizzle_addr_w(addr) (addr)
18821 # define __swizzle_addr_l(addr) (addr)
18822 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/pm.h avr32-2.6/include/asm-avr32/arch-at32ap/pm.h
18823 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/pm.h 1970-01-01 01:00:00.000000000 +0100
18824 +++ avr32-2.6/include/asm-avr32/arch-at32ap/pm.h 2008-04-23 20:12:46.000000000 +0200
18825 @@ -0,0 +1,48 @@
18826 +/*
18827 + * AVR32 AP Power Management.
18828 + *
18829 + * Copyright (C) 2008 Atmel Corporation
18830 + *
18831 + * This program is free software; you can redistribute it and/or modify
18832 + * it under the terms of the GNU General Public License version 2 as
18833 + * published by the Free Software Foundation.
18834 + */
18835 +#ifndef __ASM_AVR32_ARCH_PM_H
18836 +#define __ASM_AVR32_ARCH_PM_H
18837 +
18838 +/* Possible arguments to the "sleep" instruction */
18839 +#define CPU_SLEEP_IDLE 0
18840 +#define CPU_SLEEP_FROZEN 1
18841 +#define CPU_SLEEP_STANDBY 2
18842 +#define CPU_SLEEP_STOP 3
18843 +#define CPU_SLEEP_STATIC 5
18844 +
18845 +#ifndef __ASSEMBLY__
18846 +extern void cpu_enter_idle(void);
18847 +
18848 +extern bool disable_idle_sleep;
18849 +
18850 +static inline void cpu_disable_idle_sleep(void)
18851 +{
18852 + disable_idle_sleep = true;
18853 +}
18854 +
18855 +static inline void cpu_enable_idle_sleep(void)
18856 +{
18857 + disable_idle_sleep = false;
18858 +}
18859 +
18860 +static inline void cpu_idle_sleep(void)
18861 +{
18862 + /*
18863 + * If we're using the COUNT and COMPARE registers for
18864 + * timekeeping, we can't use the IDLE state.
18865 + */
18866 + if (disable_idle_sleep)
18867 + cpu_relax();
18868 + else
18869 + cpu_enter_idle();
18870 +}
18871 +#endif
18872 +
18873 +#endif /* __ASM_AVR32_ARCH_PM_H */
18874 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/portmux.h avr32-2.6/include/asm-avr32/arch-at32ap/portmux.h
18875 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/portmux.h 2008-02-26 01:20:20.000000000 +0100
18876 +++ avr32-2.6/include/asm-avr32/arch-at32ap/portmux.h 2008-04-23 19:33:48.000000000 +0200
18877 @@ -26,4 +26,16 @@
18878 void at32_select_gpio(unsigned int pin, unsigned long flags);
18879 void at32_reserve_pin(unsigned int pin);
18880
18881 +#ifdef CONFIG_GPIO_DEV
18882 +
18883 +/* Gang allocators and accessors; used by the GPIO /dev driver */
18884 +int at32_gpio_port_is_valid(unsigned int port);
18885 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
18886 +void at32_deselect_pins(unsigned int port, u32 pins);
18887 +
18888 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
18889 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
18890 +
18891 +#endif /* CONFIG_GPIO_DEV */
18892 +
18893 #endif /* __ASM_ARCH_PORTMUX_H__ */
18894 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/time.h avr32-2.6/include/asm-avr32/arch-at32ap/time.h
18895 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/time.h 2008-02-26 01:20:20.000000000 +0100
18896 +++ avr32-2.6/include/asm-avr32/arch-at32ap/time.h 1970-01-01 01:00:00.000000000 +0100
18897 @@ -1,112 +0,0 @@
18898 -/*
18899 - * Copyright (C) 2007 Atmel Corporation
18900 - *
18901 - * This program is free software; you can redistribute it and/or modify
18902 - * it under the terms of the GNU General Public License version 2 as
18903 - * published by the Free Software Foundation.
18904 - */
18905 -
18906 -#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
18907 -#define _ASM_AVR32_ARCH_AT32AP_TIME_H
18908 -
18909 -#include <linux/platform_device.h>
18910 -
18911 -extern struct irqaction timer_irqaction;
18912 -extern struct platform_device at32_systc0_device;
18913 -extern void local_timer_interrupt(int irq, void *dev_id);
18914 -
18915 -#define TIMER_BCR 0x000000c0
18916 -#define TIMER_BCR_SYNC 0
18917 -#define TIMER_BMR 0x000000c4
18918 -#define TIMER_BMR_TC0XC0S 0
18919 -#define TIMER_BMR_TC1XC1S 2
18920 -#define TIMER_BMR_TC2XC2S 4
18921 -#define TIMER_CCR 0x00000000
18922 -#define TIMER_CCR_CLKDIS 1
18923 -#define TIMER_CCR_CLKEN 0
18924 -#define TIMER_CCR_SWTRG 2
18925 -#define TIMER_CMR 0x00000004
18926 -#define TIMER_CMR_ABETRG 10
18927 -#define TIMER_CMR_ACPA 16
18928 -#define TIMER_CMR_ACPC 18
18929 -#define TIMER_CMR_AEEVT 20
18930 -#define TIMER_CMR_ASWTRG 22
18931 -#define TIMER_CMR_BCPB 24
18932 -#define TIMER_CMR_BCPC 26
18933 -#define TIMER_CMR_BEEVT 28
18934 -#define TIMER_CMR_BSWTRG 30
18935 -#define TIMER_CMR_BURST 4
18936 -#define TIMER_CMR_CLKI 3
18937 -#define TIMER_CMR_CPCDIS 7
18938 -#define TIMER_CMR_CPCSTOP 6
18939 -#define TIMER_CMR_CPCTRG 14
18940 -#define TIMER_CMR_EEVT 10
18941 -#define TIMER_CMR_EEVTEDG 8
18942 -#define TIMER_CMR_ENETRG 12
18943 -#define TIMER_CMR_ETRGEDG 8
18944 -#define TIMER_CMR_LDBDIS 7
18945 -#define TIMER_CMR_LDBSTOP 6
18946 -#define TIMER_CMR_LDRA 16
18947 -#define TIMER_CMR_LDRB 18
18948 -#define TIMER_CMR_TCCLKS 0
18949 -#define TIMER_CMR_WAVE 15
18950 -#define TIMER_CMR_WAVSEL 13
18951 -#define TIMER_CV 0x00000010
18952 -#define TIMER_CV_CV 0
18953 -#define TIMER_IDR 0x00000028
18954 -#define TIMER_IDR_COVFS 0
18955 -#define TIMER_IDR_CPAS 2
18956 -#define TIMER_IDR_CPBS 3
18957 -#define TIMER_IDR_CPCS 4
18958 -#define TIMER_IDR_ETRGS 7
18959 -#define TIMER_IDR_LDRAS 5
18960 -#define TIMER_IDR_LDRBS 6
18961 -#define TIMER_IDR_LOVRS 1
18962 -#define TIMER_IER 0x00000024
18963 -#define TIMER_IER_COVFS 0
18964 -#define TIMER_IER_CPAS 2
18965 -#define TIMER_IER_CPBS 3
18966 -#define TIMER_IER_CPCS 4
18967 -#define TIMER_IER_ETRGS 7
18968 -#define TIMER_IER_LDRAS 5
18969 -#define TIMER_IER_LDRBS 6
18970 -#define TIMER_IER_LOVRS 1
18971 -#define TIMER_IMR 0x0000002c
18972 -#define TIMER_IMR_COVFS 0
18973 -#define TIMER_IMR_CPAS 2
18974 -#define TIMER_IMR_CPBS 3
18975 -#define TIMER_IMR_CPCS 4
18976 -#define TIMER_IMR_ETRGS 7
18977 -#define TIMER_IMR_LDRAS 5
18978 -#define TIMER_IMR_LDRBS 6
18979 -#define TIMER_IMR_LOVRS 1
18980 -#define TIMER_RA 0x00000014
18981 -#define TIMER_RA_RA 0
18982 -#define TIMER_RB 0x00000018
18983 -#define TIMER_RB_RB 0
18984 -#define TIMER_RC 0x0000001c
18985 -#define TIMER_RC_RC 0
18986 -#define TIMER_SR 0x00000020
18987 -#define TIMER_SR_CLKSTA 16
18988 -#define TIMER_SR_COVFS 0
18989 -#define TIMER_SR_CPAS 2
18990 -#define TIMER_SR_CPBS 3
18991 -#define TIMER_SR_CPCS 4
18992 -#define TIMER_SR_ETRGS 7
18993 -#define TIMER_SR_LDRAS 5
18994 -#define TIMER_SR_LDRBS 6
18995 -#define TIMER_SR_LOVRS 1
18996 -#define TIMER_SR_MTIOA 17
18997 -#define TIMER_SR_MTIOB 18
18998 -
18999 -/* Bit manipulation macros */
19000 -#define TIMER_BIT(name) (1 << TIMER_##name)
19001 -#define TIMER_BF(name,value) ((value) << TIMER_##name)
19002 -
19003 -/* Register access macros */
19004 -#define timer_read(port,instance,reg) \
19005 - __raw_readl(port + (0x40 * instance) + TIMER_##reg)
19006 -#define timer_write(port,instance,reg,value) \
19007 - __raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
19008 -
19009 -#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
19010 diff -urN linux-2.6.24.3/include/asm-avr32/asm.h avr32-2.6/include/asm-avr32/asm.h
19011 --- linux-2.6.24.3/include/asm-avr32/asm.h 2008-02-26 01:20:20.000000000 +0100
19012 +++ avr32-2.6/include/asm-avr32/asm.h 2008-04-23 20:12:46.000000000 +0200
19013 @@ -12,10 +12,10 @@
19014 #include <asm/asm-offsets.h>
19015 #include <asm/thread_info.h>
19016
19017 -#define mask_interrupts ssrf SR_GM_BIT
19018 -#define mask_exceptions ssrf SR_EM_BIT
19019 -#define unmask_interrupts csrf SR_GM_BIT
19020 -#define unmask_exceptions csrf SR_EM_BIT
19021 +#define mask_interrupts ssrf SYSREG_GM_OFFSET
19022 +#define mask_exceptions ssrf SYSREG_EM_OFFSET
19023 +#define unmask_interrupts csrf SYSREG_GM_OFFSET
19024 +#define unmask_exceptions csrf SYSREG_EM_OFFSET
19025
19026 #ifdef CONFIG_FRAME_POINTER
19027 .macro save_fp
19028 diff -urN linux-2.6.24.3/include/asm-avr32/byteorder.h avr32-2.6/include/asm-avr32/byteorder.h
19029 --- linux-2.6.24.3/include/asm-avr32/byteorder.h 2008-02-26 01:20:20.000000000 +0100
19030 +++ avr32-2.6/include/asm-avr32/byteorder.h 2008-04-23 20:12:46.000000000 +0200
19031 @@ -12,8 +12,10 @@
19032 extern unsigned short __builtin_bswap_16(unsigned short x);
19033 #endif
19034
19035 +#if 0
19036 #define __arch__swab32(x) __builtin_bswap_32(x)
19037 #define __arch__swab16(x) __builtin_bswap_16(x)
19038 +#endif
19039
19040 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
19041 # define __BYTEORDER_HAS_U64__
19042 diff -urN linux-2.6.24.3/include/asm-avr32/dma-controller.h avr32-2.6/include/asm-avr32/dma-controller.h
19043 --- linux-2.6.24.3/include/asm-avr32/dma-controller.h 1970-01-01 01:00:00.000000000 +0100
19044 +++ avr32-2.6/include/asm-avr32/dma-controller.h 2008-04-23 19:33:48.000000000 +0200
19045 @@ -0,0 +1,166 @@
19046 +/*
19047 + * Copyright (C) 2005-2006 Atmel Corporation
19048 + *
19049 + * This program is free software; you can redistribute it and/or modify
19050 + * it under the terms of the GNU General Public License version 2 as
19051 + * published by the Free Software Foundation.
19052 + */
19053 +#ifndef __ASM_AVR32_DMA_CONTROLLER_H
19054 +#define __ASM_AVR32_DMA_CONTROLLER_H
19055 +
19056 +#include <linux/device.h>
19057 +
19058 +#define DMA_DIR_MEM_TO_MEM 0x0000
19059 +#define DMA_DIR_MEM_TO_PERIPH 0x0001
19060 +#define DMA_DIR_PERIPH_TO_MEM 0x0002
19061 +#define DMA_DIR_PERIPH_TO_PERIPH 0x0003
19062 +
19063 +#define DMA_WIDTH_8BIT 0
19064 +#define DMA_WIDTH_16BIT 1
19065 +#define DMA_WIDTH_32BIT 2
19066 +
19067 +struct dma_request {
19068 + struct dma_controller *dmac;
19069 + struct list_head list;
19070 +
19071 + unsigned short channel;
19072 +
19073 + void (*xfer_complete)(struct dma_request *req);
19074 + void (*block_complete)(struct dma_request *req);
19075 + void (*error)(struct dma_request *req);
19076 +};
19077 +
19078 +struct dma_request_sg {
19079 + struct dma_request req;
19080 +
19081 + int nr_sg;
19082 + struct scatterlist *sg;
19083 + unsigned long block_size;
19084 + unsigned int nr_blocks;
19085 +
19086 + dma_addr_t data_reg;
19087 + unsigned short periph_id;
19088 +
19089 + unsigned char direction;
19090 + unsigned char width;
19091 +};
19092 +#define to_dma_request_sg(_req) \
19093 + container_of(_req, struct dma_request_sg, req)
19094 +
19095 +struct dma_request_cyclic {
19096 + struct dma_request req;
19097 +
19098 + int periods;
19099 + unsigned long buffer_size;
19100 +
19101 + dma_addr_t buffer_start;
19102 + dma_addr_t data_reg;
19103 +
19104 + unsigned short periph_id;
19105 + unsigned char direction;
19106 + unsigned char width;
19107 +
19108 + void *dev_id;
19109 +};
19110 +#define to_dma_request_cyclic(_req) \
19111 + container_of(_req, struct dma_request_cyclic, req)
19112 +
19113 +struct dma_request_memcpy {
19114 + struct dma_request req;
19115 +
19116 + dma_addr_t src_addr;
19117 + unsigned int src_width;
19118 + unsigned int src_stride;
19119 +
19120 + dma_addr_t dst_addr;
19121 + unsigned int dst_width;
19122 + unsigned int dst_stride;
19123 +
19124 + size_t length;
19125 +
19126 + unsigned short src_reverse:1;
19127 + unsigned short dst_reverse:1;
19128 +};
19129 +#define to_dma_request_memcpy(_req) \
19130 + container_of(_req, struct dma_request_memcpy, req)
19131 +
19132 +struct dma_controller {
19133 + struct list_head list;
19134 + int id;
19135 + struct device *dev;
19136 +
19137 + int (*alloc_channel)(struct dma_controller *dmac);
19138 + void (*release_channel)(struct dma_controller *dmac,
19139 + int channel);
19140 + int (*prepare_request_sg)(struct dma_controller *dmac,
19141 + struct dma_request_sg *req);
19142 + int (*prepare_request_cyclic)(struct dma_controller *dmac,
19143 + struct dma_request_cyclic *req);
19144 + int (*prepare_request_memcpy)(struct dma_controller *dmac,
19145 + struct dma_request_memcpy *req);
19146 + int (*start_request)(struct dma_controller *dmac,
19147 + unsigned int channel);
19148 + int (*stop_request)(struct dma_controller *dmac,
19149 + unsigned int channel);
19150 + dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
19151 + unsigned int channel);
19152 +};
19153 +
19154 +static inline int
19155 +dma_alloc_channel(struct dma_controller *dmac)
19156 +{
19157 + return dmac->alloc_channel(dmac);
19158 +}
19159 +
19160 +static inline void
19161 +dma_release_channel(struct dma_controller *dmac, int chan)
19162 +{
19163 + dmac->release_channel(dmac, chan);
19164 +}
19165 +
19166 +static inline int
19167 +dma_prepare_request_sg(struct dma_controller *dmac,
19168 + struct dma_request_sg *req)
19169 +{
19170 + return dmac->prepare_request_sg(dmac, req);
19171 +}
19172 +
19173 +static inline int
19174 +dma_prepare_request_cyclic(struct dma_controller *dmac,
19175 + struct dma_request_cyclic *req)
19176 +{
19177 + return dmac->prepare_request_cyclic(dmac, req);
19178 +}
19179 +
19180 +static inline int
19181 +dma_prepare_request_memcpy(struct dma_controller *dmac,
19182 + struct dma_request_memcpy *req)
19183 +{
19184 + return dmac->prepare_request_memcpy(dmac, req);
19185 +}
19186 +
19187 +static inline int
19188 +dma_start_request(struct dma_controller *dmac,
19189 + unsigned int channel)
19190 +{
19191 + return dmac->start_request(dmac, channel);
19192 +}
19193 +
19194 +static inline int
19195 +dma_stop_request(struct dma_controller *dmac,
19196 + unsigned int channel)
19197 +{
19198 + return dmac->stop_request(dmac, channel);
19199 +}
19200 +
19201 +static inline dma_addr_t
19202 +dma_get_current_pos(struct dma_controller *dmac,
19203 + unsigned int channel)
19204 +{
19205 + return dmac->get_current_pos(dmac, channel);
19206 +}
19207 +
19208 +extern int register_dma_controller(struct dma_controller *dmac);
19209 +extern struct dma_controller *find_dma_controller(int id);
19210 +
19211 +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
19212 diff -urN linux-2.6.24.3/include/asm-avr32/intc.h avr32-2.6/include/asm-avr32/intc.h
19213 --- linux-2.6.24.3/include/asm-avr32/intc.h 2008-02-26 01:20:20.000000000 +0100
19214 +++ avr32-2.6/include/asm-avr32/intc.h 1970-01-01 01:00:00.000000000 +0100
19215 @@ -1,128 +0,0 @@
19216 -#ifndef __ASM_AVR32_INTC_H
19217 -#define __ASM_AVR32_INTC_H
19218 -
19219 -#include <linux/sysdev.h>
19220 -#include <linux/interrupt.h>
19221 -
19222 -struct irq_controller;
19223 -struct irqaction;
19224 -struct pt_regs;
19225 -
19226 -struct platform_device;
19227 -
19228 -/* Information about the internal interrupt controller */
19229 -struct intc_device {
19230 - /* ioremapped address of configuration block */
19231 - void __iomem *regs;
19232 -
19233 - /* the physical device */
19234 - struct platform_device *pdev;
19235 -
19236 - /* Number of interrupt lines per group. */
19237 - unsigned int irqs_per_group;
19238 -
19239 - /* The highest group ID + 1 */
19240 - unsigned int nr_groups;
19241 -
19242 - /*
19243 - * Bitfield indicating which groups are actually in use. The
19244 - * size of the array is
19245 - * ceil(group_max / (8 * sizeof(unsigned int))).
19246 - */
19247 - unsigned int group_mask[];
19248 -};
19249 -
19250 -struct irq_controller_class {
19251 - /*
19252 - * A short name identifying this kind of controller.
19253 - */
19254 - const char *typename;
19255 - /*
19256 - * Handle the IRQ. Must do any necessary acking and masking.
19257 - */
19258 - irqreturn_t (*handle)(int irq, void *dev_id, struct pt_regs *regs);
19259 - /*
19260 - * Register a new IRQ handler.
19261 - */
19262 - int (*setup)(struct irq_controller *ctrl, unsigned int irq,
19263 - struct irqaction *action);
19264 - /*
19265 - * Unregister a IRQ handler.
19266 - */
19267 - void (*free)(struct irq_controller *ctrl, unsigned int irq,
19268 - void *dev_id);
19269 - /*
19270 - * Mask the IRQ in the interrupt controller.
19271 - */
19272 - void (*mask)(struct irq_controller *ctrl, unsigned int irq);
19273 - /*
19274 - * Unmask the IRQ in the interrupt controller.
19275 - */
19276 - void (*unmask)(struct irq_controller *ctrl, unsigned int irq);
19277 - /*
19278 - * Set the type of the IRQ. See below for possible types.
19279 - * Return -EINVAL if a given type is not supported
19280 - */
19281 - int (*set_type)(struct irq_controller *ctrl, unsigned int irq,
19282 - unsigned int type);
19283 - /*
19284 - * Return the IRQ type currently set
19285 - */
19286 - unsigned int (*get_type)(struct irq_controller *ctrl, unsigned int irq);
19287 -};
19288 -
19289 -struct irq_controller {
19290 - struct irq_controller_class *class;
19291 - unsigned int irq_group;
19292 - unsigned int first_irq;
19293 - unsigned int nr_irqs;
19294 - struct list_head list;
19295 -};
19296 -
19297 -struct intc_group_desc {
19298 - struct irq_controller *ctrl;
19299 - irqreturn_t (*handle)(int, void *, struct pt_regs *);
19300 - unsigned long flags;
19301 - void *dev_id;
19302 - const char *devname;
19303 -};
19304 -
19305 -/*
19306 - * The internal interrupt controller. Defined in board/part-specific
19307 - * devices.c.
19308 - * TODO: Should probably be defined per-cpu.
19309 - */
19310 -extern struct intc_device intc;
19311 -
19312 -extern int request_internal_irq(unsigned int irq,
19313 - irqreturn_t (*handler)(int, void *, struct pt_regs *),
19314 - unsigned long irqflags,
19315 - const char *devname, void *dev_id);
19316 -extern void free_internal_irq(unsigned int irq);
19317 -
19318 -/* Only used by time_init() */
19319 -extern int setup_internal_irq(unsigned int irq, struct intc_group_desc *desc);
19320 -
19321 -/*
19322 - * Set interrupt priority for a given group. `group' can be found by
19323 - * using irq_to_group(irq). Priority can be from 0 (lowest) to 3
19324 - * (highest). Higher-priority interrupts will preempt lower-priority
19325 - * interrupts (unless interrupts are masked globally).
19326 - *
19327 - * This function does not check for conflicts within a group.
19328 - */
19329 -extern int intc_set_priority(unsigned int group,
19330 - unsigned int priority);
19331 -
19332 -/*
19333 - * Returns a bitmask of pending interrupts in a group.
19334 - */
19335 -extern unsigned long intc_get_pending(unsigned int group);
19336 -
19337 -/*
19338 - * Register a new external interrupt controller. Returns the first
19339 - * external IRQ number that is assigned to the new controller.
19340 - */
19341 -extern int intc_register_controller(struct irq_controller *ctrl);
19342 -
19343 -#endif /* __ASM_AVR32_INTC_H */
19344 diff -urN linux-2.6.24.3/include/asm-avr32/irq.h avr32-2.6/include/asm-avr32/irq.h
19345 --- linux-2.6.24.3/include/asm-avr32/irq.h 2008-02-26 01:20:20.000000000 +0100
19346 +++ avr32-2.6/include/asm-avr32/irq.h 2008-04-23 20:12:46.000000000 +0200
19347 @@ -11,4 +11,14 @@
19348
19349 #define irq_canonicalize(i) (i)
19350
19351 +#ifndef __ASSEMBLER__
19352 +int nmi_enable(void);
19353 +void nmi_disable(void);
19354 +
19355 +/*
19356 + * Returns a bitmask of pending interrupts in a group.
19357 + */
19358 +extern unsigned long intc_get_pending(unsigned int group);
19359 +#endif
19360 +
19361 #endif /* __ASM_AVR32_IOCTLS_H */
19362 diff -urN linux-2.6.24.3/include/asm-avr32/kdebug.h avr32-2.6/include/asm-avr32/kdebug.h
19363 --- linux-2.6.24.3/include/asm-avr32/kdebug.h 2008-02-26 01:20:20.000000000 +0100
19364 +++ avr32-2.6/include/asm-avr32/kdebug.h 2008-04-23 19:33:48.000000000 +0200
19365 @@ -5,6 +5,7 @@
19366 enum die_val {
19367 DIE_BREAKPOINT,
19368 DIE_SSTEP,
19369 + DIE_NMI,
19370 };
19371
19372 #endif /* __ASM_AVR32_KDEBUG_H */
19373 diff -urN linux-2.6.24.3/include/asm-avr32/ocd.h avr32-2.6/include/asm-avr32/ocd.h
19374 --- linux-2.6.24.3/include/asm-avr32/ocd.h 2008-02-26 01:20:20.000000000 +0100
19375 +++ avr32-2.6/include/asm-avr32/ocd.h 2008-04-23 19:33:48.000000000 +0200
19376 @@ -533,6 +533,11 @@
19377 #define ocd_read(reg) __ocd_read(OCD_##reg)
19378 #define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
19379
19380 +struct task_struct;
19381 +
19382 +void ocd_enable(struct task_struct *child);
19383 +void ocd_disable(struct task_struct *child);
19384 +
19385 #endif /* !__ASSEMBLER__ */
19386
19387 #endif /* __ASM_AVR32_OCD_H */
19388 diff -urN linux-2.6.24.3/include/asm-avr32/pgtable.h avr32-2.6/include/asm-avr32/pgtable.h
19389 --- linux-2.6.24.3/include/asm-avr32/pgtable.h 2008-02-26 01:20:20.000000000 +0100
19390 +++ avr32-2.6/include/asm-avr32/pgtable.h 2008-04-23 20:12:46.000000000 +0200
19391 @@ -157,6 +157,7 @@
19392 #define _PAGE_S(x) _PAGE_NORMAL(x)
19393
19394 #define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
19395 +#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
19396
19397 #ifndef __ASSEMBLY__
19398 /*
19399 diff -urN linux-2.6.24.3/include/asm-avr32/processor.h avr32-2.6/include/asm-avr32/processor.h
19400 --- linux-2.6.24.3/include/asm-avr32/processor.h 2008-02-26 01:20:20.000000000 +0100
19401 +++ avr32-2.6/include/asm-avr32/processor.h 2008-04-23 19:33:48.000000000 +0200
19402 @@ -57,11 +57,25 @@
19403 unsigned short cpu_revision;
19404 enum tlb_config tlb_config;
19405 unsigned long features;
19406 + u32 device_id;
19407
19408 struct cache_info icache;
19409 struct cache_info dcache;
19410 };
19411
19412 +static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
19413 +{
19414 + return (cpu->device_id >> 1) & 0x7f;
19415 +}
19416 +static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
19417 +{
19418 + return (cpu->device_id >> 12) & 0xffff;
19419 +}
19420 +static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
19421 +{
19422 + return (cpu->device_id >> 28) & 0x0f;
19423 +}
19424 +
19425 extern struct avr32_cpuinfo boot_cpu_data;
19426
19427 #ifdef CONFIG_SMP
19428 diff -urN linux-2.6.24.3/include/asm-avr32/ptrace.h avr32-2.6/include/asm-avr32/ptrace.h
19429 --- linux-2.6.24.3/include/asm-avr32/ptrace.h 2008-02-26 01:20:20.000000000 +0100
19430 +++ avr32-2.6/include/asm-avr32/ptrace.h 2008-04-23 19:33:48.000000000 +0200
19431 @@ -121,7 +121,15 @@
19432 };
19433
19434 #ifdef __KERNEL__
19435 -# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19436 +
19437 +#include <asm/ocd.h>
19438 +
19439 +#define arch_ptrace_attach(child) ocd_enable(child)
19440 +
19441 +#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19442 +#define instruction_pointer(regs) ((regs)->pc)
19443 +#define profile_pc(regs) instruction_pointer(regs)
19444 +
19445 extern void show_regs (struct pt_regs *);
19446
19447 static __inline__ int valid_user_regs(struct pt_regs *regs)
19448 @@ -141,9 +149,6 @@
19449 return 0;
19450 }
19451
19452 -#define instruction_pointer(regs) ((regs)->pc)
19453 -
19454 -#define profile_pc(regs) instruction_pointer(regs)
19455
19456 #endif /* __KERNEL__ */
19457
19458 diff -urN linux-2.6.24.3/include/asm-avr32/thread_info.h avr32-2.6/include/asm-avr32/thread_info.h
19459 --- linux-2.6.24.3/include/asm-avr32/thread_info.h 2008-02-26 01:20:20.000000000 +0100
19460 +++ avr32-2.6/include/asm-avr32/thread_info.h 2008-04-23 19:33:48.000000000 +0200
19461 @@ -88,6 +88,7 @@
19462 #define TIF_MEMDIE 6
19463 #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */
19464 #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */
19465 +#define TIF_DEBUG 30 /* debugging enabled */
19466 #define TIF_USERSPACE 31 /* true if FS sets userspace */
19467
19468 #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
19469 diff -urN linux-2.6.24.3/include/linux/atmel_pwm.h avr32-2.6/include/linux/atmel_pwm.h
19470 --- linux-2.6.24.3/include/linux/atmel_pwm.h 1970-01-01 01:00:00.000000000 +0100
19471 +++ avr32-2.6/include/linux/atmel_pwm.h 2008-04-23 19:33:51.000000000 +0200
19472 @@ -0,0 +1,70 @@
19473 +#ifndef __LINUX_ATMEL_PWM_H
19474 +#define __LINUX_ATMEL_PWM_H
19475 +
19476 +/**
19477 + * struct pwm_channel - driver handle to a PWM channel
19478 + * @regs: base of this channel's registers
19479 + * @index: number of this channel (0..31)
19480 + * @mck: base clock rate, which can be prescaled and maybe subdivided
19481 + *
19482 + * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
19483 + * Then they configure its clock rate (derived from MCK), alignment,
19484 + * polarity, and duty cycle by writing directly to the channel registers,
19485 + * before enabling the channel by calling pwm_channel_enable().
19486 + *
19487 + * After emitting a PWM signal for the desired length of time, drivers
19488 + * may then pwm_channel_disable() or pwm_channel_free(). Both of these
19489 + * disable the channel, but when it's freed the IRQ is deconfigured and
19490 + * the channel must later be re-allocated and reconfigured.
19491 + *
19492 + * Note that if the period or duty cycle need to be changed while the
19493 + * PWM channel is operating, drivers must use the PWM_CUPD double buffer
19494 + * mechanism, either polling until they change or getting implicitly
19495 + * notified through a once-per-period interrupt handler.
19496 + */
19497 +struct pwm_channel {
19498 + void __iomem *regs;
19499 + unsigned index;
19500 + unsigned long mck;
19501 +};
19502 +
19503 +extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
19504 +extern int pwm_channel_free(struct pwm_channel *ch);
19505 +
19506 +extern int pwm_clk_alloc(unsigned prescale, unsigned div);
19507 +extern void pwm_clk_free(unsigned clk);
19508 +
19509 +extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
19510 +
19511 +#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
19512 +#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
19513 +
19514 +/* periodic interrupts, mostly for CUPD changes to period or cycle */
19515 +extern int pwm_channel_handler(struct pwm_channel *ch,
19516 + void (*handler)(struct pwm_channel *ch));
19517 +
19518 +/* per-channel registers (banked at pwm_channel->regs) */
19519 +#define PWM_CMR 0x00 /* mode register */
19520 +#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
19521 +#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
19522 +#define PWM_CPR_CALG (1 << 8) /* set: center align */
19523 +#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
19524 +#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
19525 +#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
19526 +#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
19527 +#define PWM_CPRD 0x08 /* period (count up from zero) */
19528 +#define PWM_CCNT 0x0c /* counter (20 bits?) */
19529 +#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
19530 +
19531 +static inline void
19532 +pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
19533 +{
19534 + __raw_writel(val, pwmc->regs + offset);
19535 +}
19536 +
19537 +static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
19538 +{
19539 + return __raw_readl(pwmc->regs + offset);
19540 +}
19541 +
19542 +#endif /* __LINUX_ATMEL_PWM_H */
19543 diff -urN linux-2.6.24.3/include/linux/atmel_serial.h avr32-2.6/include/linux/atmel_serial.h
19544 --- linux-2.6.24.3/include/linux/atmel_serial.h 1970-01-01 01:00:00.000000000 +0100
19545 +++ avr32-2.6/include/linux/atmel_serial.h 2008-04-23 19:33:51.000000000 +0200
19546 @@ -0,0 +1,127 @@
19547 +/*
19548 + * include/linux/atmel_serial.h
19549 + *
19550 + * Copyright (C) 2005 Ivan Kokshaysky
19551 + * Copyright (C) SAN People
19552 + *
19553 + * USART registers.
19554 + * Based on AT91RM9200 datasheet revision E.
19555 + *
19556 + * This program is free software; you can redistribute it and/or modify
19557 + * it under the terms of the GNU General Public License as published by
19558 + * the Free Software Foundation; either version 2 of the License, or
19559 + * (at your option) any later version.
19560 + */
19561 +
19562 +#ifndef ATMEL_SERIAL_H
19563 +#define ATMEL_SERIAL_H
19564 +
19565 +#define ATMEL_US_CR 0x00 /* Control Register */
19566 +#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
19567 +#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
19568 +#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
19569 +#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
19570 +#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
19571 +#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
19572 +#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
19573 +#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
19574 +#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
19575 +#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
19576 +#define ATMEL_US_SENDA (1 << 12) /* Send Address */
19577 +#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
19578 +#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
19579 +#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
19580 +#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
19581 +#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
19582 +#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
19583 +#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
19584 +
19585 +#define ATMEL_US_MR 0x04 /* Mode Register */
19586 +#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
19587 +#define ATMEL_US_USMODE_NORMAL 0
19588 +#define ATMEL_US_USMODE_RS485 1
19589 +#define ATMEL_US_USMODE_HWHS 2
19590 +#define ATMEL_US_USMODE_MODEM 3
19591 +#define ATMEL_US_USMODE_ISO7816_T0 4
19592 +#define ATMEL_US_USMODE_ISO7816_T1 6
19593 +#define ATMEL_US_USMODE_IRDA 8
19594 +#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
19595 +#define ATMEL_US_USCLKS_MCK (0 << 4)
19596 +#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
19597 +#define ATMEL_US_USCLKS_SCK (3 << 4)
19598 +#define ATMEL_US_CHRL (3 << 6) /* Character Length */
19599 +#define ATMEL_US_CHRL_5 (0 << 6)
19600 +#define ATMEL_US_CHRL_6 (1 << 6)
19601 +#define ATMEL_US_CHRL_7 (2 << 6)
19602 +#define ATMEL_US_CHRL_8 (3 << 6)
19603 +#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
19604 +#define ATMEL_US_PAR (7 << 9) /* Parity Type */
19605 +#define ATMEL_US_PAR_EVEN (0 << 9)
19606 +#define ATMEL_US_PAR_ODD (1 << 9)
19607 +#define ATMEL_US_PAR_SPACE (2 << 9)
19608 +#define ATMEL_US_PAR_MARK (3 << 9)
19609 +#define ATMEL_US_PAR_NONE (4 << 9)
19610 +#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
19611 +#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
19612 +#define ATMEL_US_NBSTOP_1 (0 << 12)
19613 +#define ATMEL_US_NBSTOP_1_5 (1 << 12)
19614 +#define ATMEL_US_NBSTOP_2 (2 << 12)
19615 +#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
19616 +#define ATMEL_US_CHMODE_NORMAL (0 << 14)
19617 +#define ATMEL_US_CHMODE_ECHO (1 << 14)
19618 +#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
19619 +#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
19620 +#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
19621 +#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
19622 +#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
19623 +#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
19624 +#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
19625 +#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
19626 +#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
19627 +#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
19628 +
19629 +#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
19630 +#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
19631 +#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
19632 +#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
19633 +#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
19634 +#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
19635 +#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
19636 +#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
19637 +#define ATMEL_US_PARE (1 << 7) /* Parity Error */
19638 +#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
19639 +#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
19640 +#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
19641 +#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
19642 +#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
19643 +#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
19644 +#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
19645 +#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
19646 +#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
19647 +#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
19648 +#define ATMEL_US_RI (1 << 20) /* RI */
19649 +#define ATMEL_US_DSR (1 << 21) /* DSR */
19650 +#define ATMEL_US_DCD (1 << 22) /* DCD */
19651 +#define ATMEL_US_CTS (1 << 23) /* CTS */
19652 +
19653 +#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
19654 +#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
19655 +#define ATMEL_US_CSR 0x14 /* Channel Status Register */
19656 +#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
19657 +#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
19658 +#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
19659 +
19660 +#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
19661 +#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
19662 +
19663 +#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
19664 +#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
19665 +
19666 +#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
19667 +#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
19668 +
19669 +#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
19670 +#define ATMEL_US_NER 0x44 /* Number of Errors Register */
19671 +#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
19672 +
19673 +#endif
19674 diff -urN linux-2.6.24.3/include/linux/atmel_tc.h avr32-2.6/include/linux/atmel_tc.h
19675 --- linux-2.6.24.3/include/linux/atmel_tc.h 1970-01-01 01:00:00.000000000 +0100
19676 +++ avr32-2.6/include/linux/atmel_tc.h 2008-04-23 20:12:46.000000000 +0200
19677 @@ -0,0 +1,252 @@
19678 +/*
19679 + * Timer/Counter Unit (TC) registers.
19680 + *
19681 + * This program is free software; you can redistribute it and/or modify
19682 + * it under the terms of the GNU General Public License as published by
19683 + * the Free Software Foundation; either version 2 of the License, or
19684 + * (at your option) any later version.
19685 + */
19686 +
19687 +#ifndef ATMEL_TC_H
19688 +#define ATMEL_TC_H
19689 +
19690 +#include <linux/compiler.h>
19691 +#include <linux/list.h>
19692 +
19693 +/*
19694 + * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
19695 + * three general-purpose 16-bit timers. These timers share one register bank.
19696 + * Depending on the SOC, each timer may have its own clock and IRQ, or those
19697 + * may be shared by the whole TC block.
19698 + *
19699 + * These TC blocks may have up to nine external pins: TCLK0..2 signals for
19700 + * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
19701 + * or triggering. Those pins need to be set up for use with the TC block,
19702 + * else they will be used as GPIOs or for a different controller.
19703 + *
19704 + * Although we expect each TC block to have a platform_device node, those
19705 + * nodes are not what drivers bind to. Instead, they ask for a specific
19706 + * TC block, by number ... which is a common approach on systems with many
19707 + * timers. Then they use clk_get() and platform_get_irq() to get clock and
19708 + * IRQ resources.
19709 + */
19710 +
19711 +struct clk;
19712 +
19713 +/**
19714 + * struct atmel_tc - information about a Timer/Counter Block
19715 + * @pdev: physical device
19716 + * @iomem: resource associated with the I/O register
19717 + * @regs: mapping through which the I/O registers can be accessed
19718 + * @irq: irq for each of the three channels
19719 + * @clk: internal clock source for each of the three channels
19720 + * @node: list node, for tclib internal use
19721 + *
19722 + * On some platforms, each TC channel has its own clocks and IRQs,
19723 + * while on others, all TC channels share the same clock and IRQ.
19724 + * Drivers should clk_enable() all the clocks they need even though
19725 + * all the entries in @clk may point to the same physical clock.
19726 + * Likewise, drivers should request irqs independently for each
19727 + * channel, but they must use IRQF_SHARED in case some of the entries
19728 + * in @irq are actually the same IRQ.
19729 + */
19730 +struct atmel_tc {
19731 + struct platform_device *pdev;
19732 + struct resource *iomem;
19733 + void __iomem *regs;
19734 + int irq[3];
19735 + struct clk *clk[3];
19736 + struct list_head node;
19737 +};
19738 +
19739 +extern struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name);
19740 +extern void atmel_tc_free(struct atmel_tc *tc);
19741 +
19742 +/* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
19743 +extern const u8 atmel_tc_divisors[5];
19744 +
19745 +
19746 +/*
19747 + * Two registers have block-wide controls. These are: configuring the three
19748 + * "external" clocks (or event sources) used by the timer channels; and
19749 + * synchronizing the timers by resetting them all at once.
19750 + *
19751 + * "External" can mean "external to chip" using the TCLK0, TCLK1, or TCLK2
19752 + * signals. Or, it can mean "external to timer", using the TIOA output from
19753 + * one of the other two timers that's being run in waveform mode.
19754 + */
19755 +
19756 +#define ATMEL_TC_BCR 0xc0 /* TC Block Control Register */
19757 +#define ATMEL_TC_SYNC (1 << 0) /* synchronize timers */
19758 +
19759 +#define ATMEL_TC_BMR 0xc4 /* TC Block Mode Register */
19760 +#define ATMEL_TC_TC0XC0S (3 << 0) /* external clock 0 source */
19761 +#define ATMEL_TC_TC0XC0S_TCLK0 (0 << 0)
19762 +#define ATMEL_TC_TC0XC0S_NONE (1 << 0)
19763 +#define ATMEL_TC_TC0XC0S_TIOA1 (2 << 0)
19764 +#define ATMEL_TC_TC0XC0S_TIOA2 (3 << 0)
19765 +#define ATMEL_TC_TC1XC1S (3 << 2) /* external clock 1 source */
19766 +#define ATMEL_TC_TC1XC1S_TCLK1 (0 << 2)
19767 +#define ATMEL_TC_TC1XC1S_NONE (1 << 2)
19768 +#define ATMEL_TC_TC1XC1S_TIOA0 (2 << 2)
19769 +#define ATMEL_TC_TC1XC1S_TIOA2 (3 << 2)
19770 +#define ATMEL_TC_TC2XC2S (3 << 4) /* external clock 2 source */
19771 +#define ATMEL_TC_TC2XC2S_TCLK2 (0 << 4)
19772 +#define ATMEL_TC_TC2XC2S_NONE (1 << 4)
19773 +#define ATMEL_TC_TC2XC2S_TIOA0 (2 << 4)
19774 +#define ATMEL_TC_TC2XC2S_TIOA1 (3 << 4)
19775 +
19776 +
19777 +/*
19778 + * Each TC block has three "channels", each with one counter and controls.
19779 + *
19780 + * Note that the semantics of ATMEL_TC_TIMER_CLOCKx (input clock selection
19781 + * when it's not "external") is silicon-specific. AT91 platforms use one
19782 + * set of definitions; AVR32 platforms use a different set. Don't hard-wire
19783 + * such knowledge into your code, use the global "atmel_tc_divisors" ...
19784 + * where index N is the divisor for clock N+1, else zero to indicate it uses
19785 + * the 32 KiHz clock.
19786 + *
19787 + * The timers can be chained in various ways, and operated in "waveform"
19788 + * generation mode (including PWM) or "capture" mode (to time events). In
19789 + * both modes, behavior can be configured in many ways.
19790 + *
19791 + * Each timer has two I/O pins, TIOA and TIOB. Waveform mode uses TIOA as a
19792 + * PWM output, and TIOB as either another PWM or as a trigger. Capture mode
19793 + * uses them only as inputs.
19794 + */
19795 +#define ATMEL_TC_CHAN(idx) ((idx)*0x40)
19796 +#define ATMEL_TC_REG(idx, reg) (ATMEL_TC_CHAN(idx) + ATMEL_TC_ ## reg)
19797 +
19798 +#define ATMEL_TC_CCR 0x00 /* Channel Control Register */
19799 +#define ATMEL_TC_CLKEN (1 << 0) /* clock enable */
19800 +#define ATMEL_TC_CLKDIS (1 << 1) /* clock disable */
19801 +#define ATMEL_TC_SWTRG (1 << 2) /* software trigger */
19802 +
19803 +#define ATMEL_TC_CMR 0x04 /* Channel Mode Register */
19804 +
19805 +/* Both modes share some CMR bits */
19806 +#define ATMEL_TC_TCCLKS (7 << 0) /* clock source */
19807 +#define ATMEL_TC_TIMER_CLOCK1 (0 << 0)
19808 +#define ATMEL_TC_TIMER_CLOCK2 (1 << 0)
19809 +#define ATMEL_TC_TIMER_CLOCK3 (2 << 0)
19810 +#define ATMEL_TC_TIMER_CLOCK4 (3 << 0)
19811 +#define ATMEL_TC_TIMER_CLOCK5 (4 << 0)
19812 +#define ATMEL_TC_XC0 (5 << 0)
19813 +#define ATMEL_TC_XC1 (6 << 0)
19814 +#define ATMEL_TC_XC2 (7 << 0)
19815 +#define ATMEL_TC_CLKI (1 << 3) /* clock invert */
19816 +#define ATMEL_TC_BURST (3 << 4) /* clock gating */
19817 +#define ATMEL_TC_GATE_NONE (0 << 4)
19818 +#define ATMEL_TC_GATE_XC0 (1 << 4)
19819 +#define ATMEL_TC_GATE_XC1 (2 << 4)
19820 +#define ATMEL_TC_GATE_XC2 (3 << 4)
19821 +#define ATMEL_TC_WAVE (1 << 15) /* true = Waveform mode */
19822 +
19823 +/* CAPTURE mode CMR bits */
19824 +#define ATMEL_TC_LDBSTOP (1 << 6) /* counter stops on RB load */
19825 +#define ATMEL_TC_LDBDIS (1 << 7) /* counter disable on RB load */
19826 +#define ATMEL_TC_ETRGEDG (3 << 8) /* external trigger edge */
19827 +#define ATMEL_TC_ETRGEDG_NONE (0 << 8)
19828 +#define ATMEL_TC_ETRGEDG_RISING (1 << 8)
19829 +#define ATMEL_TC_ETRGEDG_FALLING (2 << 8)
19830 +#define ATMEL_TC_ETRGEDG_BOTH (3 << 8)
19831 +#define ATMEL_TC_ABETRG (1 << 10) /* external trigger is TIOA? */
19832 +#define ATMEL_TC_CPCTRG (1 << 14) /* RC compare trigger enable */
19833 +#define ATMEL_TC_LDRA (3 << 16) /* RA loading edge (of TIOA) */
19834 +#define ATMEL_TC_LDRA_NONE (0 << 16)
19835 +#define ATMEL_TC_LDRA_RISING (1 << 16)
19836 +#define ATMEL_TC_LDRA_FALLING (2 << 16)
19837 +#define ATMEL_TC_LDRA_BOTH (3 << 16)
19838 +#define ATMEL_TC_LDRB (3 << 18) /* RB loading edge (of TIOA) */
19839 +#define ATMEL_TC_LDRB_NONE (0 << 18)
19840 +#define ATMEL_TC_LDRB_RISING (1 << 18)
19841 +#define ATMEL_TC_LDRB_FALLING (2 << 18)
19842 +#define ATMEL_TC_LDRB_BOTH (3 << 18)
19843 +
19844 +/* WAVEFORM mode CMR bits */
19845 +#define ATMEL_TC_CPCSTOP (1 << 6) /* RC compare stops counter */
19846 +#define ATMEL_TC_CPCDIS (1 << 7) /* RC compare disables counter */
19847 +#define ATMEL_TC_EEVTEDG (3 << 8) /* external event edge */
19848 +#define ATMEL_TC_EEVTEDG_NONE (0 << 8)
19849 +#define ATMEL_TC_EEVTEDG_RISING (1 << 8)
19850 +#define ATMEL_TC_EEVTEDG_FALLING (2 << 8)
19851 +#define ATMEL_TC_EEVTEDG_BOTH (3 << 8)
19852 +#define ATMEL_TC_EEVT (3 << 10) /* external event source */
19853 +#define ATMEL_TC_EEVT_TIOB (0 << 10)
19854 +#define ATMEL_TC_EEVT_XC0 (1 << 10)
19855 +#define ATMEL_TC_EEVT_XC1 (2 << 10)
19856 +#define ATMEL_TC_EEVT_XC2 (3 << 10)
19857 +#define ATMEL_TC_ENETRG (1 << 12) /* external event is trigger */
19858 +#define ATMEL_TC_WAVESEL (3 << 13) /* waveform type */
19859 +#define ATMEL_TC_WAVESEL_UP (0 << 13)
19860 +#define ATMEL_TC_WAVESEL_UPDOWN (1 << 13)
19861 +#define ATMEL_TC_WAVESEL_UP_AUTO (2 << 13)
19862 +#define ATMEL_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
19863 +#define ATMEL_TC_ACPA (3 << 16) /* RA compare changes TIOA */
19864 +#define ATMEL_TC_ACPA_NONE (0 << 16)
19865 +#define ATMEL_TC_ACPA_SET (1 << 16)
19866 +#define ATMEL_TC_ACPA_CLEAR (2 << 16)
19867 +#define ATMEL_TC_ACPA_TOGGLE (3 << 16)
19868 +#define ATMEL_TC_ACPC (3 << 18) /* RC compare changes TIOA */
19869 +#define ATMEL_TC_ACPC_NONE (0 << 18)
19870 +#define ATMEL_TC_ACPC_SET (1 << 18)
19871 +#define ATMEL_TC_ACPC_CLEAR (2 << 18)
19872 +#define ATMEL_TC_ACPC_TOGGLE (3 << 18)
19873 +#define ATMEL_TC_AEEVT (3 << 20) /* external event changes TIOA */
19874 +#define ATMEL_TC_AEEVT_NONE (0 << 20)
19875 +#define ATMEL_TC_AEEVT_SET (1 << 20)
19876 +#define ATMEL_TC_AEEVT_CLEAR (2 << 20)
19877 +#define ATMEL_TC_AEEVT_TOGGLE (3 << 20)
19878 +#define ATMEL_TC_ASWTRG (3 << 22) /* software trigger changes TIOA */
19879 +#define ATMEL_TC_ASWTRG_NONE (0 << 22)
19880 +#define ATMEL_TC_ASWTRG_SET (1 << 22)
19881 +#define ATMEL_TC_ASWTRG_CLEAR (2 << 22)
19882 +#define ATMEL_TC_ASWTRG_TOGGLE (3 << 22)
19883 +#define ATMEL_TC_BCPB (3 << 24) /* RB compare changes TIOB */
19884 +#define ATMEL_TC_BCPB_NONE (0 << 24)
19885 +#define ATMEL_TC_BCPB_SET (1 << 24)
19886 +#define ATMEL_TC_BCPB_CLEAR (2 << 24)
19887 +#define ATMEL_TC_BCPB_TOGGLE (3 << 24)
19888 +#define ATMEL_TC_BCPC (3 << 26) /* RC compare changes TIOB */
19889 +#define ATMEL_TC_BCPC_NONE (0 << 26)
19890 +#define ATMEL_TC_BCPC_SET (1 << 26)
19891 +#define ATMEL_TC_BCPC_CLEAR (2 << 26)
19892 +#define ATMEL_TC_BCPC_TOGGLE (3 << 26)
19893 +#define ATMEL_TC_BEEVT (3 << 28) /* external event changes TIOB */
19894 +#define ATMEL_TC_BEEVT_NONE (0 << 28)
19895 +#define ATMEL_TC_BEEVT_SET (1 << 28)
19896 +#define ATMEL_TC_BEEVT_CLEAR (2 << 28)
19897 +#define ATMEL_TC_BEEVT_TOGGLE (3 << 28)
19898 +#define ATMEL_TC_BSWTRG (3 << 30) /* software trigger changes TIOB */
19899 +#define ATMEL_TC_BSWTRG_NONE (0 << 30)
19900 +#define ATMEL_TC_BSWTRG_SET (1 << 30)
19901 +#define ATMEL_TC_BSWTRG_CLEAR (2 << 30)
19902 +#define ATMEL_TC_BSWTRG_TOGGLE (3 << 30)
19903 +
19904 +#define ATMEL_TC_CV 0x10 /* counter Value */
19905 +#define ATMEL_TC_RA 0x14 /* register A */
19906 +#define ATMEL_TC_RB 0x18 /* register B */
19907 +#define ATMEL_TC_RC 0x1c /* register C */
19908 +
19909 +#define ATMEL_TC_SR 0x20 /* status (read-only) */
19910 +/* Status-only flags */
19911 +#define ATMEL_TC_CLKSTA (1 << 16) /* clock enabled */
19912 +#define ATMEL_TC_MTIOA (1 << 17) /* TIOA mirror */
19913 +#define ATMEL_TC_MTIOB (1 << 18) /* TIOB mirror */
19914 +
19915 +#define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */
19916 +#define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */
19917 +#define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */
19918 +
19919 +/* Status and IRQ flags */
19920 +#define ATMEL_TC_COVFS (1 << 0) /* counter overflow */
19921 +#define ATMEL_TC_LOVRS (1 << 1) /* load overrun */
19922 +#define ATMEL_TC_CPAS (1 << 2) /* RA compare */
19923 +#define ATMEL_TC_CPBS (1 << 3) /* RB compare */
19924 +#define ATMEL_TC_CPCS (1 << 4) /* RC compare */
19925 +#define ATMEL_TC_LDRAS (1 << 5) /* RA loading */
19926 +#define ATMEL_TC_LDRBS (1 << 6) /* RB loading */
19927 +#define ATMEL_TC_ETRGS (1 << 7) /* external trigger */
19928 +
19929 +#endif
19930 diff -urN linux-2.6.24.3/include/linux/usb/atmel_usba_udc.h avr32-2.6/include/linux/usb/atmel_usba_udc.h
19931 --- linux-2.6.24.3/include/linux/usb/atmel_usba_udc.h 1970-01-01 01:00:00.000000000 +0100
19932 +++ avr32-2.6/include/linux/usb/atmel_usba_udc.h 2008-04-23 20:12:47.000000000 +0200
19933 @@ -0,0 +1,22 @@
19934 +/*
19935 + * Platform data definitions for Atmel USBA gadget driver.
19936 + */
19937 +#ifndef __LINUX_USB_USBA_H
19938 +#define __LINUX_USB_USBA_H
19939 +
19940 +struct usba_ep_data {
19941 + char *name;
19942 + int index;
19943 + int fifo_size;
19944 + int nr_banks;
19945 + int can_dma;
19946 + int can_isoc;
19947 +};
19948 +
19949 +struct usba_platform_data {
19950 + int vbus_pin;
19951 + int num_ep;
19952 + struct usba_ep_data ep[0];
19953 +};
19954 +
19955 +#endif /* __LINUX_USB_USBA_H */
19956 diff -urN linux-2.6.24.3/include/video/atmel_lcdc.h avr32-2.6/include/video/atmel_lcdc.h
19957 --- linux-2.6.24.3/include/video/atmel_lcdc.h 2008-02-26 01:20:20.000000000 +0100
19958 +++ avr32-2.6/include/video/atmel_lcdc.h 2008-04-23 19:33:52.000000000 +0200
19959 @@ -22,7 +22,7 @@
19960 #ifndef __ATMEL_LCDC_H__
19961 #define __ATMEL_LCDC_H__
19962
19963 - /* LCD Controller info data structure */
19964 + /* LCD Controller info data structure, stored in device platform_data */
19965 struct atmel_lcdfb_info {
19966 spinlock_t lock;
19967 struct fb_info *info;
19968 @@ -33,7 +33,14 @@
19969 struct platform_device *pdev;
19970 struct clk *bus_clk;
19971 struct clk *lcdc_clk;
19972 - unsigned int default_bpp;
19973 +
19974 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
19975 + struct backlight_device *backlight;
19976 + u8 bl_power;
19977 +#endif
19978 + bool lcdcon_is_backlight;
19979 +
19980 + u8 default_bpp;
19981 unsigned int default_lcdcon2;
19982 unsigned int default_dmacon;
19983 void (*atmel_lcdfb_power_control)(int on);
19984 @@ -115,20 +122,20 @@
19985 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
19986
19987 #define ATMEL_LCDC_TIM1 0x0808
19988 -#define ATMEL_LCDC_VFP (0xff << 0)
19989 +#define ATMEL_LCDC_VFP (0xffU << 0)
19990 #define ATMEL_LCDC_VBP_OFFSET 8
19991 -#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
19992 +#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
19993 #define ATMEL_LCDC_VPW_OFFSET 16
19994 -#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
19995 +#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
19996 #define ATMEL_LCDC_VHDLY_OFFSET 24
19997 -#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
19998 +#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
19999
20000 #define ATMEL_LCDC_TIM2 0x080c
20001 -#define ATMEL_LCDC_HBP (0xff << 0)
20002 +#define ATMEL_LCDC_HBP (0xffU << 0)
20003 #define ATMEL_LCDC_HPW_OFFSET 8
20004 -#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
20005 +#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
20006 #define ATMEL_LCDC_HFP_OFFSET 21
20007 -#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
20008 +#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
20009
20010 #define ATMEL_LCDC_LCDFRMCFG 0x0810
20011 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
20012 diff -urN linux-2.6.24.3/init/do_mounts.c avr32-2.6/init/do_mounts.c
20013 --- linux-2.6.24.3/init/do_mounts.c 2008-02-26 01:20:20.000000000 +0100
20014 +++ avr32-2.6/init/do_mounts.c 2008-04-23 20:12:47.000000000 +0200
20015 @@ -219,8 +219,14 @@
20016
20017 static int __init rootwait_setup(char *str)
20018 {
20019 - if (*str)
20020 + if (*str && *str != '=')
20021 return 0;
20022 +
20023 + if (*str)
20024 + printk(KERN_WARNING
20025 + "WARNING: \"rootwait=1\" is deprecated, "
20026 + "use \"rootwait\" instead.\n");
20027 +
20028 root_wait = 1;
20029 return 1;
20030 }
20031 diff -urN linux-2.6.24.3/kernel/ptrace.c avr32-2.6/kernel/ptrace.c
20032 --- linux-2.6.24.3/kernel/ptrace.c 2008-02-26 01:20:20.000000000 +0100
20033 +++ avr32-2.6/kernel/ptrace.c 2008-04-23 20:12:47.000000000 +0200
20034 @@ -470,6 +470,8 @@
20035 lock_kernel();
20036 if (request == PTRACE_TRACEME) {
20037 ret = ptrace_traceme();
20038 + if (!ret)
20039 + arch_ptrace_attach(current);
20040 goto out;
20041 }
20042
20043 diff -urN linux-2.6.24.3/localversion-atmel avr32-2.6/localversion-atmel
20044 --- linux-2.6.24.3/localversion-atmel 1970-01-01 01:00:00.000000000 +0100
20045 +++ avr32-2.6/localversion-atmel 2008-04-23 20:12:47.000000000 +0200
20046 @@ -0,0 +1 @@
20047 +.atmel.3
20048 diff -urN linux-2.6.24.3/MAINTAINERS avr32-2.6/MAINTAINERS
20049 --- linux-2.6.24.3/MAINTAINERS 2008-02-26 01:20:20.000000000 +0100
20050 +++ avr32-2.6/MAINTAINERS 2008-04-23 20:12:35.000000000 +0200
20051 @@ -671,6 +671,12 @@
20052 W: http://www.at91.com/
20053 S: Maintained
20054
20055 +ATMEL AT91 / AT32 SERIAL DRIVER
20056 +P: Haavard Skinnemoen
20057 +M: hskinnemoen@atmel.com
20058 +L: linux-kernel@vger.kernel.org
20059 +S: Supported
20060 +
20061 ATMEL LCDFB DRIVER
20062 P: Nicolas Ferre
20063 M: nicolas.ferre@atmel.com
20064 diff -urN linux-2.6.24.3/sound/avr32/ac97c.c avr32-2.6/sound/avr32/ac97c.c
20065 --- linux-2.6.24.3/sound/avr32/ac97c.c 1970-01-01 01:00:00.000000000 +0100
20066 +++ avr32-2.6/sound/avr32/ac97c.c 2008-04-23 19:33:54.000000000 +0200
20067 @@ -0,0 +1,914 @@
20068 +/*
20069 + * Driver for the Atmel AC97 controller
20070 + *
20071 + * Copyright (C) 2005-2007 Atmel Corporation
20072 + *
20073 + * This program is free software; you can redistribute it and/or modify it
20074 + * under the terms of the GNU General Public License version 2 as published by
20075 + * the Free Software Foundation.
20076 + */
20077 +#include <linux/clk.h>
20078 +#include <linux/delay.h>
20079 +#include <linux/dma-mapping.h>
20080 +#include <linux/init.h>
20081 +#include <linux/interrupt.h>
20082 +#include <linux/module.h>
20083 +#include <linux/platform_device.h>
20084 +#include <linux/mutex.h>
20085 +#include <linux/io.h>
20086 +
20087 +#include <sound/driver.h>
20088 +#include <sound/core.h>
20089 +#include <sound/initval.h>
20090 +#include <sound/pcm.h>
20091 +#include <sound/pcm_params.h>
20092 +#include <sound/ac97_codec.h>
20093 +#include <sound/memalloc.h>
20094 +
20095 +#include <asm/dma-controller.h>
20096 +
20097 +#include "ac97c.h"
20098 +
20099 +/* Serialize access to opened */
20100 +static DEFINE_MUTEX(opened_mutex);
20101 +
20102 +struct atmel_ac97_dma_info {
20103 + struct dma_request_cyclic req_tx;
20104 + struct dma_request_cyclic req_rx;
20105 + unsigned short rx_periph_id;
20106 + unsigned short tx_periph_id;
20107 +};
20108 +
20109 +struct atmel_ac97 {
20110 + /* Serialize access to opened */
20111 + spinlock_t lock;
20112 + void __iomem *regs;
20113 + struct snd_pcm_substream *playback_substream;
20114 + struct snd_pcm_substream *capture_substream;
20115 + struct snd_card *card;
20116 + struct snd_pcm *pcm;
20117 + struct snd_ac97 *ac97;
20118 + struct snd_ac97_bus *ac97_bus;
20119 + int opened;
20120 + int period;
20121 + u64 cur_format;
20122 + unsigned int cur_rate;
20123 + struct clk *mck;
20124 + struct platform_device *pdev;
20125 + struct atmel_ac97_dma_info dma;
20126 +};
20127 +
20128 +#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
20129 +
20130 +#define ac97c_writel(chip, reg, val) \
20131 + __raw_writel((val), (chip)->regs + AC97C_##reg)
20132 +#define ac97c_readl(chip, reg) \
20133 + __raw_readl((chip)->regs + AC97C_##reg)
20134 +
20135 +/*
20136 + * PCM part
20137 + */
20138 +static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
20139 + .info = (SNDRV_PCM_INFO_INTERLEAVED
20140 + | SNDRV_PCM_INFO_MMAP
20141 + | SNDRV_PCM_INFO_MMAP_VALID
20142 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
20143 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
20144 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
20145 + | SNDRV_PCM_FMTBIT_S16_LE),
20146 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
20147 + .rate_min = 4000,
20148 + .rate_max = 48000,
20149 + .channels_min = 1,
20150 + .channels_max = 6,
20151 + .buffer_bytes_max = 64*1024,
20152 + .period_bytes_min = 512,
20153 + .period_bytes_max = 4095,
20154 + .periods_min = 8,
20155 + .periods_max = 1024,
20156 +};
20157 +
20158 +static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
20159 + .info = (SNDRV_PCM_INFO_INTERLEAVED
20160 + | SNDRV_PCM_INFO_MMAP
20161 + | SNDRV_PCM_INFO_MMAP_VALID
20162 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
20163 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
20164 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
20165 + | SNDRV_PCM_FMTBIT_S16_LE),
20166 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
20167 + .rate_min = 4000,
20168 + .rate_max = 48000,
20169 + .channels_min = 1,
20170 + .channels_max = 2,
20171 + .buffer_bytes_max = 64*1024,
20172 + .period_bytes_min = 512,
20173 + .period_bytes_max = 4095,
20174 + .periods_min = 8,
20175 + .periods_max = 1024,
20176 +};
20177 +
20178 +/*
20179 + * PCM functions
20180 + */
20181 +static int
20182 +snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
20183 +{
20184 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20185 + struct snd_pcm_runtime *runtime = substream->runtime;
20186 +
20187 + mutex_lock(&opened_mutex);
20188 + chip->opened++;
20189 + runtime->hw = snd_atmel_ac97_playback_hw;
20190 + if (chip->cur_rate) {
20191 + runtime->hw.rate_min = chip->cur_rate;
20192 + runtime->hw.rate_max = chip->cur_rate;
20193 + }
20194 + if (chip->cur_format)
20195 + runtime->hw.formats = (1ULL << chip->cur_format);
20196 + mutex_unlock(&opened_mutex);
20197 + chip->playback_substream = substream;
20198 + chip->period = 0;
20199 + return 0;
20200 +}
20201 +
20202 +static int
20203 +snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
20204 +{
20205 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20206 + struct snd_pcm_runtime *runtime = substream->runtime;
20207 +
20208 + mutex_lock(&opened_mutex);
20209 + chip->opened++;
20210 + runtime->hw = snd_atmel_ac97_capture_hw;
20211 + if (chip->cur_rate) {
20212 + runtime->hw.rate_min = chip->cur_rate;
20213 + runtime->hw.rate_max = chip->cur_rate;
20214 + }
20215 + if (chip->cur_format)
20216 + runtime->hw.formats = (1ULL << chip->cur_format);
20217 + mutex_unlock(&opened_mutex);
20218 + chip->capture_substream = substream;
20219 + chip->period = 0;
20220 + return 0;
20221 +}
20222 +
20223 +static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
20224 +{
20225 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20226 + mutex_lock(&opened_mutex);
20227 + chip->opened--;
20228 + if (!chip->opened) {
20229 + chip->cur_rate = 0;
20230 + chip->cur_format = 0;
20231 + }
20232 + mutex_unlock(&opened_mutex);
20233 + return 0;
20234 +}
20235 +
20236 +static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
20237 +{
20238 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20239 + mutex_lock(&opened_mutex);
20240 + chip->opened--;
20241 + if (!chip->opened) {
20242 + chip->cur_rate = 0;
20243 + chip->cur_format = 0;
20244 + }
20245 + mutex_unlock(&opened_mutex);
20246 + return 0;
20247 +}
20248 +
20249 +static int
20250 +snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
20251 + struct snd_pcm_hw_params *hw_params)
20252 +{
20253 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20254 + int err;
20255 +
20256 + err = snd_pcm_lib_malloc_pages(substream,
20257 + params_buffer_bytes(hw_params));
20258 + if (err < 0)
20259 + return err;
20260 +
20261 + /* Set restrictions to params */
20262 + mutex_lock(&opened_mutex);
20263 + chip->cur_rate = params_rate(hw_params);
20264 + chip->cur_format = params_format(hw_params);
20265 + mutex_unlock(&opened_mutex);
20266 +
20267 + return 0;
20268 +}
20269 +
20270 +static int
20271 +snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
20272 + struct snd_pcm_hw_params *hw_params)
20273 +{
20274 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20275 + int err;
20276 +
20277 + err = snd_pcm_lib_malloc_pages(substream,
20278 + params_buffer_bytes(hw_params));
20279 + if (err < 0)
20280 + return err;
20281 +
20282 + /* Set restrictions to params */
20283 + mutex_lock(&opened_mutex);
20284 + chip->cur_rate = params_rate(hw_params);
20285 + chip->cur_format = params_format(hw_params);
20286 + mutex_unlock(&opened_mutex);
20287 +
20288 + return 0;
20289 +}
20290 +
20291 +static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
20292 +{
20293 + return snd_pcm_lib_free_pages(substream);
20294 +}
20295 +
20296 +static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
20297 +{
20298 +
20299 + return snd_pcm_lib_free_pages(substream);
20300 +}
20301 +
20302 +static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
20303 +{
20304 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20305 + struct platform_device *pdev = chip->pdev;
20306 + struct snd_pcm_runtime *runtime = substream->runtime;
20307 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20308 + unsigned long word = 0;
20309 + unsigned long buffer_size = 0;
20310 +
20311 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20312 + block_size * 2, DMA_TO_DEVICE);
20313 +
20314 + /* Assign slots to channels */
20315 + switch (substream->runtime->channels) {
20316 + case 1:
20317 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20318 + break;
20319 + case 2:
20320 + /* Assign Left and Right slot to Channel A */
20321 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20322 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20323 + break;
20324 + default:
20325 + /* TODO: support more than two channels */
20326 + return -EINVAL;
20327 + break;
20328 + }
20329 + ac97c_writel(chip, OCA, word);
20330 +
20331 + /* Configure sample format and size */
20332 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20333 +
20334 + switch (runtime->format) {
20335 + case SNDRV_PCM_FORMAT_S16_LE:
20336 + word |= AC97C_CMR_CEM_LITTLE;
20337 + break;
20338 + case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
20339 + default:
20340 + word &= ~AC97C_CMR_CEM_LITTLE;
20341 + break;
20342 + }
20343 +
20344 + ac97c_writel(chip, CAMR, word);
20345 +
20346 + /* Set variable rate if needed */
20347 + if (runtime->rate != 48000) {
20348 + word = ac97c_readl(chip, MR);
20349 + word |= AC97C_MR_VRA;
20350 + ac97c_writel(chip, MR, word);
20351 + } else {
20352 + /* Clear Variable Rate Bit */
20353 + word = ac97c_readl(chip, MR);
20354 + word &= ~AC97C_MR_VRA;
20355 + ac97c_writel(chip, MR, word);
20356 + }
20357 +
20358 + /* Set rate */
20359 + snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
20360 +
20361 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20362 + runtime->periods;
20363 +
20364 + chip->dma.req_tx.buffer_size = buffer_size;
20365 + chip->dma.req_tx.periods = runtime->periods;
20366 +
20367 + BUG_ON(chip->dma.req_tx.buffer_size !=
20368 + (chip->dma.req_tx.periods *
20369 + frames_to_bytes(runtime, runtime->period_size)));
20370 +
20371 + chip->dma.req_tx.buffer_start = runtime->dma_addr;
20372 + chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
20373 + chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
20374 + chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
20375 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20376 + chip->dma.req_tx.dev_id = chip;
20377 +
20378 + return 0;
20379 +}
20380 +
20381 +static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
20382 +{
20383 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20384 + struct platform_device *pdev = chip->pdev;
20385 + struct snd_pcm_runtime *runtime = substream->runtime;
20386 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20387 + unsigned long word = 0;
20388 + unsigned long buffer_size = 0;
20389 +
20390 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20391 + block_size * 2, DMA_FROM_DEVICE);
20392 +
20393 + /* Assign slots to channels */
20394 + switch (substream->runtime->channels) {
20395 + case 1:
20396 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20397 + break;
20398 + case 2:
20399 + /* Assign Left and Right slot to Channel A */
20400 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20401 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20402 + break;
20403 + default:
20404 + /* TODO: support more than two channels */
20405 + return -EINVAL;
20406 + break;
20407 + }
20408 + ac97c_writel(chip, ICA, word);
20409 +
20410 + /* Configure sample format and size */
20411 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20412 +
20413 + switch (runtime->format) {
20414 + case SNDRV_PCM_FORMAT_S16_LE:
20415 + word |= AC97C_CMR_CEM_LITTLE;
20416 + break;
20417 + case SNDRV_PCM_FORMAT_S16_BE:
20418 + default:
20419 + word &= ~(AC97C_CMR_CEM_LITTLE);
20420 + break;
20421 + }
20422 +
20423 + ac97c_writel(chip, CAMR, word);
20424 +
20425 + /* Set variable rate if needed */
20426 + if (runtime->rate != 48000) {
20427 + word = ac97c_readl(chip, MR);
20428 + word |= AC97C_MR_VRA;
20429 + ac97c_writel(chip, MR, word);
20430 + } else {
20431 + /* Clear Variable Rate Bit */
20432 + word = ac97c_readl(chip, MR);
20433 + word &= ~(AC97C_MR_VRA);
20434 + ac97c_writel(chip, MR, word);
20435 + }
20436 +
20437 + /* Set rate */
20438 + snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
20439 +
20440 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20441 + runtime->periods;
20442 +
20443 + chip->dma.req_rx.buffer_size = buffer_size;
20444 + chip->dma.req_rx.periods = runtime->periods;
20445 +
20446 + BUG_ON(chip->dma.req_rx.buffer_size !=
20447 + (chip->dma.req_rx.periods *
20448 + frames_to_bytes(runtime, runtime->period_size)));
20449 +
20450 + chip->dma.req_rx.buffer_start = runtime->dma_addr;
20451 + chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
20452 + chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
20453 + chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
20454 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20455 + chip->dma.req_rx.dev_id = chip;
20456 +
20457 + return 0;
20458 +}
20459 +
20460 + static int
20461 +snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
20462 +{
20463 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20464 + unsigned long camr;
20465 + int flags, err = 0;
20466 +
20467 + spin_lock_irqsave(&chip->lock, flags);
20468 + camr = ac97c_readl(chip, CAMR);
20469 +
20470 + switch (cmd) {
20471 + case SNDRV_PCM_TRIGGER_START:
20472 + err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
20473 + &chip->dma.req_tx);
20474 + dma_start_request(chip->dma.req_tx.req.dmac,
20475 + chip->dma.req_tx.req.channel);
20476 + camr |= AC97C_CMR_CENA;
20477 + break;
20478 + case SNDRV_PCM_TRIGGER_STOP:
20479 + err = dma_stop_request(chip->dma.req_tx.req.dmac,
20480 + chip->dma.req_tx.req.channel);
20481 + if (chip->opened <= 1)
20482 + camr &= ~AC97C_CMR_CENA;
20483 + break;
20484 + default:
20485 + err = -EINVAL;
20486 + break;
20487 + }
20488 +
20489 + ac97c_writel(chip, CAMR, camr);
20490 +
20491 + spin_unlock_irqrestore(&chip->lock, flags);
20492 + return err;
20493 +}
20494 +
20495 + static int
20496 +snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
20497 +{
20498 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20499 + unsigned long camr;
20500 + int flags, err = 0;
20501 +
20502 + spin_lock_irqsave(&chip->lock, flags);
20503 + camr = ac97c_readl(chip, CAMR);
20504 +
20505 + switch (cmd) {
20506 + case SNDRV_PCM_TRIGGER_START:
20507 + err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
20508 + &chip->dma.req_rx);
20509 + dma_start_request(chip->dma.req_rx.req.dmac,
20510 + chip->dma.req_rx.req.channel);
20511 + camr |= AC97C_CMR_CENA;
20512 + break;
20513 + case SNDRV_PCM_TRIGGER_STOP:
20514 + err = dma_stop_request(chip->dma.req_rx.req.dmac,
20515 + chip->dma.req_rx.req.channel);
20516 + mutex_lock(&opened_mutex);
20517 + if (chip->opened <= 1)
20518 + camr &= ~AC97C_CMR_CENA;
20519 + mutex_unlock(&opened_mutex);
20520 + break;
20521 + default:
20522 + err = -EINVAL;
20523 + break;
20524 + }
20525 +
20526 + ac97c_writel(chip, CAMR, camr);
20527 +
20528 + spin_unlock_irqrestore(&chip->lock, flags);
20529 + return err;
20530 +}
20531 +
20532 + static snd_pcm_uframes_t
20533 +snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
20534 +{
20535 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20536 + struct snd_pcm_runtime *runtime = substream->runtime;
20537 + snd_pcm_uframes_t pos;
20538 + unsigned long bytes;
20539 +
20540 + bytes = (dma_get_current_pos
20541 + (chip->dma.req_tx.req.dmac,
20542 + chip->dma.req_tx.req.channel) - runtime->dma_addr);
20543 + pos = bytes_to_frames(runtime, bytes);
20544 + if (pos >= runtime->buffer_size)
20545 + pos -= runtime->buffer_size;
20546 +
20547 + return pos;
20548 +}
20549 +
20550 + static snd_pcm_uframes_t
20551 +snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
20552 +{
20553 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20554 + struct snd_pcm_runtime *runtime = substream->runtime;
20555 + snd_pcm_uframes_t pos;
20556 + unsigned long bytes;
20557 +
20558 + bytes = (dma_get_current_pos
20559 + (chip->dma.req_rx.req.dmac,
20560 + chip->dma.req_rx.req.channel)
20561 + - runtime->dma_addr);
20562 + pos = bytes_to_frames(runtime, bytes);
20563 + if (pos >= runtime->buffer_size)
20564 + pos -= runtime->buffer_size;
20565 +
20566 +
20567 + return pos;
20568 +}
20569 +
20570 +static struct snd_pcm_ops atmel_ac97_playback_ops = {
20571 + .open = snd_atmel_ac97_playback_open,
20572 + .close = snd_atmel_ac97_playback_close,
20573 + .ioctl = snd_pcm_lib_ioctl,
20574 + .hw_params = snd_atmel_ac97_playback_hw_params,
20575 + .hw_free = snd_atmel_ac97_playback_hw_free,
20576 + .prepare = snd_atmel_ac97_playback_prepare,
20577 + .trigger = snd_atmel_ac97_playback_trigger,
20578 + .pointer = snd_atmel_ac97_playback_pointer,
20579 +};
20580 +
20581 +static struct snd_pcm_ops atmel_ac97_capture_ops = {
20582 + .open = snd_atmel_ac97_capture_open,
20583 + .close = snd_atmel_ac97_capture_close,
20584 + .ioctl = snd_pcm_lib_ioctl,
20585 + .hw_params = snd_atmel_ac97_capture_hw_params,
20586 + .hw_free = snd_atmel_ac97_capture_hw_free,
20587 + .prepare = snd_atmel_ac97_capture_prepare,
20588 + .trigger = snd_atmel_ac97_capture_trigger,
20589 + .pointer = snd_atmel_ac97_capture_pointer,
20590 +};
20591 +
20592 +static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
20593 + /* Playback */
20594 + {
20595 + .exclusive = 1,
20596 + .r = { {
20597 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20598 + | (1 << AC97_SLOT_PCM_RIGHT)
20599 + | (1 << AC97_SLOT_PCM_CENTER)
20600 + | (1 << AC97_SLOT_PCM_SLEFT)
20601 + | (1 << AC97_SLOT_PCM_SRIGHT)
20602 + | (1 << AC97_SLOT_LFE)),
20603 + } }
20604 + },
20605 + /* PCM in */
20606 + {
20607 + .stream = 1,
20608 + .exclusive = 1,
20609 + .r = { {
20610 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20611 + | (1 << AC97_SLOT_PCM_RIGHT)),
20612 + } }
20613 + },
20614 + /* Mic in */
20615 + {
20616 + .stream = 1,
20617 + .exclusive = 1,
20618 + .r = { {
20619 + .slots = (1<<AC97_SLOT_MIC),
20620 + } }
20621 + },
20622 +};
20623 +
20624 +static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
20625 +{
20626 + struct snd_pcm *pcm;
20627 + int err;
20628 +
20629 + err = snd_ac97_pcm_assign(chip->ac97_bus,
20630 + ARRAY_SIZE(atmel_ac97_pcm_defs),
20631 + atmel_ac97_pcm_defs);
20632 + if (err)
20633 + return err;
20634 +
20635 + err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
20636 + if (err)
20637 + return err;
20638 +
20639 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
20640 + &atmel_ac97_playback_ops);
20641 +
20642 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
20643 + &atmel_ac97_capture_ops);
20644 +
20645 + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
20646 + &chip->pdev->dev,
20647 + 128 * 1024, 128 * 1024);
20648 +
20649 + pcm->private_data = chip;
20650 + pcm->info_flags = 0;
20651 + strcpy(pcm->name, "Atmel-AC97");
20652 + chip->pcm = pcm;
20653 +
20654 + return 0;
20655 +}
20656 +
20657 +/*
20658 + * Mixer part.
20659 + */
20660 +static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
20661 +{
20662 + int err;
20663 + struct snd_ac97_template template;
20664 +
20665 + memset(&template, 0, sizeof(template));
20666 + template.private_data = chip;
20667 + err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
20668 +
20669 + return err;
20670 +}
20671 +
20672 +static void atmel_ac97_error(struct dma_request *_req)
20673 +{
20674 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20675 + struct atmel_ac97 *chip = req->dev_id;
20676 +
20677 + dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
20678 + req->req.channel);
20679 +}
20680 +
20681 +static void atmel_ac97_block_complete(struct dma_request *_req)
20682 +{
20683 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20684 + struct atmel_ac97 *chip = req->dev_id;
20685 + if (req->periph_id == chip->dma.tx_periph_id)
20686 + snd_pcm_period_elapsed(chip->playback_substream);
20687 + else
20688 + snd_pcm_period_elapsed(chip->capture_substream);
20689 +}
20690 +
20691 +/*
20692 + * Codec part.
20693 + */
20694 +static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
20695 + unsigned short val)
20696 +{
20697 + struct atmel_ac97 *chip = get_chip(ac97);
20698 + unsigned long word;
20699 + int timeout = 40;
20700 +
20701 + word = (reg & 0x7f) << 16 | val;
20702 +
20703 + do {
20704 + if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
20705 + ac97c_writel(chip, COTHR, word);
20706 + return;
20707 + }
20708 + udelay(1);
20709 + } while (--timeout);
20710 +
20711 + dev_dbg(&chip->pdev->dev, "codec write timeout\n");
20712 +}
20713 +
20714 +static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
20715 + unsigned short reg)
20716 +{
20717 + struct atmel_ac97 *chip = get_chip(ac97);
20718 + unsigned long word;
20719 + int timeout = 40;
20720 + int write = 10;
20721 +
20722 + word = (0x80 | (reg & 0x7f)) << 16;
20723 +
20724 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
20725 + ac97c_readl(chip, CORHR);
20726 +
20727 +retry_write:
20728 + timeout = 40;
20729 +
20730 + do {
20731 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
20732 + ac97c_writel(chip, COTHR, word);
20733 + goto read_reg;
20734 + }
20735 + mdelay(10);
20736 + } while (--timeout);
20737 +
20738 + if (!--write)
20739 + goto timed_out;
20740 + goto retry_write;
20741 +
20742 +read_reg:
20743 + do {
20744 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
20745 + unsigned short val = ac97c_readl(chip, CORHR);
20746 + return val;
20747 + }
20748 + mdelay(10);
20749 + } while (--timeout);
20750 +
20751 + if (!--write)
20752 + goto timed_out;
20753 + goto retry_write;
20754 +
20755 +timed_out:
20756 + dev_dbg(&chip->pdev->dev, "codec read timeout\n");
20757 + return 0xffff;
20758 +}
20759 +
20760 +static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
20761 +{
20762 + ac97c_writel(chip, MR, AC97C_MR_WRST);
20763 + mdelay(1);
20764 + ac97c_writel(chip, MR, AC97C_MR_ENA);
20765 +}
20766 +
20767 +static void snd_atmel_ac97_destroy(struct snd_card *card)
20768 +{
20769 + struct atmel_ac97 *chip = get_chip(card);
20770 +
20771 + if (chip->regs)
20772 + iounmap(chip->regs);
20773 +
20774 + if (chip->mck) {
20775 + clk_disable(chip->mck);
20776 + clk_put(chip->mck);
20777 + }
20778 +
20779 + if (chip->dma.req_tx.req.dmac) {
20780 + dma_release_channel(chip->dma.req_tx.req.dmac,
20781 + chip->dma.req_tx.req.channel);
20782 + }
20783 + if (chip->dma.req_rx.req.dmac) {
20784 + dma_release_channel(chip->dma.req_rx.req.dmac,
20785 + chip->dma.req_rx.req.channel);
20786 + }
20787 +}
20788 +
20789 +static int __devinit snd_atmel_ac97_create(struct snd_card *card,
20790 + struct platform_device *pdev)
20791 +{
20792 + static struct snd_ac97_bus_ops ops = {
20793 + .write = snd_atmel_ac97_write,
20794 + .read = snd_atmel_ac97_read,
20795 + };
20796 + struct atmel_ac97 *chip = get_chip(card);
20797 + struct resource *regs;
20798 + struct clk *mck;
20799 + int err;
20800 +
20801 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
20802 + if (!regs)
20803 + return -ENXIO;
20804 +
20805 + mck = clk_get(&pdev->dev, "pclk");
20806 + if (IS_ERR(mck))
20807 + return PTR_ERR(mck);
20808 + clk_enable(mck);
20809 + chip->mck = mck;
20810 +
20811 + card->private_free = snd_atmel_ac97_destroy;
20812 +
20813 + spin_lock_init(&chip->lock);
20814 + chip->card = card;
20815 + chip->pdev = pdev;
20816 +
20817 + chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
20818 + if (!chip->regs)
20819 + return -ENOMEM;
20820 +
20821 + snd_card_set_dev(card, &pdev->dev);
20822 +
20823 + err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
20824 +
20825 + return err;
20826 +}
20827 +
20828 +static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
20829 +{
20830 + static int dev;
20831 + struct snd_card *card;
20832 + struct atmel_ac97 *chip;
20833 + int err;
20834 + int ch;
20835 +
20836 + mutex_init(&opened_mutex);
20837 +
20838 + err = -ENOMEM;
20839 + card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
20840 + THIS_MODULE, sizeof(struct atmel_ac97));
20841 + if (!card)
20842 + goto out;
20843 + chip = get_chip(card);
20844 +
20845 + err = snd_atmel_ac97_create(card, pdev);
20846 + if (err)
20847 + goto out_free_card;
20848 +
20849 + snd_atmel_ac97_reset(chip);
20850 +
20851 + err = snd_atmel_ac97_mixer_new(chip);
20852 + if (err)
20853 + goto out_free_card;
20854 +
20855 + err = snd_atmel_ac97_pcm_new(chip);
20856 + if (err)
20857 + goto out_free_card;
20858 +
20859 + /* TODO: Get this information from the platform device */
20860 + chip->dma.req_tx.req.dmac = find_dma_controller(0);
20861 + if (!chip->dma.req_tx.req.dmac) {
20862 + dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
20863 + err = -ENODEV;
20864 + goto out_free_card;
20865 + }
20866 + chip->dma.req_rx.req.dmac = find_dma_controller(0);
20867 + if (!chip->dma.req_rx.req.dmac) {
20868 + dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
20869 + err = -ENODEV;
20870 + goto out_free_card;
20871 + }
20872 +
20873 + chip->dma.rx_periph_id = 3;
20874 + chip->dma.tx_periph_id = 4;
20875 +
20876 + ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
20877 + if (ch < 0) {
20878 + dev_dbg(&chip->pdev->dev,
20879 + "could not allocate TX DMA channel\n");
20880 + err = ch;
20881 + goto out_free_card;
20882 + }
20883 + chip->dma.req_tx.req.channel = ch;
20884 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20885 + chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
20886 + chip->dma.req_tx.req.error = atmel_ac97_error;
20887 +
20888 + ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
20889 + if (ch < 0) {
20890 + dev_dbg(&chip->pdev->dev,
20891 + "could not allocate RX DMA channel\n");
20892 + err = ch;
20893 + goto out_free_card;
20894 + }
20895 + chip->dma.req_rx.req.channel = ch;
20896 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20897 + chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
20898 + chip->dma.req_rx.req.error = atmel_ac97_error;
20899 +
20900 + strcpy(card->driver, "atmel_ac97c");
20901 + strcpy(card->shortname, "atmel_ac97c");
20902 + sprintf(card->longname, "Atmel AVR32 AC97 controller");
20903 +
20904 + err = snd_card_register(card);
20905 + if (err)
20906 + goto out_free_card;
20907 +
20908 + platform_set_drvdata(pdev, card);
20909 + dev++;
20910 +
20911 + dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
20912 + chip->regs);
20913 +
20914 + return 0;
20915 +
20916 +out_free_card:
20917 + snd_card_free(card);
20918 +out:
20919 + return err;
20920 +}
20921 +
20922 +#ifdef CONFIG_PM
20923 + static int
20924 +snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
20925 +{
20926 + struct snd_card *card = platform_get_drvdata(pdev);
20927 + struct atmel_ac97 *chip = card->private_data;
20928 +
20929 + clk_disable(chip->mck);
20930 +
20931 + return 0;
20932 +}
20933 +
20934 +static int snd_atmel_ac97_resume(struct platform_device *pdev)
20935 +{
20936 + struct snd_card *card = dev_get_drvdata(pdev);
20937 + struct atmel_ac97 *chip = card->private_data;
20938 +
20939 + clk_enable(chip->mck);
20940 +
20941 + return 0;
20942 +}
20943 +#else
20944 +#define snd_atmel_ac97_suspend NULL
20945 +#define snd_atmel_ac97_resume NULL
20946 +#endif
20947 +
20948 +static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
20949 +{
20950 + struct snd_card *card = platform_get_drvdata(pdev);
20951 +
20952 + snd_card_free(card);
20953 + platform_set_drvdata(pdev, NULL);
20954 + return 0;
20955 +}
20956 +
20957 +static struct platform_driver atmel_ac97_driver = {
20958 + .remove = __devexit_p(snd_atmel_ac97_remove),
20959 + .driver = {
20960 + .name = "atmel_ac97c",
20961 + },
20962 + .suspend = snd_atmel_ac97_suspend,
20963 + .resume = snd_atmel_ac97_resume,
20964 +};
20965 +
20966 +static int __init atmel_ac97_init(void)
20967 +{
20968 + return platform_driver_probe(&atmel_ac97_driver,
20969 + snd_atmel_ac97_probe);
20970 +}
20971 +module_init(atmel_ac97_init);
20972 +
20973 +static void __exit atmel_ac97_exit(void)
20974 +{
20975 + platform_driver_unregister(&atmel_ac97_driver);
20976 +}
20977 +module_exit(atmel_ac97_exit);
20978 +
20979 +MODULE_LICENSE("GPL");
20980 +MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
20981 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
20982 diff -urN linux-2.6.24.3/sound/avr32/ac97c.h avr32-2.6/sound/avr32/ac97c.h
20983 --- linux-2.6.24.3/sound/avr32/ac97c.h 1970-01-01 01:00:00.000000000 +0100
20984 +++ avr32-2.6/sound/avr32/ac97c.h 2008-04-23 19:33:54.000000000 +0200
20985 @@ -0,0 +1,71 @@
20986 +/*
20987 + * Register definitions for the Atmel AC97 Controller.
20988 + *
20989 + * Copyright (C) 2005-2006 Atmel Corporation
20990 + *
20991 + * This program is free software; you can redistribute it and/or modify
20992 + * it under the terms of the GNU General Public License version 2 as
20993 + * published by the Free Software Foundation.
20994 + */
20995 +#ifndef __SOUND_AVR32_AC97C_H
20996 +#define __SOUND_AVR32_AC97C_H
20997 +
20998 +#define AC97C_MR 0x08
20999 +#define AC97C_ICA 0x10
21000 +#define AC97C_OCA 0x14
21001 +#define AC97C_CARHR 0x20
21002 +#define AC97C_CATHR 0x24
21003 +#define AC97C_CASR 0x28
21004 +#define AC97C_CAMR 0x2c
21005 +#define AC97C_CBRHR 0x30
21006 +#define AC97C_CBTHR 0x34
21007 +#define AC97C_CBSR 0x38
21008 +#define AC97C_CBMR 0x3c
21009 +#define AC97C_CORHR 0x40
21010 +#define AC97C_COTHR 0x44
21011 +#define AC97C_COSR 0x48
21012 +#define AC97C_COMR 0x4c
21013 +#define AC97C_SR 0x50
21014 +#define AC97C_IER 0x54
21015 +#define AC97C_IDR 0x58
21016 +#define AC97C_IMR 0x5c
21017 +#define AC97C_VERSION 0xfc
21018 +
21019 +#define AC97C_CATPR PDC_TPR
21020 +#define AC97C_CATCR PDC_TCR
21021 +#define AC97C_CATNPR PDC_TNPR
21022 +#define AC97C_CATNCR PDC_TNCR
21023 +#define AC97C_CARPR PDC_RPR
21024 +#define AC97C_CARCR PDC_RCR
21025 +#define AC97C_CARNPR PDC_RNPR
21026 +#define AC97C_CARNCR PDC_RNCR
21027 +#define AC97C_PTCR PDC_PTCR
21028 +
21029 +#define AC97C_MR_ENA (1 << 0)
21030 +#define AC97C_MR_WRST (1 << 1)
21031 +#define AC97C_MR_VRA (1 << 2)
21032 +
21033 +#define AC97C_CSR_TXRDY (1 << 0)
21034 +#define AC97C_CSR_UNRUN (1 << 2)
21035 +#define AC97C_CSR_RXRDY (1 << 4)
21036 +#define AC97C_CSR_ENDTX (1 << 10)
21037 +#define AC97C_CSR_ENDRX (1 << 14)
21038 +
21039 +#define AC97C_CMR_SIZE_20 (0 << 16)
21040 +#define AC97C_CMR_SIZE_18 (1 << 16)
21041 +#define AC97C_CMR_SIZE_16 (2 << 16)
21042 +#define AC97C_CMR_SIZE_10 (3 << 16)
21043 +#define AC97C_CMR_CEM_LITTLE (1 << 18)
21044 +#define AC97C_CMR_CEM_BIG (0 << 18)
21045 +#define AC97C_CMR_CENA (1 << 21)
21046 +#define AC97C_CMR_PDCEN (1 << 22)
21047 +
21048 +#define AC97C_SR_CAEVT (1 << 3)
21049 +
21050 +#define AC97C_CH_ASSIGN(slot, channel) \
21051 + (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
21052 +#define AC97C_CHANNEL_NONE 0x0
21053 +#define AC97C_CHANNEL_A 0x1
21054 +#define AC97C_CHANNEL_B 0x2
21055 +
21056 +#endif /* __SOUND_AVR32_AC97C_H */
21057 diff -urN linux-2.6.24.3/sound/avr32/Kconfig avr32-2.6/sound/avr32/Kconfig
21058 --- linux-2.6.24.3/sound/avr32/Kconfig 1970-01-01 01:00:00.000000000 +0100
21059 +++ avr32-2.6/sound/avr32/Kconfig 2008-04-23 19:33:54.000000000 +0200
21060 @@ -0,0 +1,11 @@
21061 +menu "AVR32 devices"
21062 + depends on SND != n && AVR32
21063 +
21064 +config SND_ATMEL_AC97
21065 + tristate "Atmel AC97 Controller Driver"
21066 + select SND_PCM
21067 + select SND_AC97_CODEC
21068 + help
21069 + ALSA sound driver for the Atmel AC97 controller.
21070 +
21071 +endmenu
21072 diff -urN linux-2.6.24.3/sound/avr32/Makefile avr32-2.6/sound/avr32/Makefile
21073 --- linux-2.6.24.3/sound/avr32/Makefile 1970-01-01 01:00:00.000000000 +0100
21074 +++ avr32-2.6/sound/avr32/Makefile 2008-04-23 19:33:54.000000000 +0200
21075 @@ -0,0 +1,3 @@
21076 +snd-atmel-ac97-objs := ac97c.o
21077 +
21078 +obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o
21079 diff -urN linux-2.6.24.3/sound/Kconfig avr32-2.6/sound/Kconfig
21080 --- linux-2.6.24.3/sound/Kconfig 2008-02-26 01:20:20.000000000 +0100
21081 +++ avr32-2.6/sound/Kconfig 2008-04-23 19:33:54.000000000 +0200
21082 @@ -63,6 +63,8 @@
21083
21084 source "sound/arm/Kconfig"
21085
21086 +source "sound/avr32/Kconfig"
21087 +
21088 if SPI
21089 source "sound/spi/Kconfig"
21090 endif
21091 diff -urN linux-2.6.24.3/sound/Makefile avr32-2.6/sound/Makefile
21092 --- linux-2.6.24.3/sound/Makefile 2008-02-26 01:20:20.000000000 +0100
21093 +++ avr32-2.6/sound/Makefile 2008-04-23 19:33:54.000000000 +0200
21094 @@ -6,7 +6,7 @@
21095 obj-$(CONFIG_SOUND_PRIME) += oss/
21096 obj-$(CONFIG_DMASOUND) += oss/
21097 obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
21098 - sparc/ spi/ parisc/ pcmcia/ mips/ soc/
21099 + sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
21100 obj-$(CONFIG_SND_AOA) += aoa/
21101
21102 # This one must be compilable even if sound is configured out
21103 diff -urN linux-2.6.24.3/sound/oss/at32_abdac.c avr32-2.6/sound/oss/at32_abdac.c
21104 --- linux-2.6.24.3/sound/oss/at32_abdac.c 1970-01-01 01:00:00.000000000 +0100
21105 +++ avr32-2.6/sound/oss/at32_abdac.c 2008-04-23 19:33:54.000000000 +0200
21106 @@ -0,0 +1,722 @@
21107 +/*
21108 + * OSS Sound Driver for the Atmel AT32 on-chip DAC.
21109 + *
21110 + * Copyright (C) 2006 Atmel Corporation
21111 + *
21112 + * This program is free software; you can redistribute it and/or modify
21113 + * it under the terms of the GNU General Public License version 2 as
21114 + * published by the Free Software Foundation.
21115 + */
21116 +#include <linux/clk.h>
21117 +#include <linux/dma-mapping.h>
21118 +#include <linux/fs.h>
21119 +#include <linux/init.h>
21120 +#include <linux/interrupt.h>
21121 +#include <linux/kernel.h>
21122 +#include <linux/module.h>
21123 +#include <linux/platform_device.h>
21124 +#include <linux/sound.h>
21125 +#include <linux/soundcard.h>
21126 +
21127 +#include <asm/byteorder.h>
21128 +#include <asm/dma-controller.h>
21129 +#include <asm/io.h>
21130 +#include <asm/uaccess.h>
21131 +
21132 +/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
21133 +#include <linux/byteorder/swabb.h>
21134 +
21135 +#include "at32_abdac.h"
21136 +
21137 +#define DMA_BUFFER_SIZE 32768
21138 +#define DMA_PERIOD_SHIFT 10
21139 +#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
21140 +#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
21141 +
21142 +struct sound_settings {
21143 + unsigned int format;
21144 + unsigned int channels;
21145 + unsigned int sample_rate;
21146 + /* log2(bytes per sample) */
21147 + unsigned int input_order;
21148 +};
21149 +
21150 +struct at32_dac {
21151 + spinlock_t lock;
21152 + void __iomem *regs;
21153 +
21154 + /* head and tail refer to number of words */
21155 + struct {
21156 + u32 *buf;
21157 + int head;
21158 + int tail;
21159 + } dma;
21160 +
21161 + struct semaphore sem;
21162 + wait_queue_head_t write_wait;
21163 +
21164 + /*
21165 + * Read at most ucount bytes from ubuf, translate to 2-channel
21166 + * signed 16-bit big endian format and write to the DMA buffer
21167 + * as long as there is room left. Return the number of bytes
21168 + * successfully copied from ubuf, or -EFAULT if the first
21169 + * sample from ubuf couldn't be read. This function is not
21170 + * called unless there is room for at least one sample (4
21171 + * bytes) in the DMA buffer.
21172 + */
21173 + ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
21174 + size_t ucount);
21175 +
21176 + struct sound_settings dsp_settings;
21177 + struct dma_request_cyclic req;
21178 +
21179 + struct clk *mck;
21180 + struct clk *sample_clk;
21181 + struct platform_device *pdev;
21182 + int busy;
21183 + int playing;
21184 + int dev_dsp;
21185 +};
21186 +static struct at32_dac *the_dac;
21187 +
21188 +static inline unsigned int abdac_get_head(struct at32_dac *dac)
21189 +{
21190 + return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
21191 +}
21192 +
21193 +static inline unsigned int abdac_get_tail(struct at32_dac *dac)
21194 +{
21195 + return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
21196 +}
21197 +
21198 +static inline unsigned int abdac_dma_space(struct at32_dac *dac)
21199 +{
21200 + unsigned int space;
21201 +
21202 + space = ((dac->dma.tail - dac->dma.head - 1)
21203 + & ((DMA_BUFFER_SIZE / 4) - 1));
21204 + return space;
21205 +}
21206 +
21207 +static void abdac_update_dma_tail(struct at32_dac *dac)
21208 +{
21209 + dma_addr_t dma_addr;
21210 + unsigned int new_tail;
21211 +
21212 + if (dac->playing) {
21213 + dma_addr = dma_get_current_pos(dac->req.req.dmac,
21214 + dac->req.req.channel);
21215 + new_tail = (dma_addr - dac->req.buffer_start) / 4;
21216 + if (new_tail >= dac->dma.head
21217 + && (dac->dma.tail < dac->dma.head
21218 + || dac->dma.tail > new_tail))
21219 + dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
21220 + dac->dma.tail = new_tail;
21221 + dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
21222 + dma_addr, dac->req.buffer_start, dac->dma.tail);
21223 + }
21224 +}
21225 +
21226 +static int abdac_start(struct at32_dac *dac)
21227 +{
21228 + int ret;
21229 +
21230 + if (dac->playing)
21231 + return 0;
21232 +
21233 + memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
21234 +
21235 + clk_enable(dac->sample_clk);
21236 +
21237 + ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
21238 + if (ret)
21239 + goto out_stop_clock;
21240 +
21241 + dev_dbg(&dac->pdev->dev, "starting DMA...\n");
21242 + ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
21243 + if (ret)
21244 + goto out_stop_request;
21245 +
21246 + dac_writel(dac, CTRL, DAC_BIT(EN));
21247 + dac->playing = 1;
21248 +
21249 + return 0;
21250 +
21251 +out_stop_request:
21252 + dma_stop_request(dac->req.req.dmac,
21253 + dac->req.req.channel);
21254 +out_stop_clock:
21255 + clk_disable(dac->sample_clk);
21256 + return ret;
21257 +}
21258 +
21259 +static int abdac_stop(struct at32_dac *dac)
21260 +{
21261 + if (dac->playing) {
21262 + dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
21263 + dac_writel(dac, DATA, 0);
21264 + dac_writel(dac, CTRL, 0);
21265 + dac->playing = 0;
21266 + clk_disable(dac->sample_clk);
21267 + }
21268 +
21269 + return 0;
21270 +}
21271 +
21272 +static int abdac_dma_prepare(struct at32_dac *dac)
21273 +{
21274 + dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21275 + &dac->req.buffer_start, GFP_KERNEL);
21276 + if (!dac->dma.buf)
21277 + return -ENOMEM;
21278 +
21279 + dac->dma.head = dac->dma.tail = 0;
21280 + dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
21281 + dac->req.buffer_size = DMA_BUFFER_SIZE;
21282 +
21283 + return 0;
21284 +}
21285 +
21286 +static void abdac_dma_cleanup(struct at32_dac *dac)
21287 +{
21288 + if (dac->dma.buf)
21289 + dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21290 + dac->dma.buf, dac->req.buffer_start);
21291 + dac->dma.buf = NULL;
21292 +}
21293 +
21294 +static void abdac_dma_block_complete(struct dma_request *req)
21295 +{
21296 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21297 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21298 +
21299 + wake_up(&dac->write_wait);
21300 +}
21301 +
21302 +static void abdac_dma_error(struct dma_request *req)
21303 +{
21304 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21305 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21306 +
21307 + dev_err(&dac->pdev->dev, "DMA error\n");
21308 +}
21309 +
21310 +static irqreturn_t abdac_interrupt(int irq, void *dev_id)
21311 +{
21312 + struct at32_dac *dac = dev_id;
21313 + u32 status;
21314 +
21315 + status = dac_readl(dac, INT_STATUS);
21316 + if (status & DAC_BIT(UNDERRUN)) {
21317 + dev_err(&dac->pdev->dev, "Underrun detected!\n");
21318 + dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
21319 + } else {
21320 + dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
21321 + status);
21322 + dac_writel(dac, INT_CLR, status);
21323 + }
21324 +
21325 + return IRQ_HANDLED;
21326 +}
21327 +
21328 +static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
21329 + size_t ucount)
21330 +{
21331 + ssize_t ret;
21332 +
21333 + if (dac->dsp_settings.channels == 2) {
21334 + const u32 __user *up = (const u32 __user *)ubuf;
21335 + u32 sample;
21336 +
21337 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21338 + if (!abdac_dma_space(dac))
21339 + break;
21340 +
21341 + if (unlikely(__get_user(sample, up++))) {
21342 + if (ret == 0)
21343 + ret = -EFAULT;
21344 + break;
21345 + }
21346 + dac->dma.buf[abdac_get_head(dac)] = sample;
21347 + dac->dma.head++;
21348 + }
21349 + } else {
21350 + const u16 __user *up = (const u16 __user *)ubuf;
21351 + u16 sample;
21352 +
21353 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21354 + if (!abdac_dma_space(dac))
21355 + break;
21356 +
21357 + if (unlikely(__get_user(sample, up++))) {
21358 + if (ret == 0)
21359 + ret = -EFAULT;
21360 + break;
21361 + }
21362 + dac->dma.buf[abdac_get_head(dac)]
21363 + = (sample << 16) | sample;
21364 + dac->dma.head++;
21365 + }
21366 + }
21367 +
21368 + return ret;
21369 +}
21370 +
21371 +static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
21372 + size_t ucount)
21373 +{
21374 + ssize_t ret;
21375 +
21376 + if (dac->dsp_settings.channels == 2) {
21377 + const u32 __user *up = (const u32 __user *)ubuf;
21378 + u32 sample;
21379 +
21380 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21381 + if (!abdac_dma_space(dac))
21382 + break;
21383 +
21384 + if (unlikely(__get_user(sample, up++))) {
21385 + if (ret == 0)
21386 + ret = -EFAULT;
21387 + break;
21388 + }
21389 + /* Swap bytes in each halfword */
21390 + dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
21391 + dac->dma.head++;
21392 + }
21393 + } else {
21394 + const u16 __user *up = (const u16 __user *)ubuf;
21395 + u16 sample;
21396 +
21397 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21398 + if (!abdac_dma_space(dac))
21399 + break;
21400 +
21401 + if (unlikely(__get_user(sample, up++))) {
21402 + if (ret == 0)
21403 + ret = -EFAULT;
21404 + break;
21405 + }
21406 + sample = swab16(sample);
21407 + dac->dma.buf[abdac_get_head(dac)]
21408 + = (sample << 16) | sample;
21409 + dac->dma.head++;
21410 + }
21411 + }
21412 +
21413 + return ret;
21414 +}
21415 +
21416 +static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
21417 + const char __user *buffer,
21418 + size_t count)
21419 +{
21420 + /* At least one buffer must be available at this point */
21421 + dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
21422 +
21423 + return dac->trans(dac, buffer, count);
21424 +}
21425 +
21426 +static int abdac_set_format(struct at32_dac *dac, int format)
21427 +{
21428 + unsigned int order;
21429 +
21430 + switch (format) {
21431 + case AFMT_S16_BE:
21432 + order = 1;
21433 + dac->trans = trans_s16be;
21434 + break;
21435 + case AFMT_S16_LE:
21436 + order = 1;
21437 + dac->trans = trans_s16le;
21438 + break;
21439 + default:
21440 + dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
21441 + return -EINVAL;
21442 + }
21443 +
21444 + if (dac->dsp_settings.channels == 2)
21445 + order++;
21446 +
21447 + dac->dsp_settings.input_order = order;
21448 + dac->dsp_settings.format = format;
21449 + return 0;
21450 +}
21451 +
21452 +static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
21453 +{
21454 + unsigned long new_rate;
21455 + int ret;
21456 +
21457 + ret = clk_set_rate(dac->sample_clk, 256 * rate);
21458 + if (ret < 0)
21459 + return ret;
21460 +
21461 + /* TODO: mplayer seems to have a problem with this */
21462 +#if 0
21463 + new_rate = clk_get_rate(dac->sample_clk);
21464 + dac->dsp_settings.sample_rate = new_rate / 256;
21465 +#else
21466 + dac->dsp_settings.sample_rate = rate;
21467 +#endif
21468 +
21469 + return 0;
21470 +}
21471 +
21472 +static ssize_t abdac_dsp_write(struct file *file,
21473 + const char __user *buffer,
21474 + size_t count, loff_t *ppos)
21475 +{
21476 + struct at32_dac *dac = file->private_data;
21477 + DECLARE_WAITQUEUE(wait, current);
21478 + unsigned int avail;
21479 + ssize_t copied;
21480 + ssize_t ret;
21481 +
21482 + /* Avoid address space checking in the translation functions */
21483 + if (!access_ok(buffer, count, VERIFY_READ))
21484 + return -EFAULT;
21485 +
21486 + down(&dac->sem);
21487 +
21488 + if (!dac->dma.buf) {
21489 + ret = abdac_dma_prepare(dac);
21490 + if (ret)
21491 + goto out;
21492 + }
21493 +
21494 + add_wait_queue(&dac->write_wait, &wait);
21495 + ret = 0;
21496 + while (count > 0) {
21497 + do {
21498 + abdac_update_dma_tail(dac);
21499 + avail = abdac_dma_space(dac);
21500 + set_current_state(TASK_INTERRUPTIBLE);
21501 + if (avail >= DMA_WRITE_THRESHOLD)
21502 + break;
21503 +
21504 + if (file->f_flags & O_NONBLOCK) {
21505 + if (!ret)
21506 + ret = -EAGAIN;
21507 + goto out;
21508 + }
21509 +
21510 + pr_debug("Going to wait (avail = %u, count = %zu)\n",
21511 + avail, count);
21512 +
21513 + up(&dac->sem);
21514 + schedule();
21515 + if (signal_pending(current)) {
21516 + if (!ret)
21517 + ret = -ERESTARTSYS;
21518 + goto out_nosem;
21519 + }
21520 + down(&dac->sem);
21521 + } while (1);
21522 +
21523 + copied = abdac_dma_translate_from_user(dac, buffer, count);
21524 + if (copied < 0) {
21525 + if (!ret)
21526 + ret = -EFAULT;
21527 + goto out;
21528 + }
21529 +
21530 + abdac_start(dac);
21531 +
21532 + count -= copied;
21533 + ret += copied;
21534 + }
21535 +
21536 +out:
21537 + up(&dac->sem);
21538 +out_nosem:
21539 + remove_wait_queue(&dac->write_wait, &wait);
21540 + set_current_state(TASK_RUNNING);
21541 + return ret;
21542 +}
21543 +
21544 +static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
21545 + unsigned int cmd, unsigned long arg)
21546 +{
21547 + struct at32_dac *dac = file->private_data;
21548 + int __user *up = (int __user *)arg;
21549 + struct audio_buf_info abinfo;
21550 + int val, ret;
21551 +
21552 + switch (cmd) {
21553 + case OSS_GETVERSION:
21554 + return put_user(SOUND_VERSION, up);
21555 +
21556 + case SNDCTL_DSP_SPEED:
21557 + if (get_user(val, up))
21558 + return -EFAULT;
21559 + if (val >= 0) {
21560 + abdac_stop(dac);
21561 + ret = abdac_set_sample_rate(dac, val);
21562 + if (ret)
21563 + return ret;
21564 + }
21565 + return put_user(dac->dsp_settings.sample_rate, up);
21566 +
21567 + case SNDCTL_DSP_STEREO:
21568 + if (get_user(val, up))
21569 + return -EFAULT;
21570 + abdac_stop(dac);
21571 + if (val && dac->dsp_settings.channels == 1)
21572 + dac->dsp_settings.input_order++;
21573 + else if (!val && dac->dsp_settings.channels != 1)
21574 + dac->dsp_settings.input_order--;
21575 + dac->dsp_settings.channels = val ? 2 : 1;
21576 + return 0;
21577 +
21578 + case SNDCTL_DSP_CHANNELS:
21579 + if (get_user(val, up))
21580 + return -EFAULT;
21581 +
21582 + if (val) {
21583 + if (val < 0 || val > 2)
21584 + return -EINVAL;
21585 +
21586 + abdac_stop(dac);
21587 + dac->dsp_settings.input_order
21588 + += val - dac->dsp_settings.channels;
21589 + dac->dsp_settings.channels = val;
21590 + }
21591 + return put_user(val, (int *)arg);
21592 +
21593 + case SNDCTL_DSP_GETFMTS:
21594 + return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
21595 +
21596 + case SNDCTL_DSP_SETFMT:
21597 + if (get_user(val, up))
21598 + return -EFAULT;
21599 +
21600 + if (val == AFMT_QUERY) {
21601 + val = dac->dsp_settings.format;
21602 + } else {
21603 + ret = abdac_set_format(dac, val);
21604 + if (ret)
21605 + return ret;
21606 + }
21607 + return put_user(val, up);
21608 +
21609 + case SNDCTL_DSP_GETOSPACE:
21610 + abdac_update_dma_tail(dac);
21611 + abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
21612 + * (DMA_PERIOD_SIZE / 4));
21613 + abinfo.bytes = (abdac_dma_space(dac)
21614 + << dac->dsp_settings.input_order);
21615 + abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
21616 + >> (DMA_PERIOD_SHIFT
21617 + + dac->dsp_settings.input_order));
21618 + abinfo.fragments = ((abinfo.bytes
21619 + >> dac->dsp_settings.input_order)
21620 + / (DMA_PERIOD_SIZE / 4));
21621 + pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n",
21622 + abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
21623 + abinfo.bytes);
21624 + return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
21625 +
21626 + default:
21627 + dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
21628 + return -EINVAL;
21629 + }
21630 +}
21631 +
21632 +static int abdac_dsp_open(struct inode *inode, struct file *file)
21633 +{
21634 + struct at32_dac *dac = the_dac;
21635 + int ret;
21636 +
21637 + if (file->f_mode & FMODE_READ)
21638 + return -ENXIO;
21639 +
21640 + down(&dac->sem);
21641 + ret = -EBUSY;
21642 + if (dac->busy)
21643 + goto out;
21644 +
21645 + dac->dma.head = dac->dma.tail = 0;
21646 +
21647 + /* FIXME: What are the correct defaults? */
21648 + dac->dsp_settings.channels = 2;
21649 + abdac_set_format(dac, AFMT_S16_BE);
21650 + ret = abdac_set_sample_rate(dac, 8000);
21651 + if (ret)
21652 + goto out;
21653 +
21654 + file->private_data = dac;
21655 + dac->busy = 1;
21656 +
21657 + ret = 0;
21658 +
21659 +out:
21660 + up(&dac->sem);
21661 + return ret;
21662 +}
21663 +
21664 +static int abdac_dsp_release(struct inode *inode, struct file *file)
21665 +{
21666 + struct at32_dac *dac = file->private_data;
21667 +
21668 + down(&dac->sem);
21669 +
21670 + abdac_stop(dac);
21671 + abdac_dma_cleanup(dac);
21672 + dac->busy = 0;
21673 +
21674 + up(&dac->sem);
21675 +
21676 + return 0;
21677 +}
21678 +
21679 +static struct file_operations abdac_dsp_fops = {
21680 + .owner = THIS_MODULE,
21681 + .llseek = no_llseek,
21682 + .write = abdac_dsp_write,
21683 + .ioctl = abdac_dsp_ioctl,
21684 + .open = abdac_dsp_open,
21685 + .release = abdac_dsp_release,
21686 +};
21687 +
21688 +static int __init abdac_probe(struct platform_device *pdev)
21689 +{
21690 + struct at32_dac *dac;
21691 + struct resource *regs;
21692 + struct clk *mck;
21693 + struct clk *sample_clk;
21694 + int irq;
21695 + int ret;
21696 +
21697 + if (the_dac)
21698 + return -EBUSY;
21699 +
21700 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
21701 + if (!regs)
21702 + return -ENXIO;
21703 + irq = platform_get_irq(pdev, 0);
21704 + if (irq < 0)
21705 + return irq;
21706 +
21707 + mck = clk_get(&pdev->dev, "pclk");
21708 + if (IS_ERR(mck))
21709 + return PTR_ERR(mck);
21710 + sample_clk = clk_get(&pdev->dev, "sample_clk");
21711 + if (IS_ERR(sample_clk)) {
21712 + ret = PTR_ERR(sample_clk);
21713 + goto out_put_mck;
21714 + }
21715 + clk_enable(mck);
21716 +
21717 + ret = -ENOMEM;
21718 + dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
21719 + if (!dac)
21720 + goto out_disable_clk;
21721 +
21722 + spin_lock_init(&dac->lock);
21723 + init_MUTEX(&dac->sem);
21724 + init_waitqueue_head(&dac->write_wait);
21725 + dac->pdev = pdev;
21726 + dac->mck = mck;
21727 + dac->sample_clk = sample_clk;
21728 +
21729 + dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
21730 + if (!dac->regs)
21731 + goto out_free_dac;
21732 +
21733 + ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
21734 + if (ret)
21735 + goto out_unmap_regs;
21736 +
21737 + /* FIXME */
21738 + dac->req.req.dmac = find_dma_controller(0);
21739 + if (!dac->req.req.dmac)
21740 + goto out_free_irq;
21741 +
21742 + ret = dma_alloc_channel(dac->req.req.dmac);
21743 + if (ret < 0)
21744 + goto out_free_irq;
21745 +
21746 + dac->req.req.channel = ret;
21747 + dac->req.req.block_complete = abdac_dma_block_complete;
21748 + dac->req.req.error = abdac_dma_error;
21749 + dac->req.data_reg = regs->start + DAC_DATA;
21750 + dac->req.periph_id = 2; /* FIXME */
21751 + dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
21752 + dac->req.width = DMA_WIDTH_32BIT;
21753 +
21754 + /* Make sure the DAC is silent and disabled */
21755 + dac_writel(dac, DATA, 0);
21756 + dac_writel(dac, CTRL, 0);
21757 +
21758 + ret = register_sound_dsp(&abdac_dsp_fops, -1);
21759 + if (ret < 0)
21760 + goto out_free_dma;
21761 + dac->dev_dsp = ret;
21762 +
21763 + /* TODO: Register mixer */
21764 +
21765 + the_dac = dac;
21766 + platform_set_drvdata(pdev, dac);
21767 +
21768 + return 0;
21769 +
21770 +out_free_dma:
21771 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21772 +out_free_irq:
21773 + free_irq(irq, dac);
21774 +out_unmap_regs:
21775 + iounmap(dac->regs);
21776 +out_free_dac:
21777 + kfree(dac);
21778 +out_disable_clk:
21779 + clk_disable(mck);
21780 + clk_put(sample_clk);
21781 +out_put_mck:
21782 + clk_put(mck);
21783 + return ret;
21784 +}
21785 +
21786 +static int __exit abdac_remove(struct platform_device *pdev)
21787 +{
21788 + struct at32_dac *dac;
21789 +
21790 + dac = platform_get_drvdata(pdev);
21791 + if (dac) {
21792 + unregister_sound_dsp(dac->dev_dsp);
21793 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21794 + free_irq(platform_get_irq(pdev, 0), dac);
21795 + iounmap(dac->regs);
21796 + clk_disable(dac->mck);
21797 + clk_put(dac->sample_clk);
21798 + clk_put(dac->mck);
21799 + kfree(dac);
21800 + platform_set_drvdata(pdev, NULL);
21801 + the_dac = NULL;
21802 + }
21803 +
21804 + return 0;
21805 +}
21806 +
21807 +static struct platform_driver abdac_driver = {
21808 + .remove = __exit_p(abdac_remove),
21809 + .driver = {
21810 + .name = "abdac",
21811 + },
21812 +};
21813 +
21814 +static int __init abdac_init(void)
21815 +{
21816 + return platform_driver_probe(&abdac_driver, abdac_probe);
21817 +}
21818 +module_init(abdac_init);
21819 +
21820 +static void __exit abdac_exit(void)
21821 +{
21822 + platform_driver_unregister(&abdac_driver);
21823 +}
21824 +module_exit(abdac_exit);
21825 +
21826 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
21827 +MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
21828 +MODULE_LICENSE("GPL");
21829 diff -urN linux-2.6.24.3/sound/oss/at32_abdac.h avr32-2.6/sound/oss/at32_abdac.h
21830 --- linux-2.6.24.3/sound/oss/at32_abdac.h 1970-01-01 01:00:00.000000000 +0100
21831 +++ avr32-2.6/sound/oss/at32_abdac.h 2008-04-23 19:33:54.000000000 +0200
21832 @@ -0,0 +1,59 @@
21833 +/*
21834 + * Register definitions for the Atmel AT32 on-chip DAC.
21835 + *
21836 + * Copyright (C) 2006 Atmel Corporation
21837 + *
21838 + * This program is free software; you can redistribute it and/or modify
21839 + * it under the terms of the GNU General Public License version 2 as
21840 + * published by the Free Software Foundation.
21841 + */
21842 +#ifndef __SOUND_OSS_AT32_ABDAC_H__
21843 +#define __SOUND_OSS_AT32_ABDAC_H__
21844 +
21845 +/* DAC register offsets */
21846 +#define DAC_DATA 0x0000
21847 +#define DAC_CTRL 0x0008
21848 +#define DAC_INT_MASK 0x000c
21849 +#define DAC_INT_EN 0x0010
21850 +#define DAC_INT_DIS 0x0014
21851 +#define DAC_INT_CLR 0x0018
21852 +#define DAC_INT_STATUS 0x001c
21853 +#define DAC_PDC_DATA 0x0020
21854 +
21855 +/* Bitfields in CTRL */
21856 +#define DAC_SWAP_OFFSET 30
21857 +#define DAC_SWAP_SIZE 1
21858 +#define DAC_EN_OFFSET 31
21859 +#define DAC_EN_SIZE 1
21860 +
21861 +/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
21862 +#define DAC_UNDERRUN_OFFSET 28
21863 +#define DAC_UNDERRUN_SIZE 1
21864 +#define DAC_TX_READY_OFFSET 29
21865 +#define DAC_TX_READY_SIZE 1
21866 +#define DAC_TX_BUFFER_EMPTY_OFFSET 30
21867 +#define DAC_TX_BUFFER_EMPTY_SIZE 1
21868 +#define DAC_CHANNEL_TX_END_OFFSET 31
21869 +#define DAC_CHANNEL_TX_END_SIZE 1
21870 +
21871 +/* Bit manipulation macros */
21872 +#define DAC_BIT(name) \
21873 + (1 << DAC_##name##_OFFSET)
21874 +#define DAC_BF(name, value) \
21875 + (((value) & ((1 << DAC_##name##_SIZE) - 1)) \
21876 + << DAC_##name##_OFFSET)
21877 +#define DAC_BFEXT(name, value) \
21878 + (((value) >> DAC_##name##_OFFSET) \
21879 + & ((1 << DAC_##name##_SIZE) - 1))
21880 +#define DAC_BFINS(name, value, old) \
21881 + (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
21882 + << DAC_##name##_OFFSET)) \
21883 + | DAC_BF(name,value))
21884 +
21885 +/* Register access macros */
21886 +#define dac_readl(port, reg) \
21887 + __raw_readl((port)->regs + DAC_##reg)
21888 +#define dac_writel(port, reg, value) \
21889 + __raw_writel((value), (port)->regs + DAC_##reg)
21890 +
21891 +#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
21892 diff -urN linux-2.6.24.3/sound/oss/Kconfig avr32-2.6/sound/oss/Kconfig
21893 --- linux-2.6.24.3/sound/oss/Kconfig 2008-02-26 01:20:20.000000000 +0100
21894 +++ avr32-2.6/sound/oss/Kconfig 2008-04-23 19:33:54.000000000 +0200
21895 @@ -654,3 +654,7 @@
21896 int "DAC channel"
21897 default "1"
21898 depends on SOUND_SH_DAC_AUDIO
21899 +
21900 +config SOUND_AT32_ABDAC
21901 + tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
21902 + depends on SOUND_PRIME && AVR32
21903 diff -urN linux-2.6.24.3/sound/oss/Makefile avr32-2.6/sound/oss/Makefile
21904 --- linux-2.6.24.3/sound/oss/Makefile 2008-02-26 01:20:20.000000000 +0100
21905 +++ avr32-2.6/sound/oss/Makefile 2008-04-23 20:12:49.000000000 +0200
21906 @@ -10,6 +10,7 @@
21907
21908 # Please leave it as is, cause the link order is significant !
21909
21910 +obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o
21911 obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o
21912 obj-$(CONFIG_SOUND_HAL2) += hal2.o
21913 obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o
21914 diff -urN linux-2.6.24.3/sound/spi/at73c213.c avr32-2.6/sound/spi/at73c213.c
21915 --- linux-2.6.24.3/sound/spi/at73c213.c 2008-02-26 01:20:20.000000000 +0100
21916 +++ avr32-2.6/sound/spi/at73c213.c 2008-04-23 20:12:51.000000000 +0200
21917 @@ -744,7 +744,7 @@
21918 /*
21919 * Device functions
21920 */
21921 -static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21922 +static int __devinit snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21923 {
21924 /*
21925 * Continuous clock output.
21926 @@ -774,7 +774,7 @@
21927 return 0;
21928 }
21929
21930 -static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
21931 +static int __devinit snd_at73c213_chip_init(struct snd_at73c213 *chip)
21932 {
21933 int retval;
21934 unsigned char dac_ctrl = 0;
21935 @@ -939,7 +939,7 @@
21936 return retval;
21937 }
21938
21939 -static int snd_at73c213_probe(struct spi_device *spi)
21940 +static int __devinit snd_at73c213_probe(struct spi_device *spi)
21941 {
21942 struct snd_card *card;
21943 struct snd_at73c213 *chip;
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