ath79: add missing clock name strings in SoC dtsi
[openwrt/staging/hauke.git] / target / linux / ath79 / dts / qca956x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ath79.dtsi"
4
5 / {
6 compatible = "qca,qca9560";
7
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 chosen {
12 bootargs = "console=ttyS0,115200n8";
13 };
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 device_type = "cpu";
21 compatible = "mips,mips74Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
23 reg = <0>;
24 };
25 };
26
27 extosc: ref {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-output-names = "ref";
31 clock-frequency = <25000000>;
32 };
33
34 ahb {
35 apb {
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9560-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x100>;
40
41 #qca,ddr-wb-channel-cells = <1>;
42 };
43
44 uart: uart@18020000 {
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
47
48 interrupts = <3>;
49
50 clocks = <&pll ATH79_CLK_REF>;
51 clock-names = "uart";
52
53 reg-io-width = <4>;
54 reg-shift = <2>;
55 no-loopback-test;
56 };
57
58 gpio: gpio@18040000 {
59 compatible = "qca,qca9560-gpio",
60 "qca,ar9340-gpio";
61 reg = <0x18040000 0x28>;
62
63 interrupts = <2>;
64 ngpios = <24>;
65
66 gpio-controller;
67 #gpio-cells = <2>;
68
69 interrupt-controller;
70 #interrupt-cells = <2>;
71 };
72
73 pinmux: pinmux@1804002c {
74 compatible = "pinctrl-single";
75
76 reg = <0x1804002c 0x44>;
77
78 #size-cells = <0>;
79
80 pinctrl-single,bit-per-mux;
81 pinctrl-single,register-width = <32>;
82 pinctrl-single,function-mask = <0x1>;
83 #pinctrl-cells = <2>;
84
85 jtag_disable_pins: pinmux_jtag_disable_pins {
86 pinctrl-single,bits = <0x40 0x2 0x2>;
87 };
88 };
89
90 pll: pll-controller@18050000 {
91 compatible = "qca,qca9560-pll", "syscon";
92 reg = <0x18050000 0x50>;
93
94 #clock-cells = <1>;
95 clock-output-names = "cpu", "ddr", "ahb";
96
97 clocks = <&extosc>;
98 clock-names = "ref";
99 };
100
101 wdt: wdt@18060008 {
102 compatible = "qca,ar7130-wdt";
103 reg = <0x18060008 0x8>;
104
105 interrupts = <4>;
106
107 clocks = <&pll ATH79_CLK_AHB>;
108 clock-names = "wdt";
109 };
110
111 rst: reset-controller@1806001c {
112 compatible = "qca,qca9560-reset",
113 "qca,ar7100-reset";
114 reg = <0x1806001c 0x4>;
115
116 #reset-cells = <1>;
117 interrupt-parent = <&cpuintc>;
118
119 intc3: interrupt-controller {
120 compatible = "qca,ar9340-intc";
121
122 interrupt-parent = <&cpuintc>;
123 interrupts = <3>;
124
125 interrupt-controller;
126 #interrupt-cells = <1>;
127
128 qca,int-status-addr = <0xac>;
129 qca,pending-bits = <0x1f000>, /* pcie rc */
130 <0x1000000>, /* usb1 */
131 <0x10000000>; /* usb2 */
132 };
133 };
134
135 rst2: reset-controller@180600c0 {
136 compatible = "qca,qca9560-reset",
137 "qca,ar7100-reset",
138 "simple-bus";
139 reg = <0x180600c0 0x4>;
140
141 #reset-cells = <1>;
142 };
143 };
144
145 gmac: gmac@18070000 {
146 compatible = "qca,qca9560-gmac";
147 reg = <0x18070000 0x64>;
148 };
149
150 wmac: wmac@18100000 {
151 compatible = "qca,qca9560-wmac";
152 reg = <0x18100000 0x10000>;
153
154 interrupt-parent = <&cpuintc>;
155 interrupts = <2>;
156
157 status = "disabled";
158 };
159
160 pcie: pcie-controller@18250000 {
161 compatible = "qcom,ar7240-pci";
162 #address-cells = <3>;
163 #size-cells = <2>;
164 bus-range = <0x0 0x0>;
165 reg = <0x18250000 0x1000>, /* CRP */
166 <0x18280000 0x100>, /* CTRL */
167 <0x16000000 0x1000>; /* CFG */
168 reg-names = "crp_base", "ctrl_base", "cfg_base";
169 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
170 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
171 interrupt-parent = <&intc3>;
172 interrupts = <0>;
173
174 device_type = "pci";
175
176 resets = <&rst 6>, <&rst 7>;
177 reset-names = "hc", "phy";
178
179 interrupt-controller;
180 #interrupt-cells = <1>;
181
182 interrupt-map-mask = <0 0 0 1>;
183 interrupt-map = <0 0 0 0 &pcie 0>;
184 status = "disabled";
185 };
186
187 usb0: usb@1b000000 {
188 compatible = "generic-ehci";
189 reg = <0x1b000000 0x1d8>;
190
191 interrupt-parent = <&intc3>;
192 interrupts = <1>;
193
194 resets = <&rst 5>;
195 reset-names = "usb-host";
196
197 has-transaction-translator;
198 caps-offset = <0x100>;
199
200 phy-names = "usb-phy0";
201 phys = <&usb_phy0>;
202
203 status = "disabled";
204
205 #address-cells = <1>;
206 #size-cells = <0>;
207 };
208
209 usb1: usb@1b400000 {
210 compatible = "generic-ehci";
211 reg = <0x1b400000 0x1d8>;
212
213 interrupt-parent = <&intc3>;
214 interrupts = <2>;
215
216 resets = <&rst2 5>;
217 reset-names = "usb-host";
218
219 has-transaction-translator;
220 caps-offset = <0x100>;
221
222 phy-names = "usb-phy1";
223 phys = <&usb_phy1>;
224
225 status = "disabled";
226
227 #address-cells = <1>;
228 #size-cells = <0>;
229 };
230
231 spi: spi@1f000000 {
232 compatible = "qca,ar934x-spi";
233 reg = <0x1f000000 0x1c>;
234
235 clocks = <&pll ATH79_CLK_AHB>;
236
237 status = "disabled";
238
239 #address-cells = <1>;
240 #size-cells = <0>;
241 };
242 };
243
244 usb_phy0: usb-phy {
245 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
246
247 reset-names = "usb-phy", "usb-suspend-override";
248 resets = <&rst 4>, <&rst 3>;
249
250 #phy-cells = <0>;
251
252 status = "disabled";
253 };
254
255 usb_phy1: usb-phy {
256 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
257
258 reset-names = "usb-phy", "usb-suspend-override";
259 resets = <&rst2 4>, <&rst2 3>;
260
261 #phy-cells = <0>;
262
263 status = "disabled";
264 };
265 };
266
267 &mdio0 {
268 resets = <&rst 22>;
269 reset-names = "mdio";
270 };
271
272 &eth0 {
273 compatible = "qca,qca9560-eth", "syscon";
274
275 pll-data = <0x03000000 0x00000101 0x00001919>;
276 pll-reg = <0 0x48 0>;
277 pll-handle = <&pll>;
278
279 resets = <&rst 9>;
280 reset-names = "mac";
281 };
282
283 &mdio1 {
284 status = "okay";
285 resets = <&rst 23>;
286 reset-names = "mdio";
287 builtin-switch;
288
289 builtin_switch: switch0@1f {
290 compatible = "qca,ar8229";
291 reg = <0x1f>;
292 resets = <&rst 8>;
293 reset-names = "switch";
294 phy-mode = "gmii";
295 qca,phy4-mii-enable;
296 qca,mib-poll-interval = <500>;
297
298 mdio-bus {
299 #address-cells = <1>;
300 #size-cells = <0>;
301
302 swphy0: ethernet-phy@0 {
303 reg = <0>;
304 phy-mode = "mii";
305 };
306
307 swphy4: ethernet-phy@4 {
308 reg = <4>;
309 phy-mode = "mii";
310 };
311 };
312 };
313 };
314
315 &eth1 {
316 compatible = "qca,qca9560-eth", "syscon";
317
318 phy-mode = "gmii";
319
320 resets = <&rst 13>;
321 reset-names = "mac";
322
323 fixed-link {
324 speed = <1000>;
325 full-duplex;
326 };
327 };