ath79: enable UART in SoC DTSI files
[openwrt/staging/jow.git] / target / linux / ath79 / dts / qca9563_tplink_archer-x6-v2.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 label-mac-device = &eth0;
11 };
12 };
13
14 &pcie {
15 status = "okay";
16 };
17
18 &mdio0 {
19 status = "okay";
20
21 phy-mask = <0>;
22
23 phy0: ethernet-phy@0 {
24 reg = <0>;
25 phy-mode = "sgmii";
26 qca,mib-poll-interval = <500>;
27
28 qca,ar8327-initvals = <
29 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
30 0x7c 0x0000007e /* PORT0_STATUS */
31 >;
32 };
33 };
34
35 &eth0 {
36 status = "okay";
37
38 phy-mode = "sgmii";
39 phy-handle = <&phy0>;
40
41 mtd-mac-address = <&info 0x8>;
42 };
43
44 &wmac {
45 status = "okay";
46
47 mtd-cal-data = <&art 0x1000>;
48 mtd-mac-address = <&info 0x8>;
49 };