target/linux/ath79/dts/ar9330.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9330";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         aliases {
  12                 serial0 = &uart;
  13         };
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "mips,mips24Kc";
  22                         clocks = <&pll ATH79_CLK_CPU>;
  23                         reg = <0>;
  24                 };
  25         };
  26
  27         chosen {
  28                 bootargs = "console=ttyATH0,115200";
  29         };
  30
  31         ahb {
  32                 apb {
  33                         ddr_ctrl: memory-controller@18000000 {
  34                                 compatible = "qca,ar7240-ddr-controller";
  35                                 reg = <0x18000000 0x100>;
  36
  37                                 #qca,ddr-wb-channel-cells = <1>;
  38                         };
  39
  40                         uart: uart@18020000 {
  41                                 compatible = "qca,ar9330-uart";
  42                                 reg = <0x18020000 0x14>;
  43
  44                                 interrupts = <3>;
  45
  46                                 clocks = <&pll ATH79_CLK_REF>;
  47                                 clock-names = "uart";
  48                         };
  49
  50                         gpio: gpio@18040000 {
  51                                 compatible = "qca,ar7100-gpio";
  52                                 reg = <0x18040000 0x34>;
  53                                 interrupts = <2>;
  54
  55                                 ngpios = <30>;
  56
  57                                 gpio-controller;
  58                                 #gpio-cells = <2>;
  59
  60                                 interrupt-controller;
  61                                 #interrupt-cells = <2>;
  62                         };
  63
  64                         pinmux: pinmux@18040028 {
  65                                 compatible = "pinctrl-single";
  66                                 reg = <0x18040028 0x8>;
  67
  68                                 pinctrl-single,bit-per-mux;
  69                                 pinctrl-single,register-width = <32>;
  70                                 pinctrl-single,function-mask = <0x1>;
  71                                 #pinctrl-cells = <2>;
  72
  73                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  74                                         pinctrl-single,bits = <0x0 0x1 0x1>;
  75                                 };
  76
  77                                 switch_led_disable_pins: pinmux_switch_led_disable_pins {
  78                                         pinctrl-single,bits = <0x0 0x0 0xf8>;
  79                                 };
  80                         };
  81
  82                         pll: pll-controller@18050000 {
  83                                 compatible = "qca,ar9330-pll";
  84                                 reg = <0x18050000 0x100>;
  85
  86                                 #clock-cells = <1>;
  87                         };
  88
  89                         wdt: wdt@18060008 {
  90                                 compatible = "qca,ar7130-wdt";
  91                                 reg = <0x18060008 0x8>;
  92
  93                                 interrupts = <4>;
  94
  95                                 clocks = <&pll ATH79_CLK_AHB>;
  96                                 clock-names = "wdt";
  97                         };
  98
  99                         rst: reset-controller@1806001c {
 100                                 compatible = "qca,ar7100-reset";
 101                                 reg = <0x1806001c 0x4>;
 102
 103                                 #reset-cells = <1>;
 104                         };
 105                 };
 106
 107                 usb: usb@1b000000 {
 108                         compatible = "chipidea,usb2";
 109                         reg = <0x1b000000 0x200>;
 110
 111                         interrupts = <3>;
 112                         resets = <&rst 5>;
 113                         reset-names = "usb-host";
 114
 115                         phy-names = "usb-phy";
 116                         phys = <&usb_phy>;
 117
 118                         status = "disabled";
 119                 };
 120
 121                 spi: spi@1f000000 {
 122                         compatible = "qca,ar934x-spi";
 123                         reg = <0x1f000000 0x1c>;
 124
 125                         clocks = <&pll ATH79_CLK_AHB>;
 126
 127                         #address-cells = <1>;
 128                         #size-cells = <0>;
 129
 130                         status = "disabled";
 131                 };
 132
 133                 gmac: gmac@18070000 {
 134                         compatible = "qca,ar9330-gmac";
 135                         reg = <0x18070000 0x4>;
 136                 };
 137
 138                 wmac: wmac@18100000 {
 139                         compatible = "qca,ar9330-wmac";
 140                         reg = <0x18100000 0x20000>;
 141
 142                         interrupts = <2>;
 143
 144                         status = "disabled";
 145                 };
 146         };
 147
 148         usb_phy: usb-phy {
 149                 compatible = "qca,ar7200-usb-phy";
 150
 151                 reset-names = "usb-phy", "usb-suspend-override";
 152                 resets = <&rst 4>, <&rst 3>;
 153
 154                 #phy-cells = <0>;
 155
 156                 status = "disabled";
 157         };
 158 };
 159
 160 &cpuintc {
 161         qca,ddr-wb-channel-interrupts = <2>, <3>;
 162         qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
 163 };
 164
 165 &eth0 {
 166         compatible = "qca,ar9330-eth", "syscon";
 167
 168         pll-data = <0x00110000 0x00001099 0x00991099>;
 169
 170         resets = <&rst 9>;
 171         reset-names = "mac";
 172         phy-handle = <&swphy4>;
 173 };
 174
 175 &mdio1 {
 176         status = "okay";
 177         compatible = "qca,ar9330-mdio";
 178
 179         resets = <&rst 23>;
 180         reset-names = "mdio";
 181         builtin-switch;
 182
 183         builtin_switch: switch0@1f {
 184                 compatible = "qca,ar7240sw";
 185                 reg = <0x1f>;
 186                 resets = <&rst 8>;
 187                 reset-names = "switch";
 188                 qca,mib-poll-interval = <500>;
 189
 190                 mdio-bus {
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193
 194                         swphy4: ethernet-phy@4 {
 195                                 reg = <4>;
 196                                 phy-mode = "mii";
 197                         };
 198                 };
 199         };
 200 };
 201
 202 &eth1 {
 203         compatible = "qca,ar9330-eth", "syscon";
 204
 205         pll-data = <0x00110000 0x00001099 0x00991099>;
 206         phy-mode = "gmii";
 207
 208         resets = <&rst 13>;
 209         reset-names = "mac";
 210
 211         fixed-link {
 212                 speed = <1000>;
 213                 full-duplex;
 214         };
 215 };