ath79: move reference clock node to SoC dtsi
[openwrt/staging/lynxis.git] / target / linux / ath79 / dts / ar9132_tplink_tl-wr1043nd-v1.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include "ar9132.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
10 model = "TP-Link TL-WR1043ND v1";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 label-mac-device = &eth0;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 linux,code = <KEY_RESTART>;
26 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
27 debounce-interval = <60>;
28 };
29
30 qss {
31 label = "qss";
32 linux,code = <KEY_WPS_BUTTON>;
33 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
34 debounce-interval = <60>;
35 };
36 };
37
38 leds {
39 compatible = "gpio-leds";
40
41 usb {
42 label = "green:usb";
43 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
44 trigger-sources = <&hub_port>;
45 linux,default-trigger = "usbport";
46 };
47
48 led_system: system {
49 label = "green:system";
50 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
51 linux,default-trigger = "heartbeat";
52 };
53
54 qss {
55 label = "green:qss";
56 gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
57 };
58
59 wlan {
60 label = "green:wlan";
61 gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
62 linux,default-trigger = "phy0tpt";
63 };
64 };
65
66 rtl8366rb {
67 compatible = "realtek,rtl8366rb";
68 gpio-sda = <&gpio 18 GPIO_ACTIVE_HIGH>;
69 gpio-sck = <&gpio 19 GPIO_ACTIVE_HIGH>;
70
71 resets = <&rst 8>;
72 reset-names = "switch";
73 };
74 };
75
76 &usb {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 status = "okay";
80
81 hub_port: port@1 {
82 reg = <1>;
83 #trigger-source-cells = <0>;
84 };
85 };
86
87 &usb_phy {
88 status = "okay";
89 };
90
91 &spi {
92 status = "okay";
93
94 flash@0 {
95 compatible = "jedec,spi-nor";
96 reg = <0>;
97 spi-max-frequency = <25000000>;
98 m25p,fast-read;
99
100 partitions {
101 compatible = "fixed-partitions";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 uboot: partition@0 {
106 label = "u-boot";
107 reg = <0x000000 0x020000>;
108 read-only;
109 };
110
111 partition@20000 {
112 compatible = "tplink,firmware";
113 label = "firmware";
114 reg = <0x020000 0x7D0000>;
115 };
116
117 art: partition@7F0000 {
118 label = "art";
119 reg = <0x7F0000 0x010000>;
120 read-only;
121 };
122 };
123 };
124 };
125
126 &eth0 {
127 status = "okay";
128
129 phy-mode = "rgmii";
130 nvmem-cells = <&macaddr_uboot_1fc00>;
131 nvmem-cell-names = "mac-address";
132
133 fixed-link {
134 speed = <1000>;
135 full-duplex;
136 };
137 };
138
139 &wmac {
140 status = "okay";
141
142 mtd-cal-data = <&art 0x1000>;
143 nvmem-cells = <&macaddr_uboot_1fc00>;
144 nvmem-cell-names = "mac-address";
145 };
146
147 &uboot {
148 compatible = "nvmem-cells";
149 #address-cells = <1>;
150 #size-cells = <1>;
151
152 macaddr_uboot_1fc00: macaddr@1fc00 {
153 reg = <0x1fc00 0x6>;
154 };
155 };