ath79: move reference clock node to SoC dtsi
[openwrt/staging/lynxis.git] / target / linux / ath79 / dts / ar7161_netgear_wndr.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar7100.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mtd/partitions/uimage.h>
8
9 / {
10 aliases {
11 led-boot = &led_power_orange;
12 led-failsafe = &led_power_orange;
13 led-running = &led_power_green;
14 led-upgrade = &led_power_orange;
15 };
16
17 reset-leds {
18 compatible = "reset-leds";
19
20 usb_led {
21 label = "green:usb";
22 resets = <&rst 12>;
23 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
24 linux,default-trigger = "usbport";
25 };
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 wps {
32 label = "orange:wps";
33 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
34 };
35
36 led_power_green: power_green {
37 label = "green:power";
38 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
39 };
40
41 led_power_orange: power_orange {
42 label = "orange:power";
43 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
44 default-state = "on";
45 };
46
47 wps_green {
48 label = "green:wps";
49 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
50 };
51
52 wan_green {
53 label = "green:wan";
54 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
55 };
56 };
57
58 ath9k-leds {
59 compatible = "gpio-leds";
60
61 wlan2g {
62 label = "green:wlan2g";
63 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
64 linux,default-trigger = "phy0tpt";
65 };
66 wlan5g {
67 label = "blue:wlan5g";
68 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
69 linux,default-trigger = "phy1tpt";
70 };
71 };
72
73 keys {
74 compatible = "gpio-keys";
75
76 wps {
77 label = "wps";
78 linux,code = <KEY_WPS_BUTTON>;
79 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
80 };
81
82 reset {
83 label = "reset";
84 linux,code = <KEY_RESTART>;
85 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
86 };
87
88 rfkill {
89 label = "rfkill";
90 linux,code = <KEY_RFKILL>;
91 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
92 };
93 };
94
95 rtl8366s {
96 compatible = "realtek,rtl8366s";
97
98 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
99 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
100
101 mdio-bus {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 status = "okay";
105
106 phy4: ethernet-phy@4 {
107 reg = <4>;
108 phy-mode = "rgmii";
109 };
110 };
111 };
112 };
113
114 &usb_phy {
115 status = "okay";
116 };
117
118 &usb1 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 status = "okay";
122
123 usb_ohci_port: port@1 {
124 reg = <1>;
125 #trigger-source-cells = <0>;
126 };
127 };
128
129 &usb2 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 status = "okay";
133
134 usb_ehci_port: port@1 {
135 reg = <1>;
136 #trigger-source-cells = <0>;
137 };
138 };
139
140 &pcie0 {
141 status = "okay";
142
143 ath9k0: wifi@0,11 {
144 compatible = "pci168c,0029";
145 reg = <0x8800 0 0 0 0>;
146
147 #gpio-cells = <2>;
148 gpio-controller;
149
150 /* all WNDR3700 variants have four antennae dedicated
151 * to the 2.4GHz radio. Two antennae are available for
152 * each chain. The following configuration is the
153 * default setting which taken from the vendor's wifi
154 * code for that radio.
155 *
156 * All possible options [GPIO6,GPIO7,GPIO8,GPIO9]:
157 * [0,1,0,1], [0,1,1,0], [1,0,0,1], [1,0,1,0]
158 */
159 antenna-demux {
160 gpio-hog;
161 line-name = "fixed antenna group 1";
162 gpios = <6 GPIO_ACTIVE_LOW>,
163 <7 GPIO_ACTIVE_HIGH>,
164 <8 GPIO_ACTIVE_LOW>,
165 <9 GPIO_ACTIVE_HIGH>;
166 output-high;
167 };
168 };
169
170 ath9k1: wifi@0,12 {
171 compatible = "pci168c,0029";
172 reg = <0x9000 0 0 0 0>;
173
174 #gpio-cells = <2>;
175 gpio-controller;
176 };
177 };
178
179 &spi {
180 status = "okay";
181
182 flash@0 {
183 compatible = "jedec,spi-nor";
184 reg = <0>;
185 spi-max-frequency = <25000000>;
186
187 partitions: partitions {
188 compatible = "fixed-partitions";
189 #address-cells = <1>;
190 #size-cells = <1>;
191 };
192 };
193 };
194
195 &eth0 {
196 status = "okay";
197
198 pll-data = <0x11110000 0x00001099 0x00991099>;
199
200 fixed-link {
201 speed = <1000>;
202 full-duplex;
203 };
204 };
205
206 &eth1 {
207 status = "okay";
208
209 pll-data = <0x11110000 0x00001099 0x00991099>;
210
211 phy-handle = <&phy4>;
212 };