plat/arm/board/a5ds/a5ds_pm.c

   1 /*
   2  * Copyright (c) 2019, Arm Limited. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <lib/psci/psci.h>
   8 #include <plat/arm/common/plat_arm.h>
   9 #include <plat/common/platform.h>
  10 #include <drivers/arm/gicv2.h>
  11
  12 /*******************************************************************************
  13  * Platform handler called when a power domain is about to be turned on. The
  14  * mpidr determines the CPU to be turned on.
  15  ******************************************************************************/
  16 static int a5ds_pwr_domain_on(u_register_t mpidr)
  17 {
  18         unsigned int pos = plat_core_pos_by_mpidr(mpidr);
  19         uint64_t *hold_base = (uint64_t *)A5DS_HOLD_BASE;
  20
  21         hold_base[pos] = A5DS_HOLD_STATE_GO;
  22         dsbish();
  23         sev();
  24
  25         return PSCI_E_SUCCESS;
  26 }
  27
  28 /*******************************************************************************
  29  * Platform handler called when a power domain has just been powered on after
  30  * being turned off earlier. The target_state encodes the low power state that
  31  * each level has woken up from.
  32  ******************************************************************************/
  33 void a5ds_pwr_domain_on_finish(const psci_power_state_t *target_state)
  34 {
  35         /* TODO: This setup is needed only after a cold boot*/
  36         gicv2_pcpu_distif_init();
  37
  38         /* Enable the gic cpu interface */
  39         gicv2_cpuif_enable();
  40 }
  41
  42 /*******************************************************************************
  43  * Export the platform handlers via a5ds_psci_pm_ops. The ARM Standard
  44  * platform layer will take care of registering the handlers with PSCI.
  45  ******************************************************************************/
  46 plat_psci_ops_t a5ds_psci_pm_ops = {
  47         /* dummy struct */
  48         .validate_ns_entrypoint = NULL,
  49         .pwr_domain_on = a5ds_pwr_domain_on,
  50         .pwr_domain_on_finish = a5ds_pwr_domain_on_finish
  51 };
  52
  53 int __init plat_setup_psci_ops(uintptr_t sec_entrypoint,
  54                                 const plat_psci_ops_t **psci_ops)
  55 {
  56         uintptr_t *mailbox = (void *)A5DS_TRUSTED_MAILBOX_BASE;
  57         *mailbox = sec_entrypoint;
  58
  59         *psci_ops = &a5ds_psci_pm_ops;
  60
  61         return 0;
  62 }