package/kernel/mac80211/patches/rt2x00/982-rt2x00-add-RF-self-TXDC-calibration.patch

   1 From: =?UTF-8?q?Tomislav=20Po=C5=BEega?= <pozega.tomislav@gmail.com>
   2 Date: Mon, 8 Jan 2018 13:42:27 +0100
   3 Subject: [PATCH] rt2x00: add RF self TXDC calibration
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 Add TX self calibration based on mtk driver.
   9
  10 Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
  11 ---
  12  .../net/wireless/ralink/rt2x00/rt2800lib.c    | 51 +++++++++++++++++++
  13  1 file changed, 51 insertions(+)
  14
  15 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  16 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  17 @@ -8438,6 +8438,56 @@ static void rt2800_init_rfcsr_5592(struc
  18         rt2800_led_open_drain_enable(rt2x00dev);
  19  }
  20
  21 +static void rt2800_rf_self_txdc_cal(struct rt2x00_dev *rt2x00dev)
  22 +{
  23 +       u8 rfb5r1_org, rfb7r1_org, rfvalue;
  24 +       u32 mac0518, mac051c, mac0528, mac052c;
  25 +       u8 i;
  26 +
  27 +       rt2x00_info(rt2x00dev, "RF Tx self calibration start\n");
  28 +       mac0518 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
  29 +       mac051c = rt2800_register_read(rt2x00dev, RF_BYPASS0);
  30 +       mac0528 = rt2800_register_read(rt2x00dev, RF_CONTROL2);
  31 +       mac052c = rt2800_register_read(rt2x00dev, RF_BYPASS2);
  32 +
  33 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
  34 +       rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
  35 +
  36 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, 0xC);
  37 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x3306);
  38 +       rt2800_register_write(rt2x00dev, RF_CONTROL2, 0x3330);
  39 +       rt2800_register_write(rt2x00dev, RF_BYPASS2, 0xfffff);
  40 +       rfb5r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
  41 +       rfb7r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
  42 +
  43 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, 0x4);
  44 +       for (i = 0; i < 100; i = i + 1) {
  45 +               udelay(50);
  46 +               rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
  47 +               if((rfvalue & 0x04) != 0x4)
  48 +                       break;
  49 +       }
  50 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rfb5r1_org);
  51 +
  52 +       rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, 0x4);
  53 +       for (i = 0; i < 100; i = i + 1) {
  54 +               udelay(50);
  55 +               rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
  56 +               if((rfvalue & 0x04) != 0x4)
  57 +                       break;
  58 +       }
  59 +       rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, rfb7r1_org);
  60 +
  61 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
  62 +       rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
  63 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, mac0518);
  64 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, mac051c);
  65 +       rt2800_register_write(rt2x00dev, RF_CONTROL2, mac0528);
  66 +       rt2800_register_write(rt2x00dev, RF_BYPASS2, mac052c);
  67 +
  68 +       rt2x00_info(rt2x00dev, "RF Tx self calibration end\n");
  69 +}
  70 +
  71  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
  72                                        bool set_bw, bool is_ht40)
  73  {
  74 @@ -9045,6 +9095,7 @@ static void rt2800_init_rfcsr_6352(struc
  75         rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
  76         rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
  77
  78 +       rt2800_rf_self_txdc_cal(rt2x00dev);
  79         rt2800_bw_filter_calibration(rt2x00dev, true);
  80         rt2800_bw_filter_calibration(rt2x00dev, false);
  81  }