lantiq: ltq-vdsl-mei: register char device automatically
[openwrt/openwrt.git] / package / kernel / lantiq / ltq-vdsl-mei / patches / 100-compat.patch
1 --- a/src/drv_mei_cpe_common.c
2 +++ b/src/drv_mei_cpe_common.c
3 @@ -19,7 +19,6 @@
4 /* get at first the driver configuration */
5 #include "drv_mei_cpe_config.h"
6
7 -#include "ifx_types.h"
8 #include "drv_mei_cpe_os.h"
9 #include "drv_mei_cpe_dbg.h"
10
11 --- a/src/drv_mei_cpe_linux.h
12 +++ b/src/drv_mei_cpe_linux.h
13 @@ -51,12 +51,6 @@
14 #include <linux/poll.h>
15 #include <linux/types.h>
16
17 -#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
18 - #include <asm/ifx/ifx_types.h>
19 -#else
20 - #include <ifx_types.h>
21 -#endif
22 -
23 #endif /* #if (MEI_DRV_IFXOS_ENABLE == 0)*/
24
25 /* ============================================================================
26 --- a/src/drv_mei_cpe_linux.c
27 +++ b/src/drv_mei_cpe_linux.c
28 @@ -98,6 +98,8 @@
29
30 #include "drv_mei_cpe_api_atm_ptm_intern.h"
31
32 +#include <lantiq_soc.h>
33 +
34 /* ===================================
35 extern function declarations
36 =================================== */
37 @@ -196,6 +198,8 @@ static void MEI_MemVAllocTest();
38 /* Local variables (LINUX) */
39 /* =================================== */
40 static IFX_uint8_t major_number = 0;
41 +static struct class *mei_class;
42 +static dev_t mei_devt;
43 #ifdef MODULE
44 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
45 MODULE_PARM(major_number, "b");
46 @@ -1783,7 +1787,9 @@ static int __init MEI_module_init (void)
47 return (result);
48 }
49
50 +#if 0
51 ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)ltq_mei_atm_showtime_check);
52 +#endif
53
54 return 0;
55 }
56 @@ -1907,6 +1913,10 @@ static void MEI_module_exit (void)
57
58 #else
59 unregister_chrdev ( major_number , DRV_MEI_NAME );
60 + device_destroy(mei_class, mei_devt);
61 + mei_devt = 0;
62 + class_destroy(mei_class);
63 + mei_class = NULL;
64 #endif
65
66 #if CONFIG_PROC_FS
67 @@ -1963,7 +1973,9 @@ static void MEI_module_exit (void)
68 ("MEI_DRV: Chipset Basic Exit failed" MEI_DRV_CRLF));
69 }
70
71 +#if 0
72 ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)NULL);
73 +#endif
74
75 /* touch one time this variable to avoid that the linker will remove it */
76 debug_level = MEI_DRV_PRN_LEVEL_OFF;
77 @@ -2080,6 +2092,10 @@ static int MEI_InitModuleRegCharDev(cons
78 ("Using major number %d" MEI_DRV_CRLF, major_number));
79 }
80
81 + mei_class = class_create(THIS_MODULE, devName);
82 + mei_devt = MKDEV(major_number, 0);
83 + device_create(mei_class, NULL, mei_devt, NULL, "%s/%i", devName, 0);
84 +
85 return 0;
86 #endif /* CONFIG_DEVFS_FS */
87 }
88 @@ -2120,21 +2136,32 @@ static int MEI_InitModuleBasics(void)
89 }
90
91 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
92 +
93 +#define PMU_DFE BIT(9)
94 +
95 static int MEI_SysClkEnable(struct clk *clk)
96 {
97 +#if 0
98 if (IS_ERR(clk))
99 return -1;
100 clk_enable(clk);
101 +#else
102 + ltq_pmu_enable(PMU_DFE);
103 +#endif
104
105 return 0;
106 }
107
108 static int MEI_SysClkDisable(struct clk *clk)
109 {
110 +#if 0
111 if (IS_ERR(clk))
112 return -1;
113 clk_disable(clk);
114 clk_put(clk);
115 +#else
116 + ltq_pmu_disable(PMU_DFE);
117 +#endif
118
119 return 0;
120 }
121 @@ -2454,11 +2481,15 @@ IFX_int32_t MEI_IoctlInitDevice(
122 pMeiDev->eModePoll = e_MEI_DEV_ACCESS_MODE_IRQ;
123 pMeiDev->intMask = ME_ARC2ME_INTERRUPT_UNMASK_ALL;
124
125 +#if 1
126 + virq = (IFX_uint32_t)pInitDev->usedIRQ;
127 +#else
128 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
129 virq = (IFX_uint32_t)pInitDev->usedIRQ;
130 #else
131 virq = irq_create_mapping(NULL, (IFX_uint32_t)pInitDev->usedIRQ);
132 #endif
133 +#endif
134
135 pTmpXCntrl = MEI_VrxXDevToIrqListAdd(
136 MEI_DRV_LINENUM_GET(pMeiDev),
137 --- a/src/drv_mei_cpe_api_atm_ptm_intern.c
138 +++ b/src/drv_mei_cpe_api_atm_ptm_intern.c
139 @@ -193,6 +193,51 @@ int ifx_mei_atm_led_blink(void)
140 return IFX_SUCCESS;
141 }
142
143 +#if MEI_MAX_DFE_CHAN_DEVICES > 1
144 +#error "Compat functions do not support MEI_MAX_DFE_CHAN_DEVICES > 1 yet"
145 +#else
146 +int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
147 +int (*ifx_mei_atm_showtime_exit)(void) = NULL;
148 +
149 +ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
150 + struct port_cell_info *cellInfo,
151 + void *xdata) {
152 + if (ifx_mei_atm_showtime_enter)
153 + return ifx_mei_atm_showtime_enter(cellInfo, xdata);
154 +
155 + return -e_MEI_ERR_OP_FAILED;
156 +}
157 +
158 +ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
159 + if (ifx_mei_atm_showtime_exit)
160 + return ifx_mei_atm_showtime_exit();
161 +
162 + return -e_MEI_ERR_OP_FAILED;
163 +}
164 +
165 +void* ppa_callback_get(e_ltq_mei_cb_type type) {
166 + switch (type) {
167 + case LTQ_MEI_SHOWTIME_ENTER:
168 + return &ltq_ifx_mei_atm_showtime_enter_compat;
169 + case LTQ_MEI_SHOWTIME_EXIT:
170 + return &ltq_ifx_mei_atm_showtime_exit_compat;
171 + break;
172 + }
173 +
174 + BUG();
175 +}
176 +
177 +int ifx_mei_atm_showtime_check(int *is_showtime,
178 + struct port_cell_info *port_cell,
179 + void **xdata_addr) {
180 + return ltq_mei_atm_showtime_check(0, is_showtime, port_cell, xdata_addr);
181 +}
182 +
183 +EXPORT_SYMBOL(ifx_mei_atm_showtime_enter);
184 +EXPORT_SYMBOL(ifx_mei_atm_showtime_exit);
185 +EXPORT_SYMBOL(ifx_mei_atm_showtime_check);
186 +#endif
187 +
188 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeEntrySignal);
189 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeExitSignal);
190 EXPORT_SYMBOL(ifx_mei_atm_led_blink);
191 --- a/src/drv_mei_cpe_api_atm_ptm_intern.h
192 +++ b/src/drv_mei_cpe_api_atm_ptm_intern.h
193 @@ -21,7 +21,6 @@
194
195 #include "drv_mei_cpe_config.h"
196 #include "drv_mei_cpe_interface.h"
197 -#include <net/ppa_stack_al.h>
198
199 #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
200
201 @@ -42,8 +41,20 @@ extern IFX_int32_t MEI_InternalXtmSwhowt
202 MEI_DYN_CNTRL_T *pMeiDynCntrl,
203 MEI_XTM_ShowtimeExit_t *pArgXtm);
204
205 +#if 1
206 +typedef enum {
207 + LTQ_MEI_SHOWTIME_ENTER,
208 + LTQ_MEI_SHOWTIME_EXIT
209 +} e_ltq_mei_cb_type;
210 +
211 +typedef void (*ltq_mei_atm_showtime_enter_t)(IFX_uint8_t, struct port_cell_info *, void *);
212 +typedef void (*ltq_mei_atm_showtime_exit_t)(IFX_uint8_t);
213 +
214 +void* ppa_callback_get(e_ltq_mei_cb_type type);
215 +#else
216 extern int ppa_callback_set(e_ltq_mei_cb_type type, void *func);
217 extern void* ppa_callback_get(e_ltq_mei_cb_type type);
218 +#endif
219
220 int ltq_mei_atm_showtime_check (
221 const unsigned char line_idx,
222 --- a/src/drv_mei_cpe_device_vrx.c
223 +++ b/src/drv_mei_cpe_device_vrx.c
224 @@ -27,13 +27,6 @@
225 #include "drv_mei_cpe_mei_interface.h"
226 #include "drv_mei_cpe_api.h"
227
228 -#if defined(LINUX)
229 -# if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
230 -# include "ifx_pcie.h"
231 -# else
232 -# include "lantiq_pcie.h"
233 -# endif
234 -#endif /* #if defined(LINUX)*/
235
236 IFX_int32_t MEI_GPIntProcess(MEI_MeiRegVal_t processInt, MEI_DEV_T *pMeiDev)
237 {
238 @@ -81,6 +74,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
239 */
240 IFX_int32_t MEI_VR10_PcieEntitiesCheck(IFX_uint8_t nEntityNum)
241 {
242 +#if 0
243 IFX_uint32_t pcie_entitiesNum;
244
245 /* get information from pcie driver */
246 @@ -101,6 +95,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
247 }
248
249 return IFX_SUCCESS;
250 +#else
251 + return IFX_ERROR;
252 +#endif
253 }
254
255 /**
256 @@ -115,6 +112,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
257 */
258 IFX_int32_t MEI_VR10_PcieEntityInit(MEI_MEI_DRV_CNTRL_T *pMeiDrvCntrl)
259 {
260 +#if 0
261 IFX_uint8_t entityNum;
262 ifx_pcie_ep_dev_t MEI_pcie_ep_dev;
263
264 @@ -137,6 +135,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
265 pMeiDrvCntrl->MEI_pcie_irq = MEI_pcie_ep_dev.irq;
266
267 return IFX_SUCCESS;
268 +#else
269 + return IFX_ERROR;
270 +#endif
271 }
272
273 /**
274 @@ -151,6 +152,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
275 */
276 IFX_int32_t MEI_VR10_PcieEntityFree(IFX_uint8_t entityNum)
277 {
278 +#if 0
279 if (ifx_pcie_ep_dev_info_release(entityNum))
280 {
281 PRN_ERR_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_ERR,
282 @@ -160,6 +162,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
283 }
284
285 return IFX_SUCCESS;
286 +#else
287 + return IFX_ERROR;
288 +#endif
289 }
290
291 /**
292 @@ -174,6 +179,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
293 */
294 IFX_int32_t MEI_VR10_InternalInitDevice(MEI_DYN_CNTRL_T *pMeiDynCntrl)
295 {
296 +#if 0
297 IFX_int32_t retVal;
298 IOCTL_MEI_devInit_t InitDev;
299 MEI_DEV_T *pMeiDev = pMeiDynCntrl->pMeiDev;
300 @@ -198,5 +204,8 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
301 *MEI_GPIO_U32REG(GPIO_P0_ALSEL1) &= ~((1 << 0) | (1 << 3) | (1 << 8));
302
303 return IFX_SUCCESS;
304 +#else
305 + return IFX_ERROR;
306 +#endif
307 }
308