sunxi: add support for Bananapi P2 Zero
[openwrt/staging/jow.git] / package / boot / uboot-sunxi / patches / 254-sunxi-h2-add-bpi-p2-zero.patch
1 --- /dev/null
2 +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts
3 @@ -0,0 +1,291 @@
4 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 +/*
6 + * Copyright (C) 2023 Zoltan HERPAI <wigyori@uid0.hu>
7 + *
8 + * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is:
9 + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
10 + */
11 +
12 +/dts-v1/;
13 +#include "sun8i-h3.dtsi"
14 +#include "sunxi-common-regulators.dtsi"
15 +
16 +#include <dt-bindings/gpio/gpio.h>
17 +#include <dt-bindings/input/input.h>
18 +
19 +/ {
20 + model = "Banana Pi BPI-P2-Zero";
21 + compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";
22 +
23 + aliases {
24 + serial0 = &uart0;
25 + serial1 = &uart1;
26 + ethernet0 = &emac;
27 + };
28 +
29 + chosen {
30 + stdout-path = "serial0:115200n8";
31 + };
32 +
33 + connector {
34 + compatible = "hdmi-connector";
35 + type = "c";
36 +
37 + port {
38 + hdmi_con_in: endpoint {
39 + remote-endpoint = <&hdmi_out_con>;
40 + };
41 + };
42 + };
43 +
44 + leds {
45 + compatible = "gpio-leds";
46 +
47 + pwr_led {
48 + label = "bananapi-p2-zero:red:pwr";
49 + gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
50 + default-state = "on";
51 + };
52 + };
53 +
54 + gpio-keys {
55 + compatible = "gpio-keys";
56 +
57 + switch-4 {
58 + label = "power";
59 + linux,code = <KEY_POWER>;
60 + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
61 + wakeup-source;
62 + };
63 + };
64 +
65 + reg_vdd_cpux: vdd-cpux-regulator {
66 + compatible = "regulator-gpio";
67 + regulator-name = "vdd-cpux";
68 + regulator-type = "voltage";
69 + regulator-boot-on;
70 + regulator-always-on;
71 + regulator-min-microvolt = <1100000>;
72 + regulator-max-microvolt = <1300000>;
73 + regulator-ramp-delay = <50>; /* 4ms */
74 +
75 + gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
76 + enable-active-high;
77 + gpios-states = <0x1>;
78 + states = <1100000 0>, <1300000 1>;
79 + };
80 +
81 + reg_vcc_dram: vcc-dram {
82 + compatible = "regulator-fixed";
83 + regulator-name = "vcc-dram";
84 + regulator-min-microvolt = <1500000>;
85 + regulator-max-microvolt = <1500000>;
86 + regulator-always-on;
87 + regulator-boot-on;
88 + enable-active-high;
89 + gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
90 + vin-supply = <&reg_vcc5v0>;
91 + };
92 +
93 + reg_vcc1v2: vcc1v2 {
94 + compatible = "regulator-fixed";
95 + regulator-name = "vcc1v2";
96 + regulator-min-microvolt = <1200000>;
97 + regulator-max-microvolt = <1200000>;
98 + regulator-always-on;
99 + regulator-boot-on;
100 + enable-active-high;
101 + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
102 + vin-supply = <&reg_vcc5v0>;
103 + };
104 +
105 + poweroff {
106 + compatible = "regulator-poweroff";
107 + cpu-supply = <&reg_vcc1v2>;
108 + };
109 +
110 + wifi_pwrseq: wifi_pwrseq {
111 + compatible = "mmc-pwrseq-simple";
112 + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
113 + clocks = <&rtc CLK_OSC32K_FANOUT>;
114 + clock-names = "ext_clock";
115 + };
116 +};
117 +
118 +&cpu0 {
119 + cpu-supply = <&reg_vdd_cpux>;
120 +};
121 +
122 +&de {
123 + status = "okay";
124 +};
125 +
126 +&ehci0 {
127 + status = "okay";
128 +};
129 +
130 +&emac {
131 + phy-handle = <&int_mii_phy>;
132 + phy-mode = "mii";
133 + allwinner,leds-active-low;
134 + status = "okay";
135 +};
136 +
137 +&hdmi {
138 + status = "okay";
139 +};
140 +
141 +&hdmi_out {
142 + hdmi_out_con: endpoint {
143 + remote-endpoint = <&hdmi_con_in>;
144 + };
145 +};
146 +
147 +&mmc0 {
148 + vmmc-supply = <&reg_vcc3v3>;
149 + bus-width = <4>;
150 + /*
151 + * On the production batch of this board the card detect GPIO is
152 + * high active (card inserted), although on the early samples it's
153 + * low active.
154 + */
155 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
156 + status = "okay";
157 +};
158 +
159 +&mmc1 {
160 + vmmc-supply = <&reg_vcc3v3>;
161 + vqmmc-supply = <&reg_vcc3v3>;
162 + mmc-pwrseq = <&wifi_pwrseq>;
163 + bus-width = <4>;
164 + non-removable;
165 + status = "okay";
166 +
167 + brcmf: wifi@1 {
168 + reg = <1>;
169 + compatible = "brcm,bcm4329-fmac";
170 + interrupt-parent = <&pio>;
171 + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
172 + interrupt-names = "host-wake";
173 + };
174 +};
175 +
176 +&mmc2 {
177 + pinctrl-names = "default";
178 + pinctrl-0 = <&mmc2_8bit_pins>;
179 + vmmc-supply = <&reg_vcc3v3>;
180 + vqmmc-supply = <&reg_vcc3v3>;
181 + bus-width = <8>;
182 + non-removable;
183 + status = "okay";
184 +};
185 +
186 +&ohci0 {
187 + status = "okay";
188 +};
189 +
190 +&uart0 {
191 + pinctrl-names = "default";
192 + pinctrl-0 = <&uart0_pa_pins>;
193 + status = "okay";
194 +};
195 +
196 +&uart1 {
197 + pinctrl-names = "default";
198 + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
199 + uart-has-rtscts;
200 + status = "okay";
201 +
202 + bluetooth {
203 + compatible = "brcm,bcm43438-bt";
204 + max-speed = <1500000>;
205 + clocks = <&rtc CLK_OSC32K_FANOUT>;
206 + clock-names = "lpo";
207 + vbat-supply = <&reg_vcc3v3>;
208 + vddio-supply = <&reg_vcc3v3>;
209 + device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
210 + host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
211 + shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
212 + };
213 +
214 +};
215 +
216 +&pio {
217 + gpio-line-names =
218 + /* PA */
219 + "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15",
220 + "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29",
221 + "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05",
222 + "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16",
223 + "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27",
224 + "CON2-P40", "CON2-P38", "", "",
225 + "", "", "", "", "", "", "", "",
226 +
227 + /* PB */
228 + "", "", "", "", "", "", "", "",
229 + "", "", "", "", "", "", "", "",
230 + "", "", "", "", "", "", "", "",
231 + "", "", "", "", "", "", "", "",
232 +
233 + /* PC */
234 + "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24",
235 + "CON2-P18", "", "", "CON2-P26",
236 + "", "", "", "", "", "", "", "",
237 + "", "", "", "", "", "", "", "",
238 + "", "", "", "", "", "", "", "",
239 +
240 + /* PD */
241 + "", "", "", "", "", "", "", "",
242 + "", "", "", "", "", "", "CSI-PWR-EN", "",
243 + "", "", "", "", "", "", "", "",
244 + "", "", "", "", "", "", "", "",
245 +
246 + /* PE */
247 + "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07",
248 + "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20",
249 + "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12",
250 + "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08",
251 + "", "", "", "", "", "", "", "",
252 + "", "", "", "", "", "", "", "",
253 +
254 + /* PF */
255 + "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
256 + "SDC0-D2", "SDC0-DET", "",
257 + "", "", "", "", "", "", "", "",
258 + "", "", "", "", "", "", "", "",
259 + "", "", "", "", "", "", "", "",
260 +
261 + /* PG */
262 + "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
263 + "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX",
264 + "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP",
265 + "BT-RST-N", "AP-WAKE-BT", "", "",
266 + "", "", "", "", "", "", "", "",
267 + "", "", "", "", "", "", "", "";
268 +};
269 +
270 +&r_pio {
271 + gpio-line-names =
272 + /* PL */
273 + "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36",
274 + "VCC-IO-EN", "USB0-ID", "WL-PWR-EN",
275 + "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "",
276 + "", "", "", "", "", "", "", "",
277 + "", "", "", "", "", "", "", "";
278 +};
279 +
280 +&usb_otg {
281 + dr_mode = "otg";
282 + status = "okay";
283 +};
284 +
285 +&usbphy {
286 + usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
287 + /*
288 + * There're two micro-USB connectors, one is power-only and another is
289 + * OTG. The Vbus of these two connectors are connected together, so
290 + * the external USB device will be powered just by the power input
291 + * from the power-only USB port.
292 + */
293 + status = "okay";
294 +};
295 --- /dev/null
296 +++ b/configs/bananapi_p2_zero_defconfig
297 @@ -0,0 +1,10 @@
298 +CONFIG_ARM=y
299 +CONFIG_ARCH_SUNXI=y
300 +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-p2-zero"
301 +CONFIG_SPL=y
302 +CONFIG_MACH_SUN8I_H3=y
303 +CONFIG_DRAM_CLK=408
304 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
305 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2
306 +CONFIG_SUN8I_EMAC=y
307 +CONFIG_USB_EHCI_HCD=y