package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch

   1 From 725595e667cc4423347c255da8ca4c5b3aa0980a Mon Sep 17 00:00:00 2001
   2 From: Vincent Chen <vincent.chen@sifive.com>
   3 Date: Mon, 15 Nov 2021 03:31:04 -0800
   4 Subject: [PATCH 2/8] board: sifive: spl: Initialized the PWM setting in the
   5  SPL stage
   6
   7 LEDs and multiple fans can be controlled by SPL. This patch ensures
   8 that all fans have been enabled in the SPL stage. In addition, the
   9 LED's color will be set to yellow.
  10 ---
  11  board/sifive/unmatched/Makefile |  1 +
  12  board/sifive/unmatched/pwm.c    | 57 +++++++++++++++++++++++++++++++++
  13  board/sifive/unmatched/spl.c    |  2 ++
  14  3 files changed, 60 insertions(+)
  15  create mode 100644 board/sifive/unmatched/pwm.c
  16
  17 diff --git a/board/sifive/unmatched/Makefile b/board/sifive/unmatched/Makefile
  18 index 1345330089..5df01982e9 100644
  19 --- a/board/sifive/unmatched/Makefile
  20 +++ b/board/sifive/unmatched/Makefile
  21 @@ -9,3 +9,4 @@ obj-y += spl.o
  22  else
  23  obj-y += unmatched.o
  24  endif
  25 +obj-y += pwm.o
  26 diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c
  27 new file mode 100644
  28 index 0000000000..e1cc02310a
  29 --- /dev/null
  30 +++ b/board/sifive/unmatched/pwm.c
  31 @@ -0,0 +1,57 @@
  32 +// SPDX-License-Identifier: GPL-2.0+
  33 +/*
  34 + * Copyright (c) 2021, SiFive Inc
  35 + *
  36 + * Authors:
  37 + *   Vincent Chen <vincent.chen@sifive.com>
  38 + *   David Abdurachmanov <david.abdurachmanov@sifive.com>
  39 + */
  40 +
  41 +#include <linux/io.h>
  42 +#include <asm/arch/eeprom.h>
  43 +
  44 +struct pwm_sifive_regs {
  45 +       unsigned int cfg;       /* PWM configuration register */
  46 +       unsigned int pad0;      /* Reserved */
  47 +       unsigned int cnt;       /* PWM count register */
  48 +       unsigned int pad1;      /* Reserved */
  49 +       unsigned int pwms;      /* Scaled PWM count register */
  50 +       unsigned int pad2;      /* Reserved */
  51 +       unsigned int pad3;      /* Reserved */
  52 +       unsigned int pad4;      /* Reserved */
  53 +       unsigned int cmp0;      /* PWM 0 compare register */
  54 +       unsigned int cmp1;      /* PWM 1 compare register */
  55 +       unsigned int cmp2;      /* PWM 2 compare register */
  56 +       unsigned int cmp3;      /* PWM 3 compare register */
  57 +};
  58 +
  59 +#define PWM0_BASE              0x10020000
  60 +#define PWM1_BASE              0x10021000
  61 +#define PWM_CFG_INIT           0x1000
  62 +#define PWM_CMP_ENABLE_VAL     0x0
  63 +#define PWM_CMP_DISABLE_VAL    0xffff
  64 +
  65 +void pwm_device_init(void)
  66 +{
  67 +       struct pwm_sifive_regs *pwm0, *pwm1;
  68 +       pwm0 = (struct pwm_sifive_regs *)PWM0_BASE;
  69 +       pwm1 = (struct pwm_sifive_regs *)PWM1_BASE;
  70 +       writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0);
  71 +       /* Set the 3-color PWM LEDs to yellow in SPL */
  72 +       writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1);
  73 +       writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2);
  74 +       writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
  75 +       writel(PWM_CFG_INIT, (void *)&pwm0->cfg);
  76 +
  77 +       writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
  78 +       /* Turn on all the fans, (J21), (J23) and (J24), on the unmatched board */
  79 +       /* The SoC fan(J21) on the rev3 board cannot be controled by PWM_COMP0,
  80 +          so here sets the initial value of PWM_COMP0 as DISABLE */
  81 +       if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3)
  82 +               writel(PWM_CMP_DISABLE_VAL, (void *)&pwm1->cmp1);
  83 +       else
  84 +               writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp1);
  85 +       writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2);
  86 +       writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3);
  87 +       writel(PWM_CFG_INIT, (void *)&pwm1->cfg);
  88 +}
  89 diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
  90 index 7c0beedc08..f3a661a81e 100644
  91 --- a/board/sifive/unmatched/spl.c
  92 +++ b/board/sifive/unmatched/spl.c
  93 @@ -90,6 +90,8 @@ int spl_board_init_f(void)
  94                 goto end;
  95         }
  96
  97 +       pwm_device_init();
  98 +
  99         ret = spl_gemgxl_init();
 100         if (ret) {
 101                 debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
 102 --
 103 2.27.0
 104