package/boot/uboot-rockchip/patches/104-rockchip-rk3568-Add-support-for-FriendlyARM-NanoPi-R.patch

   1 From 41538742491c46100f570680c02fbdd0d2b6b880 Mon Sep 17 00:00:00 2001
   2 From: Tianling Shen <cnsztl@gmail.com>
   3 Date: Tue, 30 May 2023 15:00:33 +0800
   4 Subject: [PATCH] rockchip: rk3568: Add support for FriendlyARM NanoPi R5C
   5
   6 FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.
   7
   8 Specification:
   9 - Rockchip RK3568
  10 - 1/4GB LPDDR4X RAM
  11 - 8/32GB eMMC
  12 - SD card slot
  13 - M.2 Connector
  14 - 2x USB 3.0 Port
  15 - 2x 2500 Base-T (PCIe, r8125)
  16 - HDMI 2.0
  17 - MIPI DSI/CSI
  18 - USB Type C 5V
  19
  20 The device tree is taken from kernel v6.4-rc1.
  21
  22 Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
  23 Signed-off-by: Tianling Shen <cnsztl@gmail.com>
  24 ---
  25  arch/arm/dts/Makefile                      |   1 +
  26  arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi |   3 +
  27  arch/arm/dts/rk3568-nanopi-r5c.dts         | 112 +++++++++++++++++++++
  28  board/rockchip/evb_rk3568/MAINTAINERS      |   7 ++
  29  configs/nanopi-r5c-rk3568_defconfig        |  85 ++++++++++++++++
  30  5 files changed, 208 insertions(+)
  31  create mode 100644 arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
  32  create mode 100644 arch/arm/dts/rk3568-nanopi-r5c.dts
  33  create mode 100644 configs/nanopi-r5c-rk3568_defconfig
  34
  35 --- a/arch/arm/dts/Makefile
  36 +++ b/arch/arm/dts/Makefile
  37 @@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
  38         rk3566-anbernic-rgxx3.dtb \
  39         rk3566-radxa-cm3-io.dtb \
  40         rk3568-evb.dtb \
  41 +       rk3568-nanopi-r5c.dtb \
  42         rk3568-nanopi-r5s.dtb \
  43         rk3568-rock-3a.dtb
  44
  45 --- /dev/null
  46 +++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
  47 @@ -0,0 +1,3 @@
  48 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  49 +
  50 +#include "rk3568-nanopi-r5s-u-boot.dtsi"
  51 --- /dev/null
  52 +++ b/arch/arm/dts/rk3568-nanopi-r5c.dts
  53 @@ -0,0 +1,112 @@
  54 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  55 +/*
  56 + * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
  57 + * (http://www.friendlyelec.com)
  58 + *
  59 + * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
  60 + */
  61 +
  62 +/dts-v1/;
  63 +#include "rk3568-nanopi-r5s.dtsi"
  64 +
  65 +/ {
  66 +       model = "FriendlyElec NanoPi R5C";
  67 +       compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
  68 +
  69 +       gpio-keys {
  70 +               compatible = "gpio-keys";
  71 +               pinctrl-names = "default";
  72 +               pinctrl-0 = <&reset_button_pin>;
  73 +
  74 +               button-reset {
  75 +                       debounce-interval = <50>;
  76 +                       gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
  77 +                       label = "reset";
  78 +                       linux,code = <KEY_RESTART>;
  79 +               };
  80 +       };
  81 +
  82 +       gpio-leds {
  83 +               compatible = "gpio-leds";
  84 +               pinctrl-names = "default";
  85 +               pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
  86 +
  87 +               led-lan {
  88 +                       color = <LED_COLOR_ID_GREEN>;
  89 +                       function = LED_FUNCTION_LAN;
  90 +                       gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
  91 +               };
  92 +
  93 +               power_led: led-power {
  94 +                       color = <LED_COLOR_ID_RED>;
  95 +                       function = LED_FUNCTION_POWER;
  96 +                       linux,default-trigger = "heartbeat";
  97 +                       gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
  98 +               };
  99 +
 100 +               led-wan {
 101 +                       color = <LED_COLOR_ID_GREEN>;
 102 +                       function = LED_FUNCTION_WAN;
 103 +                       gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
 104 +               };
 105 +
 106 +               led-wlan {
 107 +                       color = <LED_COLOR_ID_GREEN>;
 108 +                       function = LED_FUNCTION_WLAN;
 109 +                       gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
 110 +               };
 111 +       };
 112 +};
 113 +
 114 +&pcie2x1 {
 115 +       pinctrl-names = "default";
 116 +       pinctrl-0 = <&pcie20_reset_pin>;
 117 +       reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
 118 +       status = "okay";
 119 +};
 120 +
 121 +&pcie3x1 {
 122 +       num-lanes = <1>;
 123 +       reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
 124 +       vpcie3v3-supply = <&vcc3v3_pcie>;
 125 +       status = "okay";
 126 +};
 127 +
 128 +&pcie3x2 {
 129 +       num-lanes = <1>;
 130 +       reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
 131 +       vpcie3v3-supply = <&vcc3v3_pcie>;
 132 +       status = "okay";
 133 +};
 134 +
 135 +&pinctrl {
 136 +       gpio-leds {
 137 +               lan_led_pin: lan-led-pin {
 138 +                       rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
 139 +               };
 140 +
 141 +               power_led_pin: power-led-pin {
 142 +                       rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
 143 +               };
 144 +
 145 +               wan_led_pin: wan-led-pin {
 146 +                       rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
 147 +               };
 148 +
 149 +               wlan_led_pin: wlan-led-pin {
 150 +                       rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
 151 +               };
 152 +       };
 153 +
 154 +       pcie {
 155 +               pcie20_reset_pin: pcie20-reset-pin {
 156 +                       rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
 157 +               };
 158 +       };
 159 +
 160 +       rockchip-key {
 161 +               reset_button_pin: reset-button-pin {
 162 +                       rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
 163 +               };
 164 +       };
 165 +};
 166 --- a/board/rockchip/evb_rk3568/MAINTAINERS
 167 +++ b/board/rockchip/evb_rk3568/MAINTAINERS
 168 @@ -7,6 +7,13 @@ F:      configs/evb-rk3568_defconfig
 169  F:     arch/arm/dts/rk3568-evb-boot.dtsi
 170  F:     arch/arm/dts/rk3568-evb.dts
 171
 172 +NANOPI-R5C
 173 +M:      Tianling Shen <cnsztl@gmail.com>
 174 +S:      Maintained
 175 +F:      configs/nanopi-r5c-rk3568_defconfig
 176 +F:      arch/arm/dts/rk3568-nanopi-r5c.dts
 177 +F:      arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
 178 +
 179  NANOPI-R5S
 180  M:      Tianling Shen <cnsztl@gmail.com>
 181  S:      Maintained
 182 --- /dev/null
 183 +++ b/configs/nanopi-r5c-rk3568_defconfig
 184 @@ -0,0 +1,85 @@
 185 +CONFIG_ARM=y
 186 +CONFIG_SKIP_LOWLEVEL_INIT=y
 187 +CONFIG_COUNTER_FREQUENCY=24000000
 188 +CONFIG_ARCH_ROCKCHIP=y
 189 +CONFIG_TEXT_BASE=0x00a00000
 190 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
 191 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
 192 +CONFIG_NR_DRAM_BANKS=2
 193 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 194 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
 195 +CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c"
 196 +CONFIG_ROCKCHIP_RK3568=y
 197 +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
 198 +CONFIG_SPL_SERIAL=y
 199 +CONFIG_SPL_STACK_R_ADDR=0x600000
 200 +CONFIG_TARGET_EVB_RK3568=y
 201 +CONFIG_SPL_STACK=0x400000
 202 +CONFIG_DEBUG_UART_BASE=0xFE660000
 203 +CONFIG_DEBUG_UART_CLOCK=24000000
 204 +CONFIG_SYS_LOAD_ADDR=0xc00800
 205 +CONFIG_DEBUG_UART=y
 206 +CONFIG_FIT=y
 207 +CONFIG_FIT_VERBOSE=y
 208 +CONFIG_SPL_LOAD_FIT=y
 209 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5c.dtb"
 210 +# CONFIG_DISPLAY_CPUINFO is not set
 211 +CONFIG_DISPLAY_BOARDINFO_LATE=y
 212 +CONFIG_SPL_MAX_SIZE=0x40000
 213 +CONFIG_SPL_PAD_TO=0x7f8000
 214 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
 215 +CONFIG_SPL_BSS_START_ADDR=0x4000000
 216 +CONFIG_SPL_BSS_MAX_SIZE=0x4000
 217 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 218 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 219 +CONFIG_SPL_STACK_R=y
 220 +CONFIG_SPL_ATF=y
 221 +CONFIG_CMD_GPIO=y
 222 +CONFIG_CMD_GPT=y
 223 +CONFIG_CMD_I2C=y
 224 +CONFIG_CMD_MMC=y
 225 +CONFIG_CMD_USB=y
 226 +CONFIG_CMD_PMIC=y
 227 +CONFIG_CMD_REGULATOR=y
 228 +# CONFIG_SPL_DOS_PARTITION is not set
 229 +CONFIG_SPL_OF_CONTROL=y
 230 +CONFIG_OF_LIVE=y
 231 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 232 +CONFIG_SPL_DM_WARN=y
 233 +CONFIG_SPL_REGMAP=y
 234 +CONFIG_SPL_SYSCON=y
 235 +CONFIG_SPL_CLK=y
 236 +CONFIG_ROCKCHIP_GPIO=y
 237 +CONFIG_SYS_I2C_ROCKCHIP=y
 238 +CONFIG_MISC=y
 239 +CONFIG_SUPPORT_EMMC_RPMB=y
 240 +CONFIG_MMC_DW=y
 241 +CONFIG_MMC_DW_ROCKCHIP=y
 242 +CONFIG_MMC_SDHCI=y
 243 +CONFIG_MMC_SDHCI_SDMA=y
 244 +CONFIG_MMC_SDHCI_ROCKCHIP=y
 245 +CONFIG_ETH_DESIGNWARE=y
 246 +CONFIG_GMAC_ROCKCHIP=y
 247 +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 248 +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
 249 +CONFIG_POWER_DOMAIN=y
 250 +CONFIG_DM_PMIC=y
 251 +CONFIG_PMIC_RK8XX=y
 252 +CONFIG_SPL_DM_REGULATOR_FIXED=y
 253 +CONFIG_REGULATOR_RK8XX=y
 254 +CONFIG_PWM_ROCKCHIP=y
 255 +CONFIG_SPL_RAM=y
 256 +CONFIG_BAUDRATE=1500000
 257 +CONFIG_DEBUG_UART_SHIFT=2
 258 +CONFIG_SYS_NS16550_MEM32=y
 259 +CONFIG_SYSRESET=y
 260 +CONFIG_SYSRESET_PSCI=y
 261 +CONFIG_USB=y
 262 +CONFIG_USB_XHCI_HCD=y
 263 +CONFIG_USB_XHCI_DWC3=y
 264 +CONFIG_USB_EHCI_HCD=y
 265 +CONFIG_USB_EHCI_GENERIC=y
 266 +CONFIG_USB_OHCI_HCD=y
 267 +CONFIG_USB_OHCI_GENERIC=y
 268 +CONFIG_USB_DWC3=y
 269 +CONFIG_ERRNO_STR=y