uboot-mxs: bump to v2018.09
[openwrt/staging/dedeckeh.git] / package / boot / uboot-mxs / patches / 001-add-i2se-duckbill.patch
1 From 7b919a74c562ca33ae28c9214f225a79b57209e4 Mon Sep 17 00:00:00 2001
2 From: Michael Heimpold <mhei@heimpold.de>
3 Date: Thu, 13 Sep 2018 21:40:19 +0200
4 Subject: [PATCH] arm: mxs: add support for I2SE's Duckbill boards
5
6 The Duckbill devices are small, pen-drive sized boards based on
7 NXP's i.MX28 SoC. While the initial variants (Duckbill series) were
8 equipped with a micro SD card slot only, the latest generation
9 (Duckbill 2 series) have an additional internal eMMC onboard.
10
11 Both device generations consist of four "family members":
12
13 - Duckbill/Duckbill 2: generic board, intended to be used as
14 baseboard for custom designs and/or as development board
15
16 - Duckbill EnOcean/Duckbill 2 EnOcean: come with an EnOcean
17 daugther board equipped with the popular TCM310 module
18
19 - Duckbill 485/Duckbill 2 485: as the name implies, these
20 devices are intended to be used as Ethernet - RS485 converters
21
22 - Duckbill SPI/Duckbill 2 SPI: not sold separately, but used
23 in I2SE's development kits for Green PHY HomePlug Powerline
24 communication
25
26 Signed-off-by: Michael Heimpold <mhei@heimpold.de>
27 Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
28 ---
29 arch/arm/mach-imx/mxs/Kconfig | 5 +
30 board/i2se/duckbill/Kconfig | 15 +++
31 board/i2se/duckbill/MAINTAINERS | 6 ++
32 board/i2se/duckbill/Makefile | 10 ++
33 board/i2se/duckbill/duckbill.c | 186 ++++++++++++++++++++++++++++++++
34 board/i2se/duckbill/iomux.c | 156 +++++++++++++++++++++++++++
35 configs/duckbill_defconfig | 38 +++++++
36 include/configs/duckbill.h | 179 ++++++++++++++++++++++++++++++
37 8 files changed, 595 insertions(+)
38 create mode 100644 board/i2se/duckbill/Kconfig
39 create mode 100644 board/i2se/duckbill/MAINTAINERS
40 create mode 100644 board/i2se/duckbill/Makefile
41 create mode 100644 board/i2se/duckbill/duckbill.c
42 create mode 100644 board/i2se/duckbill/iomux.c
43 create mode 100644 configs/duckbill_defconfig
44 create mode 100644 include/configs/duckbill.h
45
46 --- a/arch/arm/mach-imx/mxs/Kconfig
47 +++ b/arch/arm/mach-imx/mxs/Kconfig
48 @@ -50,6 +50,10 @@ config TARGET_APX4DEVKIT
49 config TARGET_BG0900
50 bool "Support bg0900"
51
52 +config TARGET_DUCKBILL
53 + bool "Support duckbill"
54 + select BOARD_EARLY_INIT_F
55 +
56 config TARGET_MX28EVK
57 bool "Support mx28evk"
58 select BOARD_EARLY_INIT_F
59 @@ -67,6 +71,7 @@ config SYS_SOC
60
61 source "board/bluegiga/apx4devkit/Kconfig"
62 source "board/freescale/mx28evk/Kconfig"
63 +source "board/i2se/duckbill/Kconfig"
64 source "board/ppcag/bg0900/Kconfig"
65 source "board/schulercontrol/sc_sps_1/Kconfig"
66 source "board/technologic/ts4600/Kconfig"
67 --- /dev/null
68 +++ b/board/i2se/duckbill/Kconfig
69 @@ -0,0 +1,15 @@
70 +if TARGET_DUCKBILL
71 +
72 +config SYS_BOARD
73 + default "duckbill"
74 +
75 +config SYS_VENDOR
76 + default "i2se"
77 +
78 +config SYS_SOC
79 + default "mxs"
80 +
81 +config SYS_CONFIG_NAME
82 + default "duckbill"
83 +
84 +endif
85 --- /dev/null
86 +++ b/board/i2se/duckbill/MAINTAINERS
87 @@ -0,0 +1,6 @@
88 +I2SE DUCKBILL BOARD
89 +M: Michael Heimpold <mhei@heimpold.de>
90 +S: Maintained
91 +F: board/i2se/duckbill/
92 +F: include/configs/duckbill.h
93 +F: configs/duckbill_defconfig
94 --- /dev/null
95 +++ b/board/i2se/duckbill/Makefile
96 @@ -0,0 +1,10 @@
97 +# SPDX-License-Identifier: GPL-2.0+
98 +#
99 +# (C) Copyright 2014-2018
100 +# Michael Heimpold, mhei@heimpold.de.
101 +
102 +ifndef CONFIG_SPL_BUILD
103 +obj-y := duckbill.o
104 +else
105 +obj-y := iomux.o
106 +endif
107 --- /dev/null
108 +++ b/board/i2se/duckbill/duckbill.c
109 @@ -0,0 +1,186 @@
110 +// SPDX-License-Identifier: GPL-2.0+
111 +/*
112 + * I2SE Duckbill board
113 + *
114 + * (C) Copyright 2014-2018 Michael Heimpold <mhei@heimpold.de>
115 + */
116 +
117 +#include <common.h>
118 +#include <asm/gpio.h>
119 +#include <asm/io.h>
120 +#include <asm/arch/imx-regs.h>
121 +#include <asm/arch/iomux-mx28.h>
122 +#include <asm/arch/clock.h>
123 +#include <asm/arch/sys_proto.h>
124 +#include <asm/setup.h>
125 +#include <fdt_support.h>
126 +#include <linux/mii.h>
127 +#include <miiphy.h>
128 +#include <netdev.h>
129 +#include <errno.h>
130 +#include <fuse.h>
131 +
132 +DECLARE_GLOBAL_DATA_PTR;
133 +
134 +static u32 system_rev;
135 +static u32 serialno;
136 +
137 +/*
138 + * Functions
139 + */
140 +int board_early_init_f(void)
141 +{
142 + /* IO0 clock at 480MHz */
143 + mxs_set_ioclk(MXC_IOCLK0, 480000);
144 + /* IO1 clock at 480MHz */
145 + mxs_set_ioclk(MXC_IOCLK1, 480000);
146 +
147 + /* SSP0 clock at 96MHz */
148 + mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
149 +
150 + return 0;
151 +}
152 +
153 +int dram_init(void)
154 +{
155 + return mxs_dram_init();
156 +}
157 +
158 +int board_init(void)
159 +{
160 + /* Adress of boot parameters */
161 + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
162 +
163 + return 0;
164 +}
165 +
166 +#ifdef CONFIG_CMD_MMC
167 +int board_mmc_init(bd_t *bis)
168 +{
169 + return mxsmmc_initialize(bis, 0, NULL, NULL);
170 +}
171 +#endif
172 +
173 +#ifdef CONFIG_CMD_NET
174 +int board_eth_init(bd_t *bis)
175 +{
176 + unsigned int reset_gpio;
177 + int ret;
178 +
179 + ret = cpu_eth_init(bis);
180 +
181 + if (system_rev == 1)
182 + reset_gpio = MX28_PAD_SSP0_DATA7__GPIO_2_7;
183 + else
184 + reset_gpio = MX28_PAD_GPMI_ALE__GPIO_0_26;
185 +
186 + /* Reset PHY */
187 + gpio_direction_output(reset_gpio, 0);
188 + udelay(200);
189 + gpio_set_value(reset_gpio, 1);
190 +
191 + /* give PHY some time to get out of the reset */
192 + udelay(10000);
193 +
194 + ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
195 + if (ret) {
196 + puts("FEC MXS: Unable to init FEC\n");
197 + return ret;
198 + }
199 +
200 + return ret;
201 +}
202 +
203 +void mx28_adjust_mac(int dev_id, unsigned char *mac)
204 +{
205 + mac[0] = 0x00;
206 + mac[1] = 0x01;
207 + mac[2] = 0x87;
208 +}
209 +#endif
210 +
211 +#ifdef CONFIG_OF_BOARD_SETUP
212 +int ft_board_setup(void *blob, bd_t *bd)
213 +{
214 + uint8_t enetaddr[6];
215 + u32 mac = 0;
216 +
217 +#ifdef CONFIG_MXS_OCOTP
218 + /* only Duckbill SPI has a MAC for the QCA7k */
219 + fuse_read(0, 1, &mac);
220 +#endif
221 +
222 + if (mac != 0) {
223 + enetaddr[0] = 0x00;
224 + enetaddr[1] = 0x01;
225 + enetaddr[2] = 0x87;
226 + enetaddr[3] = (mac >> 16) & 0xff;
227 + enetaddr[4] = (mac >> 8) & 0xff;
228 + enetaddr[5] = mac & 0xff;
229 +
230 + fdt_find_and_setprop(blob, "spi1/ethernet@0",
231 + "local-mac-address", enetaddr, 6, 1);
232 + }
233 +
234 + return 0;
235 +}
236 +#endif
237 +
238 +#ifdef CONFIG_REVISION_TAG
239 +u32 get_board_rev(void)
240 +{
241 + return system_rev;
242 +}
243 +#endif
244 +
245 +#ifdef CONFIG_SERIAL_TAG
246 +void get_board_serial(struct tag_serialnr *serialnr)
247 +{
248 + serialnr->low = serialno;
249 + serialnr->high = 0;
250 +}
251 +#endif
252 +
253 +int misc_init_r(void)
254 +{
255 + unsigned int led_red_gpio;
256 + char *s;
257 +
258 + /* Board revision detection */
259 + gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17);
260 +
261 + /* MX28_PAD_LCD_D17__GPIO_1_17: v1 = pull-down, v2 = pull-up */
262 + system_rev =
263 + gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17);
264 + system_rev += 1;
265 +
266 + /* guess DT blob if not set in environment */
267 + if (!env_get("fdt_file")) {
268 + if (system_rev == 1)
269 + env_set("fdt_file", "imx28-duckbill.dtb");
270 + else
271 + env_set("fdt_file", "imx28-duckbill-2.dtb");
272 + }
273 +
274 + /* enable red LED to indicate a running bootloader */
275 + if (system_rev == 1)
276 + led_red_gpio = MX28_PAD_AUART1_RX__GPIO_3_4;
277 + else
278 + led_red_gpio = MX28_PAD_SAIF0_LRCLK__GPIO_3_21;
279 + gpio_direction_output(led_red_gpio, 1);
280 +
281 + if (system_rev == 1)
282 + puts("Board: I2SE Duckbill\n");
283 + else
284 + puts("Board: I2SE Duckbill 2\n");
285 +
286 + serialno = env_get_ulong("serial#", 10, 0);
287 + s = env_get("serial#");
288 + if (s && s[0]) {
289 + puts("Serial: ");
290 + puts(s);
291 + putc('\n');
292 + }
293 +
294 + return 0;
295 +}
296 --- /dev/null
297 +++ b/board/i2se/duckbill/iomux.c
298 @@ -0,0 +1,156 @@
299 +// SPDX-License-Identifier: GPL-2.0+
300 +/*
301 + * I2SE Duckbill IOMUX setup
302 + *
303 + * Copyright (C) 2013-2018 Michael Heimpold <mhei@heimpold.de>
304 + */
305 +
306 +#include <common.h>
307 +#include <config.h>
308 +#include <asm/io.h>
309 +#include <asm/gpio.h>
310 +#include <asm/arch/iomux-mx28.h>
311 +#include <asm/arch/imx-regs.h>
312 +#include <asm/arch/sys_proto.h>
313 +
314 +#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
315 +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
316 +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
317 +
318 +/* For all revisions */
319 +const iomux_cfg_t iomux_setup[] = {
320 + /* DUART */
321 + MX28_PAD_PWM0__DUART_RX,
322 + MX28_PAD_PWM1__DUART_TX,
323 +
324 + /* eMMC (v2) or SD card (v1) */
325 + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
326 + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
327 + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
328 + MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
329 + MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
330 + MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
331 + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
332 + MX28_PAD_SSP0_SCK__SSP0_SCK |
333 + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
334 +
335 + /* Ethernet */
336 + MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
337 + MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
338 + MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
339 + MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
340 + MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
341 + MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
342 + MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
343 + MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
344 + MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
345 +
346 + /* EMI */
347 + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
348 + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
349 + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
350 + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
351 + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
352 + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
353 + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
354 + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
355 + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
356 + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
357 + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
358 + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
359 + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
360 + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
361 + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
362 + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
363 + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
364 + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
365 + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
366 + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
367 + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
368 + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
369 + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
370 + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
371 + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
372 +
373 + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
374 + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
375 + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
376 + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
377 + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
378 + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
379 + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
380 + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
381 + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
382 + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
383 + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
384 + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
385 + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
386 + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
387 + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
388 + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
389 + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
390 + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
391 + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
392 + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
393 + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
394 + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
395 + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
396 + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
397 +
398 + /* Revision pin(s) */
399 + MX28_PAD_LCD_D17__GPIO_1_17,
400 +};
401 +
402 +/* For revision 1 only */
403 +const iomux_cfg_t iomux_setup_v1[] = {
404 + /* PHY reset */
405 + MX28_PAD_SSP0_DATA7__GPIO_2_7 |
406 + (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
407 +
408 + /* LEDs */
409 + MX28_PAD_AUART1_RX__GPIO_3_4,
410 + MX28_PAD_AUART1_TX__GPIO_3_5,
411 +};
412 +
413 +/* For revision 2 only */
414 +const iomux_cfg_t iomux_setup_v2[] = {
415 + /* eMMC (v2) */
416 + MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0,
417 + MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0,
418 + MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0,
419 + MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0,
420 +
421 + /* PHY reset */
422 + MX28_PAD_GPMI_ALE__GPIO_0_26 |
423 + (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
424 +
425 + /* LEDs */
426 + MX28_PAD_SAIF0_LRCLK__GPIO_3_21,
427 + MX28_PAD_SAIF0_MCLK__GPIO_3_20,
428 +};
429 +
430 +#define HW_DRAM_CTL29 (0x74 >> 2)
431 +#define CS_MAP 0xf
432 +#define COLUMN_SIZE 0x2
433 +#define ADDR_PINS 0x1
434 +#define APREBIT 0xa
435 +
436 +#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \
437 + ADDR_PINS << 8 | APREBIT)
438 +
439 +void mxs_adjust_memory_params(uint32_t *dram_vals)
440 +{
441 + dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
442 +}
443 +
444 +void board_init_ll(const uint32_t arg, const uint32_t *resptr)
445 +{
446 + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
447 +
448 + gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17);
449 +
450 + if (gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17))
451 + mxs_iomux_setup_multiple_pads(iomux_setup_v2, ARRAY_SIZE(iomux_setup_v2));
452 + else
453 + mxs_iomux_setup_multiple_pads(iomux_setup_v1, ARRAY_SIZE(iomux_setup_v1));
454 +}
455 --- /dev/null
456 +++ b/configs/duckbill_defconfig
457 @@ -0,0 +1,38 @@
458 +CONFIG_ARM=y
459 +CONFIG_ARCH_MX28=y
460 +CONFIG_SYS_TEXT_BASE=0x40002000
461 +CONFIG_SPL_GPIO_SUPPORT=y
462 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
463 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
464 +CONFIG_TARGET_DUCKBILL=y
465 +CONFIG_SPL_SERIAL_SUPPORT=y
466 +CONFIG_SPL=y
467 +CONFIG_NR_DRAM_BANKS=1
468 +CONFIG_BOOTDELAY=1
469 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
470 +CONFIG_VERSION_VARIABLE=y
471 +# CONFIG_DISPLAY_BOARDINFO is not set
472 +CONFIG_ARCH_MISC_INIT=y
473 +# CONFIG_SPL_FRAMEWORK is not set
474 +CONFIG_HUSH_PARSER=y
475 +CONFIG_CMD_BOOTZ=y
476 +# CONFIG_CMD_ELF is not set
477 +CONFIG_CMD_UNZIP=y
478 +# CONFIG_CMD_FLASH is not set
479 +CONFIG_CMD_FUSE=y
480 +CONFIG_CMD_GPIO=y
481 +CONFIG_CMD_MMC=y
482 +CONFIG_CMD_MMC_SWRITE=y
483 +CONFIG_CMD_DHCP=y
484 +CONFIG_CMD_MII=y
485 +CONFIG_CMD_PING=y
486 +CONFIG_CMD_EXT4=y
487 +CONFIG_CMD_EXT4_WRITE=y
488 +CONFIG_CMD_FS_GENERIC=y
489 +CONFIG_DOS_PARTITION=y
490 +CONFIG_ENV_IS_IN_MMC=y
491 +CONFIG_MMC_MXS=y
492 +CONFIG_MII=y
493 +CONFIG_CONS_INDEX=0
494 +CONFIG_OF_LIBFDT=y
495 +# CONFIG_EFI_LOADER is not set
496 --- /dev/null
497 +++ b/include/configs/duckbill.h
498 @@ -0,0 +1,179 @@
499 +/* SPDX-License-Identifier: GPL-2.0+ */
500 +/*
501 + * Copyright (C) 2014-2018 Michael Heimpold <mhei@heimpold.de>
502 + *
503 + */
504 +#ifndef __CONFIGS_DUCKBILL_H__
505 +#define __CONFIGS_DUCKBILL_H__
506 +
507 +/* System configurations */
508 +#define CONFIG_MACH_TYPE MACH_TYPE_DUCKBILL
509 +
510 +#define CONFIG_MISC_INIT_R
511 +
512 +#define CONFIG_SYS_MXS_VDD5V_ONLY
513 +
514 +/* Memory configuration */
515 +#define PHYS_SDRAM_1 0x40000000 /* Base address */
516 +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
517 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
518 +
519 +/* Environment is in MMC */
520 +#define CONFIG_ENV_OVERWRITE
521 +#define CONFIG_ENV_SIZE (128 * 1024)
522 +#define CONFIG_ENV_OFFSET (128 * 1024)
523 +#define CONFIG_ENV_OFFSET_REDUND (256 * 1024)
524 +#define CONFIG_SYS_MMC_ENV_DEV 0
525 +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
526 +
527 +/* FEC Ethernet on SoC */
528 +#ifdef CONFIG_CMD_NET
529 +#define CONFIG_FEC_MXC
530 +#define CONFIG_MX28_FEC_MAC_IN_OCOTP
531 +#define CONFIG_FEC_MXC_MDIO_BASE MXS_ENET0_BASE
532 +#endif
533 +
534 +#define CONFIG_IPADDR 192.168.1.10
535 +#define CONFIG_SERVERIP 192.168.1.1
536 +#define CONFIG_NETMASK 255.255.255.0
537 +#define CONFIG_GATEWAYIP 192.168.1.254
538 +
539 +/* Boot Linux */
540 +#define CONFIG_BOOTDELAY 1
541 +#define CONFIG_BOOTFILE "zImage"
542 +#define CONFIG_LOADADDR 0x42000000
543 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
544 +#define CONFIG_REVISION_TAG
545 +#define CONFIG_SERIAL_TAG
546 +#define CONFIG_OF_BOARD_SETUP
547 +#define CONFIG_BOOT_RETRY_TIME 120 /* retry autoboot after 120 seconds */
548 +#define CONFIG_AUTOBOOT_KEYED
549 +#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
550 + "press <c> to stop\n"
551 +#define CONFIG_AUTOBOOT_DELAY_STR "\x63" /* allows retry after retry time */
552 +#define CONFIG_AUTOBOOT_STOP_STR " " /* stop autoboot with <Space> */
553 +#define CONFIG_RESET_TO_RETRY /* reset board to retry booting */
554 +
555 +/* Extra Environment */
556 +#define CONFIG_EXTRA_ENV_SETTINGS \
557 + "mmc_part2_offset=1000\0" \
558 + "mmc_part3_offset=19000\0" \
559 + "update_openwrt_firmware_filename=openwrt-mxs-root.ext4\0" \
560 + "update_openwrt_firmware=" \
561 + "if mmc rescan; then " \
562 + "if tftp ${update_openwrt_firmware_filename}; then " \
563 + "setexpr fw_sz ${filesize} + 1ff; " \
564 + "setexpr fw_sz ${fw_sz} / 200; " \
565 + "mmc write ${loadaddr} ${mmc_part2_offset} ${fw_sz}; " \
566 + "mmc write ${loadaddr} ${mmc_part3_offset} ${fw_sz}; " \
567 + "fi; " \
568 + "fi\0" \
569 + "update_fw_filename_prefix=emmc.img.\0" \
570 + "update_fw_filename_suffix=.gz\0" \
571 + "update_fw_parts=0x6\0" \
572 + "update_fw_fsize_uncompressed=4000000\0" \
573 + "gzwrite_wbuf=100000\0" \
574 + "update_emmc_firmware=" \
575 + "setexpr i ${update_fw_parts}; setexpr error 0; " \
576 + "while itest ${i} -gt 0; do " \
577 + "echo Transfering firmware image part ${i} of ${update_fw_parts}; " \
578 + "if itest ${i} -le f; then " \
579 + "setenv j 0${i}; " \
580 + "else " \
581 + "setenv j ${i}; " \
582 + "fi; " \
583 + "if tftp ${loadaddr} ${update_fw_basedir}${update_fw_filename_prefix}${j}${update_fw_filename_suffix}; then " \
584 + "setexpr k ${i} - 1; " \
585 + "setexpr offset ${update_fw_fsize_uncompressed} * ${k}; " \
586 + "if gzwrite mmc ${mmcdev} ${loadaddr} ${filesize} ${gzwrite_wbuf} ${offset}; then " \
587 + "setexpr i ${i} - 1; " \
588 + "else " \
589 + "setexpr i 0; " \
590 + "setexpr error 1; " \
591 + "fi; " \
592 + "else " \
593 + "setexpr i 0; " \
594 + "setexpr error 1; " \
595 + "fi; " \
596 + "done; setenv i; setenv j; setenv k; setenv fsize; setenv filesize; setenv offset; " \
597 + "if test ${error} -eq 1; then " \
598 + "echo Firmware Update FAILED; " \
599 + "else " \
600 + "echo Firmware Update OK; " \
601 + "fi; setenv error\0" \
602 + "erase_mmc=mmc erase 0 2\0" \
603 + "erase_env1=mmc erase 100 100\0" \
604 + "erase_env2=mmc erase 200 100\0" \
605 + "image=zImage\0" \
606 + "console=ttyAMA0\0" \
607 + "fdt_addr=0x41000000\0" \
608 + "boot_fdt=try\0" \
609 + "ip_dyn=yes\0" \
610 + "bootsys=1\0" \
611 + "mmcdev=0\0" \
612 + "mmcpart=2\0" \
613 + "mmcroot=/dev/mmcblk0p2\0" \
614 + "mmcargs=setenv bootargs console=${console},${baudrate} " \
615 + "root=${mmcroot} " \
616 + "rootwait bootsys=${bootsys} panic=1\0" \
617 + "loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${image}\0" \
618 + "loadfdt=ext4load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/${fdt_file}\0" \
619 + "mmcboot=echo Booting from mmc ...; " \
620 + "setexpr mmcpart 1 + ${bootsys}; " \
621 + "setenv mmcroot /dev/mmcblk0p${mmcpart}; " \
622 + "run mmcargs; " \
623 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
624 + "if run loadfdt; then " \
625 + "bootz ${loadaddr} - ${fdt_addr}; " \
626 + "else " \
627 + "if test ${boot_fdt} = try; then " \
628 + "bootz; " \
629 + "else " \
630 + "echo WARN: Cannot load the DT; " \
631 + "fi; " \
632 + "fi; " \
633 + "else " \
634 + "bootz; " \
635 + "fi\0" \
636 + "nfsroot=/\0" \
637 + "netargs=setenv bootargs console=${console},${baudrate} " \
638 + "root=/dev/nfs " \
639 + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
640 + "netboot=echo Booting from net ...; " \
641 + "run netargs; " \
642 + "if test ${ip_dyn} = yes; then " \
643 + "setenv get_cmd dhcp; " \
644 + "else " \
645 + "setenv get_cmd tftp; " \
646 + "fi; " \
647 + "${get_cmd} ${image}; " \
648 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
649 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
650 + "bootz ${loadaddr} - ${fdt_addr}; " \
651 + "else " \
652 + "if test ${boot_fdt} = try; then " \
653 + "bootz; " \
654 + "else " \
655 + "echo WARN: Cannot load the DT; " \
656 + "fi;" \
657 + "fi; " \
658 + "else " \
659 + "bootz; " \
660 + "fi\0"
661 +
662 +#define CONFIG_BOOTCOMMAND \
663 + "mmc dev ${mmcdev}; " \
664 + "if mmc rescan; then " \
665 + "if run loadimage; then " \
666 + "run mmcboot; " \
667 + "else " \
668 + "run netboot; " \
669 + "fi; " \
670 + "else " \
671 + "run netboot; " \
672 + "fi"
673 +
674 +/* The rest of the configuration is shared */
675 +#include <configs/mxs.h>
676 +
677 +#endif /* __CONFIGS_DUCKBILL_H__ */