37146941c836b45070816a8554f3aea03d8bea26
[openwrt/staging/blogic.git] / package / boot / uboot-layerscape / patches / 0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch
1 From 9722009432a5553b11c8e0a04a275654de11dbc4 Mon Sep 17 00:00:00 2001
2 From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
3 Date: Mon, 13 Jun 2016 16:33:06 +0530
4 Subject: [PATCH 53/93] armv8: arch-fsl-layerscape: Update name of Soc
5
6 Update the name of the Soc.
7
8 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
9 ---
10 arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 14 +++++++-------
11 1 file changed, 7 insertions(+), 7 deletions(-)
12
13 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
14 index e4ff990..7a943be 100644
15 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
16 +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
17 @@ -8,13 +8,13 @@
18 #define _FSL_LAYERSCAPE_CPU_H
19
20 static struct cpu_type cpu_type_list[] = {
21 - CPU_TYPE_ENTRY(LS2080, LS2080, 8),
22 - CPU_TYPE_ENTRY(LS2085, LS2085, 8),
23 - CPU_TYPE_ENTRY(LS2045, LS2045, 4),
24 - CPU_TYPE_ENTRY(LS1043, LS1043, 4),
25 - CPU_TYPE_ENTRY(LS1023, LS1023, 2),
26 - CPU_TYPE_ENTRY(LS2040, LS2040, 4),
27 - CPU_TYPE_ENTRY(LS1012, LS1012, 1),
28 + CPU_TYPE_ENTRY(LS2080A, LS2080, 8),
29 + CPU_TYPE_ENTRY(LS2085A, LS2085, 8),
30 + CPU_TYPE_ENTRY(LS2045A, LS2045, 4),
31 + CPU_TYPE_ENTRY(LS1043A, LS1043, 4),
32 + CPU_TYPE_ENTRY(LS1023A, LS1023, 2),
33 + CPU_TYPE_ENTRY(LS2040A, LS2040, 4),
34 + CPU_TYPE_ENTRY(LS1012A, LS1012, 1),
35 };
36
37 #ifndef CONFIG_SYS_DCACHE_OFF
38 --
39 1.7.9.5
40