package/boot/uboot-layerscape/patches/0022-include-usb-Rename-USB-controller-base-address-mappi.patch

   1 From 46c9963880e5cba6390864477f19b25369c6c944 Mon Sep 17 00:00:00 2001
   2 From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
   3 Date: Thu, 5 May 2016 15:01:02 +0530
   4 Subject: [PATCH 22/93] include: usb: Rename USB controller base address
   5  mapping
   6
   7 [context adjustment]
   8
   9 Remove Soc specific defines and use generic chasis specific defines
  10 for USB controller base address mapping.
  11
  12 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
  13 Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
  14 ---
  15  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |    6 +++---
  16  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |    4 ++--
  17  arch/arm/include/asm/arch-ls102xa/config.h         |    6 ++----
  18  include/linux/usb/xhci-fsl.h                       |   20 ++++++++------------
  19  include/usb/ehci-fsl.h                             |    2 +-
  20  5 files changed, 16 insertions(+), 22 deletions(-)
  21
  22 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  23 index 414a222..3e37f00 100644
  24 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  25 +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  26 @@ -33,9 +33,9 @@
  27  #define CONFIG_SYS_NS16550_COM2                        (CONFIG_SYS_IMMR + 0x011c0600)
  28  #define CONFIG_SYS_NS16550_COM3                        (CONFIG_SYS_IMMR + 0x011d0500)
  29  #define CONFIG_SYS_NS16550_COM4                        (CONFIG_SYS_IMMR + 0x011d0600)
  30 -#define CONFIG_SYS_LS1043A_XHCI_USB1_ADDR      (CONFIG_SYS_IMMR + 0x01f00000)
  31 -#define CONFIG_SYS_LS1043A_XHCI_USB2_ADDR      (CONFIG_SYS_IMMR + 0x02000000)
  32 -#define CONFIG_SYS_LS1043A_XHCI_USB3_ADDR      (CONFIG_SYS_IMMR + 0x02100000)
  33 +#define CONFIG_SYS_XHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x01f00000)
  34 +#define CONFIG_SYS_XHCI_USB2_ADDR              (CONFIG_SYS_IMMR + 0x02000000)
  35 +#define CONFIG_SYS_XHCI_USB3_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
  36  #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
  37  #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
  38  #define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
  39 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
  40 index 0ab709c..cf1f37a 100644
  41 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
  42 +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
  43 @@ -51,8 +51,8 @@
  44  #define I2C3_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x01020000)
  45  #define I2C4_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x01030000)
  46
  47 -#define CONFIG_SYS_LS2080A_XHCI_USB1_ADDR      (CONFIG_SYS_IMMR + 0x02100000)
  48 -#define CONFIG_SYS_LS2080A_XHCI_USB2_ADDR      (CONFIG_SYS_IMMR + 0x02110000)
  49 +#define CONFIG_SYS_XHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
  50 +#define CONFIG_SYS_XHCI_USB2_ADDR              (CONFIG_SYS_IMMR + 0x02110000)
  51
  52  /* TZ Address Space Controller Definitions */
  53  #define TZASC1_BASE                    0x01100000      /* as per CCSR map. */
  54 diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
  55 index 926ac58..05fff80 100644
  56 --- a/arch/arm/include/asm/arch-ls102xa/config.h
  57 +++ b/arch/arm/include/asm/arch-ls102xa/config.h
  58 @@ -36,13 +36,11 @@
  59  #define CONFIG_SYS_NS16550_COM1                        (CONFIG_SYS_IMMR + 0x011c0500)
  60  #define CONFIG_SYS_NS16550_COM2                        (CONFIG_SYS_IMMR + 0x011d0500)
  61  #define CONFIG_SYS_DCU_ADDR                    (CONFIG_SYS_IMMR + 0x01ce0000)
  62 -#define CONFIG_SYS_LS102XA_XHCI_USB1_ADDR      (CONFIG_SYS_IMMR + 0x02100000)
  63 -#define CONFIG_SYS_LS102XA_USB1_ADDR \
  64 -       (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET)
  65 +#define CONFIG_SYS_XHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
  66 +#define CONFIG_SYS_EHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x07600000)
  67
  68  #define CONFIG_SYS_FSL_SEC_OFFSET              0x00700000
  69  #define CONFIG_SYS_FSL_JR0_OFFSET              0x00710000
  70 -#define CONFIG_SYS_LS102XA_USB1_OFFSET         0x07600000
  71  #define CONFIG_SYS_TSEC1_OFFSET                        0x01d10000
  72  #define CONFIG_SYS_TSEC2_OFFSET                        0x01d50000
  73  #define CONFIG_SYS_TSEC3_OFFSET                        0x01d90000
  74 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
  75 index 7ab88c3..b2b3264 100644
  76 --- a/include/linux/usb/xhci-fsl.h
  77 +++ b/include/linux/usb/xhci-fsl.h
  78 @@ -54,22 +54,18 @@ struct fsl_xhci {
  79         struct dwc3 *dwc3_reg;
  80  };
  81
  82 -#if defined(CONFIG_LS102XA)
  83 -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR
  84 +#if defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A)
  85 +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
  86  #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
  87  #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
  88  #elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
  89 -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2080A_XHCI_USB1_ADDR
  90 -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2080A_XHCI_USB2_ADDR
  91 -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
  92 -#elif defined(CONFIG_LS1043A) || defined(CONFIG_LS1012A)
  93 -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS1043A_XHCI_USB1_ADDR
  94 -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS1043A_XHCI_USB2_ADDR
  95 -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_LS1043A_XHCI_USB3_ADDR
  96 -#elif defined(CONFIG_LS1012A)
  97 -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS1043A_XHCI_USB1_ADDR
  98 -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
  99 +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 100 +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
 101  #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
 102 +#elif defined(CONFIG_LS1043A)
 103 +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 104 +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
 105 +#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR
 106  #endif
 107
 108  #define FSL_USB_XHCI_ADDR      {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \
 109 diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
 110 index e9349b5..b8d78d0 100644
 111 --- a/include/usb/ehci-fsl.h
 112 +++ b/include/usb/ehci-fsl.h
 113 @@ -164,7 +164,7 @@
 114  #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
 115  #define CONFIG_SYS_FSL_USB2_ADDR       0
 116  #elif defined(CONFIG_LS102XA)
 117 -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_LS102XA_USB1_ADDR
 118 +#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
 119  #define CONFIG_SYS_FSL_USB2_ADDR        0
 120  #endif
 121
 122 --
 123 1.7.9.5
 124