rbcfg: Implement CPU frequency control
[openwrt/staging/pepe2k.git] / package / boot / rbcfg / src / rbcfg.h
1 /*
2 * Mikrotik's RouterBOOT configuration defines
3 *
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 */
11
12 #ifndef _RBCFG_H
13 #define _RBCFG_H
14
15 /*
16 * Magic numbers
17 */
18 #define RB_MAGIC_SOFT 0x74666f53 /* 'Soft' */
19
20 /*
21 * ID values for Software settings
22 */
23 #define RB_ID_TERMINATOR 0
24 #define RB_ID_UART_SPEED 1
25 #define RB_ID_BOOT_DELAY 2
26 #define RB_ID_BOOT_DEVICE 3
27 #define RB_ID_BOOT_KEY 4
28 #define RB_ID_CPU_MODE 5
29 #define RB_ID_FW_VERSION 6
30 #define RB_ID_SOFT_07 7
31 #define RB_ID_SOFT_08 8
32 #define RB_ID_BOOT_PROTOCOL 9
33 #define RB_ID_SOFT_10 10
34 #define RB_ID_SOFT_11 11
35 #define RB_ID_CPU_FREQ 12
36 #define RB_ID_BOOTER 13
37
38 #define RB_UART_SPEED_115200 0
39 #define RB_UART_SPEED_57600 1
40 #define RB_UART_SPEED_38400 2
41 #define RB_UART_SPEED_19200 3
42 #define RB_UART_SPEED_9600 4
43 #define RB_UART_SPEED_4800 5
44 #define RB_UART_SPEED_2400 6
45 #define RB_UART_SPEED_1200 7
46 #define RB_UART_SPEED_OFF 8
47
48 #define RB_BOOT_DELAY_1SEC 1
49 #define RB_BOOT_DELAY_2SEC 2
50 #define RB_BOOT_DELAY_3SEC 3
51 #define RB_BOOT_DELAY_4SEC 4
52 #define RB_BOOT_DELAY_5SEC 5
53 #define RB_BOOT_DELAY_6SEC 6
54 #define RB_BOOT_DELAY_7SEC 7
55 #define RB_BOOT_DELAY_8SEC 8
56 #define RB_BOOT_DELAY_9SEC 9
57
58 #define RB_BOOT_DEVICE_ETHER 0
59 #define RB_BOOT_DEVICE_NANDETH 1
60 #define RB_BOOT_DEVICE_CFCARD 2
61 #define RB_BOOT_DEVICE_ETHONCE 3
62 #define RB_BOOT_DEVICE_NANDONLY 5
63 #define RB_BOOT_DEVICE_FLASHCFG 7
64 #define RB_BOOT_DEVICE_FLSHONCE 8
65
66 #define RB_BOOT_KEY_ANY 0
67 #define RB_BOOT_KEY_DEL 1
68
69 #define RB_CPU_MODE_POWERSAVE 0
70 #define RB_CPU_MODE_REGULAR 1
71
72 #define RB_BOOT_PROTOCOL_BOOTP 0
73 #define RB_BOOT_PROTOCOL_DHCP 1
74
75 #define RB_CPU_FREQ_L2 (0 << 3)
76 #define RB_CPU_FREQ_L1 (1 << 3)
77 #define RB_CPU_FREQ_N0 (2 << 3)
78 #define RB_CPU_FREQ_H1 (3 << 3)
79 #define RB_CPU_FREQ_H2 (4 << 3)
80 #define RB_CPU_FREQ_H3 (5 << 3)
81
82 #define RB_BOOTER_REGULAR 0
83 #define RB_BOOTER_BACKUP 1
84
85 #endif /* _RBCFG_H */