mediatek: bpi-r4: dts: move common parts to dtsi file
[openwrt/staging/pepe2k.git] / target / linux / mediatek / files-6.6 / arch / arm64 / boot / dts / mediatek / mt7988a-bananapi-bpi-r4.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include "mt7988a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
13
14 / {
15 model = "Bananapi BPI-R4";
16 compatible = "bananapi,bpi-r4",
17 "mediatek,mt7988a";
18
19 aliases {
20 serial0 = &uart0;
21 led-boot = &led_green;
22 led-failsafe = &led_green;
23 led-running = &led_green;
24 led-upgrade = &led_green;
25 };
26
27 chosen {
28 stdout-path = &uart0;
29 bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0";
30 rootdisk-spim-nand = <&ubi_rootfs>;
31 };
32
33 memory {
34 reg = <0x00 0x40000000 0x00 0x10000000>;
35 };
36
37 /* SFP1 cage (WAN) */
38 sfp1: sfp1 {
39 compatible = "sff,sfp";
40 i2c-bus = <&i2c_sfp1>;
41 los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
42 mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
43 tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
44 tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
45 rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
46 maximum-power-milliwatt = <3000>;
47 };
48
49 gpio-keys {
50 compatible = "gpio-keys";
51
52 wps {
53 label = "WPS";
54 linux,code = <KEY_RESTART>;
55 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
56 };
57 };
58
59 gpio-leds {
60 compatible = "gpio-leds";
61
62 led_green: led-green {
63 function = LED_FUNCTION_STATUS;
64 color = <LED_COLOR_ID_GREEN>;
65 gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
66 default-state = "on";
67 };
68
69 led_blue: led-blue {
70 function = LED_FUNCTION_WPS;
71 color = <LED_COLOR_ID_BLUE>;
72 gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
73 default-state = "off";
74 };
75 };
76 };
77
78 &eth {
79 status = "okay";
80 };
81
82 &gmac0 {
83 status = "okay";
84 };
85
86 &gmac2 {
87 sfp = <&sfp1>;
88 managed = "in-band-status";
89 phy-mode = "usxgmii";
90 status = "okay";
91 };
92
93 &switch {
94 status = "okay";
95 };
96
97 &gsw_phy0 {
98 pinctrl-names = "gbe-led";
99 pinctrl-0 = <&gbe0_led0_pins>;
100 };
101
102 &gsw_port0 {
103 label = "wan";
104 };
105
106 &gsw_phy0_led0 {
107 status = "okay";
108 color = <LED_COLOR_ID_GREEN>;
109 };
110
111 &gsw_phy1 {
112 pinctrl-names = "gbe-led";
113 pinctrl-0 = <&gbe1_led0_pins>;
114 };
115
116 &gsw_phy1_led0 {
117 status = "okay";
118 color = <LED_COLOR_ID_GREEN>;
119 };
120
121 &gsw_phy2 {
122 pinctrl-names = "gbe-led";
123 pinctrl-0 = <&gbe2_led0_pins>;
124 };
125
126 &gsw_phy2_led0 {
127 status = "okay";
128 color = <LED_COLOR_ID_GREEN>;
129 };
130
131 &gsw_phy3 {
132 pinctrl-names = "gbe-led";
133 pinctrl-0 = <&gbe3_led0_pins>;
134 };
135
136 &gsw_phy3_led0 {
137 status = "okay";
138 color = <LED_COLOR_ID_GREEN>;
139 };
140
141 &cpu0 {
142 proc-supply = <&rt5190_buck3>;
143 };
144
145 &cpu1 {
146 proc-supply = <&rt5190_buck3>;
147 };
148
149 &cpu2 {
150 proc-supply = <&rt5190_buck3>;
151 };
152
153 &cpu3 {
154 proc-supply = <&rt5190_buck3>;
155 };
156
157 &cci {
158 proc-supply = <&rt5190_buck3>;
159 };
160
161 &i2c0 {
162 pinctrl-names = "default";
163 pinctrl-0 = <&i2c0_pins>;
164 status = "okay";
165
166 rt5190a_64: rt5190a@64 {
167 compatible = "richtek,rt5190a";
168 reg = <0x64>;
169 vin2-supply = <&rt5190_buck1>;
170 vin3-supply = <&rt5190_buck1>;
171 vin4-supply = <&rt5190_buck1>;
172
173 regulators {
174 rt5190_buck1: buck1 {
175 regulator-name = "rt5190a-buck1";
176 regulator-min-microvolt = <5090000>;
177 regulator-max-microvolt = <5090000>;
178 regulator-allowed-modes =
179 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
180 regulator-boot-on;
181 regulator-always-on;
182 };
183 buck2 {
184 regulator-name = "vcore";
185 regulator-min-microvolt = <600000>;
186 regulator-max-microvolt = <1400000>;
187 regulator-boot-on;
188 regulator-always-on;
189 };
190 rt5190_buck3: buck3 {
191 regulator-name = "vproc";
192 regulator-min-microvolt = <600000>;
193 regulator-max-microvolt = <1400000>;
194 regulator-boot-on;
195 };
196 buck4 {
197 regulator-name = "rt5190a-buck4";
198 regulator-min-microvolt = <850000>;
199 regulator-max-microvolt = <850000>;
200 regulator-allowed-modes =
201 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
202 regulator-boot-on;
203 regulator-always-on;
204 };
205 ldo {
206 regulator-name = "rt5190a-ldo";
207 regulator-min-microvolt = <1200000>;
208 regulator-max-microvolt = <1200000>;
209 regulator-boot-on;
210 regulator-always-on;
211 };
212 };
213 };
214 };
215
216 &i2c2 {
217 pinctrl-names = "default";
218 pinctrl-0 = <&i2c2_1_pins>;
219 status = "okay";
220
221 pca9545: i2c-switch@70 {
222 reg = <0x70>;
223 compatible = "nxp,pca9545";
224 reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 i2c_rtc: i2c@0 { //eeprom,rtc,ngff
229 #address-cells = <1>;
230 #size-cells = <0>;
231 reg = <0>;
232
233 eeprom@50 {
234 compatible = "atmel,24c02";
235 reg = <0x50>;
236 address-bits = <8>;
237 page-size = <8>;
238 size = <256>;
239 };
240
241 eeprom@57 {
242 compatible = "atmel,24c02";
243 reg = <0x57>;
244 address-bits = <8>;
245 page-size = <8>;
246 size = <256>;
247 };
248
249 pcf8563: rtc@51 {
250 compatible = "nxp,pcf8563";
251 reg = <0x51>;
252 status = "disabled";
253 };
254 };
255
256 i2c_sfp1: i2c@1 {
257 #address-cells = <1>;
258 #size-cells = <0>;
259 reg = <1>;
260 };
261
262 i2c_wifi: i2c@3 {
263 #address-cells = <1>;
264 #size-cells = <0>;
265 reg = <3>;
266 };
267 };
268 };
269
270 /* mPCIe SIM2 */
271 &pcie0 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&pcie0_pins>;
274 status = "okay";
275 };
276
277 /* mPCIe SIM3 */
278 &pcie1 {
279 pinctrl-names = "default";
280 pinctrl-0 = <&pcie1_pins>;
281 status = "okay";
282 };
283
284 /* M.2 key-B SIM1 */
285 &pcie2 {
286 pinctrl-names = "default";
287 pinctrl-0 = <&pcie2_pins>;
288 status = "okay";
289 };
290
291 /* M.2 key-M SSD */
292 &pcie3 {
293 pinctrl-names = "default";
294 pinctrl-0 = <&pcie3_pins>;
295 status = "okay";
296 };
297
298 &ssusb1 {
299 status = "okay";
300 };
301
302 &tphy {
303 status = "okay";
304 };
305
306 &spi0 {
307 pinctrl-names = "default";
308 pinctrl-0 = <&spi0_flash_pins>;
309 status = "okay";
310
311 spi_nand: spi_nand@0 {
312 compatible = "spi-nand";
313 reg = <0>;
314 spi-max-frequency = <52000000>;
315 spi-tx-buswidth = <4>;
316 spi-rx-buswidth = <4>;
317 };
318 };
319
320 &spi_nand {
321 partitions {
322 compatible = "fixed-partitions";
323 #address-cells = <1>;
324 #size-cells = <1>;
325
326 partition@0 {
327 label = "bl2";
328 reg = <0x0 0x200000>;
329 read-only;
330 };
331
332 partition@200000 {
333 label = "ubi";
334 reg = <0x200000 0x7e00000>;
335 compatible = "linux,ubi";
336
337 volumes {
338 ubi-volume-ubootenv {
339 volname = "ubootenv";
340 nvmem-layout {
341 compatible = "u-boot,env-redundant-bool-layout";
342 };
343 };
344
345 ubi-volume-ubootenv2 {
346 volname = "ubootenv2";
347 nvmem-layout {
348 compatible = "u-boot,env-redundant-bool-layout";
349 };
350 };
351
352 ubi_rootfs: ubi-volume-fit {
353 volname = "fit";
354 };
355 };
356 };
357 };
358 };
359
360 &uart0 {
361 status = "okay";
362 };
363
364 &uart1 {
365 status = "okay";
366 pinctrl-names = "default";
367 pinctrl-0 = <&uart1_2_lite_pins>;
368 };
369
370 &uart2 {
371 status = "okay";
372 pinctrl-names = "default";
373 pinctrl-0 = <&uart2_3_pins>;
374 };
375
376 &watchdog {
377 status = "okay";
378 };
379
380 &xphy {
381 status = "okay";
382 };