ramips: remove unnecessary macros for previous kernel versions
[openwrt/openwrt.git] / target / linux / ramips / files / drivers / pinctrl / pinctrl-aw9523.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Awinic AW9523B i2c pin controller driver
4 * Copyright (c) 2020, AngeloGioacchino Del Regno
5 * <angelogioacchino.delregno@somainline.org>
6 */
7
8 #include <linux/bitfield.h>
9 #include <linux/regmap.h>
10 #include <linux/i2c.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/mutex.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/pinctrl/pinconf.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
24 #include <linux/pinctrl/pinconf-generic.h>
25 #include <linux/regulator/consumer.h>
26
27 #include "core.h"
28 #include "pinconf.h"
29 #include "pinctrl-utils.h"
30
31 #define AW9523_MAX_FUNCS 2
32 #define AW9523_NUM_PORTS 2
33 #define AW9523_PINS_PER_PORT 8
34
35 /*
36 * HW needs at least 20uS for reset and at least 1-2uS to recover from
37 * reset, but we have to account for eventual board quirks, if any:
38 * for this reason, keep reset asserted for 50uS and wait for 20uS
39 * to recover from the reset.
40 */
41 #define AW9523_HW_RESET_US 50
42 #define AW9523_HW_RESET_RECOVERY_US 20
43
44 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */
45 #define AW9523_PIN_TO_PORT(pin) (pin >> 3)
46 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin))
47 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin))
48 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin))
49 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin))
50 #define AW9523_REG_CHIPID 0x10
51 #define AW9523_VAL_EXPECTED_CHIPID 0x23
52
53 #define AW9523_REG_GCR 0x11
54 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1)
55 #define AW9523_GCR_GPOMD_MASK BIT(4)
56
57 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin))
58 #define AW9523_REG_SOFT_RESET 0x7f
59 #define AW9523_VAL_RESET 0x00
60
61 /*
62 * struct aw9523_irq - Interrupt controller structure
63 * @lock: mutex locking for the irq bus
64 * @irqchip: structure holding irqchip params
65 * @cached_gpio: stores the previous gpio status for bit comparison
66 */
67 struct aw9523_irq {
68 struct mutex lock;
69 struct irq_chip *irqchip;
70 u16 cached_gpio;
71 };
72
73 /*
74 * struct aw9523_pinmux - Pin mux params
75 * @name: Name of the mux
76 * @grps: Groups of the mux
77 * @num_grps: Number of groups (sizeof array grps)
78 */
79 struct aw9523_pinmux {
80 const char *name;
81 const char * const *grps;
82 const u8 num_grps;
83 };
84
85 /*
86 * struct aw9523 - Main driver structure
87 * @dev: device handle
88 * @regmap: regmap handle for current device
89 * @i2c_lock: Mutex lock for i2c operations
90 * @reset_gpio: Hardware reset (RSTN) signal GPIO
91 * @vio_vreg: VCC regulator (Optional)
92 * @pctl: pinctrl handle for current device
93 * @gpio: structure holding gpiochip params
94 * @irq: Interrupt controller structure
95 */
96 struct aw9523 {
97 struct device *dev;
98 struct regmap *regmap;
99 struct mutex i2c_lock;
100 struct gpio_desc *reset_gpio;
101 struct regulator *vio_vreg;
102 struct pinctrl_dev *pctl;
103 struct gpio_chip gpio;
104 struct aw9523_irq *irq;
105 };
106
107 static const struct pinctrl_pin_desc aw9523_pins[] = {
108 /* Port 0 */
109 PINCTRL_PIN(0, "gpio0"),
110 PINCTRL_PIN(1, "gpio1"),
111 PINCTRL_PIN(2, "gpio2"),
112 PINCTRL_PIN(3, "gpio3"),
113 PINCTRL_PIN(4, "gpio4"),
114 PINCTRL_PIN(5, "gpio5"),
115 PINCTRL_PIN(6, "gpio6"),
116 PINCTRL_PIN(7, "gpio7"),
117
118 /* Port 1 */
119 PINCTRL_PIN(8, "gpio8"),
120 PINCTRL_PIN(9, "gpio9"),
121 PINCTRL_PIN(10, "gpio10"),
122 PINCTRL_PIN(11, "gpio11"),
123 PINCTRL_PIN(12, "gpio12"),
124 PINCTRL_PIN(13, "gpio13"),
125 PINCTRL_PIN(14, "gpio14"),
126 PINCTRL_PIN(15, "gpio15"),
127 };
128
129 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
130 {
131 return ARRAY_SIZE(aw9523_pins);
132 }
133
134 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
135 unsigned int selector)
136 {
137 return aw9523_pins[selector].name;
138 }
139
140 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
141 unsigned int selector,
142 const unsigned int **pins,
143 unsigned int *num_pins)
144 {
145 *pins = &aw9523_pins[selector].number;
146 *num_pins = 1;
147 return 0;
148 }
149
150 static const struct pinctrl_ops aw9523_pinctrl_ops = {
151 .get_groups_count = aw9523_pinctrl_get_groups_count,
152 .get_group_pins = aw9523_pinctrl_get_group_pins,
153 .get_group_name = aw9523_pinctrl_get_group_name,
154 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
155 .dt_free_map = pinconf_generic_dt_free_map,
156 };
157
158 static const char * const gpio_pwm_groups[] = {
159 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
160 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11",
161 "gpio12", "gpio13", "gpio14", "gpio15"
162 };
163
164 /* Warning: Do NOT reorder this array */
165 static const struct aw9523_pinmux aw9523_pmx[] = {
166 {
167 .name = "pwm",
168 .grps = gpio_pwm_groups,
169 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
170 },
171 {
172 .name = "gpio",
173 .grps = gpio_pwm_groups,
174 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
175 },
176 };
177
178 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl)
179 {
180 return ARRAY_SIZE(aw9523_pmx);
181 }
182
183 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl,
184 unsigned int sel)
185 {
186 return aw9523_pmx[sel].name;
187 }
188
189 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel,
190 const char * const **groups,
191 unsigned int * const num_groups)
192 {
193 *groups = aw9523_pmx[sel].grps;
194 *num_groups = aw9523_pmx[sel].num_grps;
195 return 0;
196 }
197
198 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel,
199 unsigned int grp)
200 {
201 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl);
202 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT;
203
204 if (fsel >= ARRAY_SIZE(aw9523_pmx))
205 return -EINVAL;
206
207 /*
208 * This maps directly to the aw9523_pmx array: programming a
209 * high bit means "gpio" and a low bit means "pwm".
210 */
211 mutex_lock(&awi->i2c_lock);
212 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin),
213 BIT(pin), (fsel ? BIT(pin) : 0));
214 mutex_unlock(&awi->i2c_lock);
215 return ret;
216 }
217
218 static const struct pinmux_ops aw9523_pinmux_ops = {
219 .get_functions_count = aw9523_pmx_get_funcs_count,
220 .get_function_name = aw9523_pmx_get_fname,
221 .get_function_groups = aw9523_pmx_get_groups,
222 .set_mux = aw9523_pmx_set_mux,
223 };
224
225 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
226 {
227 u8 reg;
228
229 switch (pcp) {
230 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
231 case PIN_CONFIG_BIAS_PULL_DOWN:
232 case PIN_CONFIG_BIAS_PULL_UP:
233 reg = AW9523_REG_IN_STATE(pin);
234 break;
235 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
236 case PIN_CONFIG_DRIVE_PUSH_PULL:
237 reg = AW9523_REG_GCR;
238 break;
239 case PIN_CONFIG_INPUT_ENABLE:
240 case PIN_CONFIG_OUTPUT_ENABLE:
241 reg = AW9523_REG_CONF_STATE(pin);
242 break;
243 case PIN_CONFIG_OUTPUT:
244 reg = AW9523_REG_OUT_STATE(pin);
245 break;
246 default:
247 return -ENOTSUPP;
248 }
249 *r = reg;
250
251 return 0;
252 }
253
254 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
255 unsigned long *config)
256 {
257 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
258 enum pin_config_param param = pinconf_to_config_param(*config);
259 int regbit = pin % AW9523_PINS_PER_PORT;
260 unsigned int val;
261 u8 reg;
262 int rc;
263
264 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
265 if (rc)
266 return rc;
267
268 mutex_lock(&awi->i2c_lock);
269 rc = regmap_read(awi->regmap, reg, &val);
270 mutex_unlock(&awi->i2c_lock);
271 if (rc)
272 return rc;
273
274 switch (param) {
275 case PIN_CONFIG_BIAS_PULL_UP:
276 case PIN_CONFIG_INPUT_ENABLE:
277 case PIN_CONFIG_OUTPUT:
278 val &= BIT(regbit);
279 break;
280 case PIN_CONFIG_BIAS_PULL_DOWN:
281 case PIN_CONFIG_OUTPUT_ENABLE:
282 val &= BIT(regbit);
283 val = !val;
284 break;
285 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
286 if (pin >= AW9523_PINS_PER_PORT)
287 val = 0;
288 else
289 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
290 break;
291 case PIN_CONFIG_DRIVE_PUSH_PULL:
292 if (pin >= AW9523_PINS_PER_PORT)
293 val = 1;
294 else
295 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
296 break;
297 default:
298 return -ENOTSUPP;
299 }
300 if (val < 1)
301 return -EINVAL;
302
303 *config = pinconf_to_config_packed(param, !!val);
304
305 return rc;
306 }
307
308 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
309 unsigned long *configs, unsigned int num_configs)
310 {
311 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
312 enum pin_config_param param;
313 int regbit = pin % AW9523_PINS_PER_PORT;
314 u32 arg;
315 u8 reg;
316 unsigned int mask, val;
317 int i, rc;
318
319 mutex_lock(&awi->i2c_lock);
320 for (i = 0; i < num_configs; i++) {
321 param = pinconf_to_config_param(configs[i]);
322 arg = pinconf_to_config_argument(configs[i]);
323
324 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
325 if (rc)
326 goto end;
327
328 switch (param) {
329 case PIN_CONFIG_OUTPUT:
330 /* First, enable pin output */
331 rc = regmap_update_bits(awi->regmap,
332 AW9523_REG_CONF_STATE(pin),
333 BIT(regbit), 0);
334 if (rc)
335 goto end;
336
337 /* Then, fall through to config output level */
338 fallthrough;
339 case PIN_CONFIG_OUTPUT_ENABLE:
340 arg = !arg;
341 fallthrough;
342 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
343 case PIN_CONFIG_BIAS_PULL_DOWN:
344 case PIN_CONFIG_BIAS_PULL_UP:
345 case PIN_CONFIG_INPUT_ENABLE:
346 mask = BIT(regbit);
347 val = arg ? BIT(regbit) : 0;
348 break;
349 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
350 /* Open-Drain is supported only on port 0 */
351 if (pin >= AW9523_PINS_PER_PORT) {
352 rc = -ENOTSUPP;
353 goto end;
354 }
355 mask = AW9523_GCR_GPOMD_MASK;
356 val = 0;
357 break;
358 case PIN_CONFIG_DRIVE_PUSH_PULL:
359 /* Port 1 is always Push-Pull */
360 if (pin >= AW9523_PINS_PER_PORT) {
361 mask = 0;
362 val = 0;
363 continue;
364 }
365 mask = AW9523_GCR_GPOMD_MASK;
366 val = AW9523_GCR_GPOMD_MASK;
367 break;
368 default:
369 rc = -ENOTSUPP;
370 goto end;
371 }
372
373 rc = regmap_update_bits(awi->regmap, reg, mask, val);
374 if (rc)
375 goto end;
376 }
377 end:
378 mutex_unlock(&awi->i2c_lock);
379 return rc;
380 }
381
382 static const struct pinconf_ops aw9523_pinconf_ops = {
383 .pin_config_get = aw9523_pconf_get,
384 .pin_config_set = aw9523_pconf_set,
385 .is_generic = true,
386 };
387
388 /*
389 * aw9523_get_pin_direction - Get pin direction
390 * @regmap: Regmap structure
391 * @pin: gpiolib pin number
392 * @n: pin index in port register
393 *
394 * Return: Pin direction for success or negative number for error
395 */
396 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n)
397 {
398 int val, ret;
399
400 ret = regmap_read(regmap, AW9523_REG_CONF_STATE(pin), &val);
401 if (ret < 0)
402 return ret;
403
404 return (val & BIT(n)) == BIT(n);
405 }
406
407 /*
408 * aw9523_get_port_state - Get input or output state for entire port
409 * @regmap: Regmap structure
410 * @pin: gpiolib pin number
411 * @regbit: hw pin index, used to retrieve port number
412 * @state: returned port state
413 *
414 * Return: Zero for success or negative number for error
415 */
416 static int aw9523_get_port_state(struct regmap *regmap, u8 pin,
417 u8 regbit, unsigned int *state)
418 {
419 u8 reg;
420 int dir;
421
422 dir = aw9523_get_pin_direction(regmap, pin, regbit);
423 if (dir < 0)
424 return dir;
425
426 if (dir == GPIO_LINE_DIRECTION_IN)
427 reg = AW9523_REG_IN_STATE(pin);
428 else
429 reg = AW9523_REG_OUT_STATE(pin);
430
431 return regmap_read(regmap, reg, state);
432 }
433
434 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type)
435 {
436 switch (type) {
437 case IRQ_TYPE_NONE:
438 case IRQ_TYPE_EDGE_BOTH:
439 return 0;
440 default:
441 return -EINVAL;
442 };
443 }
444
445 /*
446 * aw9523_irq_mask - Mask interrupt
447 * @d: irq data
448 *
449 * Sets which interrupt to mask in the bitmap;
450 * The interrupt will be masked when unlocking the irq bus.
451 */
452 static void aw9523_irq_mask(struct irq_data *d)
453 {
454 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
455 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
456
457 regmap_update_bits(awi->regmap,
458 AW9523_REG_INTR_DIS(d->hwirq),
459 BIT(n), BIT(n));
460 }
461
462 /*
463 * aw9523_irq_unmask - Unmask interrupt
464 * @d: irq data
465 *
466 * Sets which interrupt to unmask in the bitmap;
467 * The interrupt will be masked when unlocking the irq bus.
468 */
469 static void aw9523_irq_unmask(struct irq_data *d)
470 {
471 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
472 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
473
474 regmap_update_bits(awi->regmap,
475 AW9523_REG_INTR_DIS(d->hwirq),
476 BIT(n), 0);
477 }
478
479 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id)
480 {
481 struct aw9523 *awi = (struct aw9523 *)dev_id;
482 unsigned long n, val = 0;
483 unsigned long changed_gpio;
484 unsigned int tmp, port_pin, i, ret;
485
486 for (i = 0; i < AW9523_NUM_PORTS; i++) {
487 port_pin = i * AW9523_PINS_PER_PORT;
488 ret = regmap_read(awi->regmap,
489 AW9523_REG_IN_STATE(port_pin),
490 &tmp);
491 if (ret)
492 return ret;
493 val |= (u8)tmp << (i * 8);
494 }
495
496 /* Handle GPIO input release interrupt as well */
497 changed_gpio = awi->irq->cached_gpio ^ val;
498 awi->irq->cached_gpio = val;
499
500 /*
501 * To avoid up to four *slow* i2c reads from any driver hooked
502 * up to our interrupts, just check for the irq_find_mapping
503 * result: if the interrupt is not mapped, then we don't want
504 * to care about it.
505 */
506 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) {
507 tmp = irq_find_mapping(awi->gpio.irq.domain, n);
508 if (tmp <= 0)
509 continue;
510 handle_nested_irq(tmp);
511 }
512
513 return IRQ_HANDLED;
514 }
515
516 /*
517 * aw9523_irq_bus_lock - Grab lock for interrupt operation
518 * @d: irq data
519 */
520 static void aw9523_irq_bus_lock(struct irq_data *d)
521 {
522 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
523
524 mutex_lock(&awi->irq->lock);
525 regcache_cache_only(awi->regmap, true);
526 }
527
528 /*
529 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock
530 * @d: irq data
531 *
532 * Writes the interrupt mask bits (found in the bit map) to the
533 * hardware, then unlocks the bus.
534 */
535 static void aw9523_irq_bus_sync_unlock(struct irq_data *d)
536 {
537 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
538
539 regcache_cache_only(awi->regmap, false);
540 regcache_sync(awi->regmap);
541 mutex_unlock(&awi->irq->lock);
542 }
543
544 static int aw9523_gpio_get_direction(struct gpio_chip *chip,
545 unsigned int offset)
546 {
547 struct aw9523 *awi = gpiochip_get_data(chip);
548 u8 regbit = offset % AW9523_PINS_PER_PORT;
549 int ret;
550
551 mutex_lock(&awi->i2c_lock);
552 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit);
553 mutex_unlock(&awi->i2c_lock);
554
555 return ret;
556 }
557
558 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset)
559 {
560 struct aw9523 *awi = gpiochip_get_data(chip);
561 u8 regbit = offset % AW9523_PINS_PER_PORT;
562 unsigned int val;
563 int ret;
564
565 mutex_lock(&awi->i2c_lock);
566 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val);
567 mutex_unlock(&awi->i2c_lock);
568 if (ret)
569 return ret;
570
571 return !!(val & BIT(regbit));
572 }
573
574 /**
575 * _aw9523_gpio_get_multiple - Get I/O state for an entire port
576 * @regmap: Regmap structure
577 * @pin: gpiolib pin number
578 * @regbit: hw pin index, used to retrieve port number
579 * @state: returned port I/O state
580 *
581 * Return: Zero for success or negative number for error
582 */
583 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit,
584 u8 *state, u8 mask)
585 {
586 u32 dir_in, val;
587 u8 m;
588 int ret;
589
590 /* Registers are 8-bits wide */
591 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in);
592 if (ret)
593 return ret;
594 *state = 0;
595
596 m = mask & dir_in;
597 if (m) {
598 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit),
599 &val);
600 if (ret)
601 return ret;
602 *state |= (u8)val & m;
603 }
604
605 m = mask & ~dir_in;
606 if (m) {
607 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit),
608 &val);
609 if (ret)
610 return ret;
611 *state |= (u8)val & m;
612 }
613
614 return 0;
615 }
616
617 static int aw9523_gpio_get_multiple(struct gpio_chip *chip,
618 unsigned long *mask,
619 unsigned long *bits)
620 {
621 struct aw9523 *awi = gpiochip_get_data(chip);
622 u8 m, state = 0;
623 int ret;
624
625 mutex_lock(&awi->i2c_lock);
626
627 /* Port 0 (gpio 0-7) */
628 m = *mask & U8_MAX;
629 if (m) {
630 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m);
631 if (ret)
632 goto out;
633 }
634 *bits = state;
635
636 /* Port 1 (gpio 8-15) */
637 m = (*mask >> 8) & U8_MAX;
638 if (m) {
639 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT,
640 &state, m);
641 if (ret)
642 goto out;
643
644 *bits |= (state << 8);
645 }
646 out:
647 mutex_unlock(&awi->i2c_lock);
648 return ret;
649 }
650
651 static void aw9523_gpio_set_multiple(struct gpio_chip *chip,
652 unsigned long *mask,
653 unsigned long *bits)
654 {
655 struct aw9523 *awi = gpiochip_get_data(chip);
656 u8 mask_lo, mask_hi, bits_lo, bits_hi;
657 unsigned int reg;
658 int ret = 0;
659
660 mask_lo = *mask & U8_MAX;
661 mask_hi = (*mask >> 8) & U8_MAX;
662 mutex_lock(&awi->i2c_lock);
663 if (mask_hi) {
664 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT);
665 bits_hi = (*bits >> 8) & U8_MAX;
666
667 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi);
668 if (ret) {
669 dev_warn(awi->dev, "Cannot write port1 out level\n");
670 goto out;
671 }
672 }
673 if (mask_lo) {
674 reg = AW9523_REG_OUT_STATE(0);
675 bits_lo = *bits & U8_MAX;
676 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo);
677 if (ret)
678 dev_warn(awi->dev, "Cannot write port0 out level\n");
679 }
680 out:
681 mutex_unlock(&awi->i2c_lock);
682 }
683
684 static void aw9523_gpio_set(struct gpio_chip *chip,
685 unsigned int offset, int value)
686 {
687 struct aw9523 *awi = gpiochip_get_data(chip);
688 u8 regbit = offset % AW9523_PINS_PER_PORT;
689
690 mutex_lock(&awi->i2c_lock);
691 regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
692 BIT(regbit), value ? BIT(regbit) : 0);
693 mutex_unlock(&awi->i2c_lock);
694 }
695
696
697 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset)
698 {
699 struct aw9523 *awi = gpiochip_get_data(chip);
700 u8 regbit = offset % AW9523_PINS_PER_PORT;
701 int ret;
702
703 mutex_lock(&awi->i2c_lock);
704 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
705 BIT(regbit), BIT(regbit));
706 mutex_unlock(&awi->i2c_lock);
707
708 return ret;
709 }
710
711 static int aw9523_direction_output(struct gpio_chip *chip,
712 unsigned int offset, int value)
713 {
714 struct aw9523 *awi = gpiochip_get_data(chip);
715 u8 regbit = offset % AW9523_PINS_PER_PORT;
716 int ret;
717
718 mutex_lock(&awi->i2c_lock);
719 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
720 BIT(regbit), value ? BIT(regbit) : 0);
721 if (ret)
722 goto end;
723
724 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
725 BIT(regbit), 0);
726 end:
727 mutex_unlock(&awi->i2c_lock);
728 return ret;
729 }
730
731 static int aw9523_drive_reset_gpio(struct aw9523 *awi)
732 {
733 unsigned int chip_id;
734 int ret;
735
736 /*
737 * If the chip is already configured for any reason, then we
738 * will probably succeed in sending the soft reset signal to
739 * the hardware through I2C: this operation takes less time
740 * compared to a full HW reset and it gives the same results.
741 */
742 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0);
743 if (ret == 0)
744 goto done;
745
746 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n");
747 ret = gpiod_direction_output(awi->reset_gpio, 0);
748 if (ret)
749 return ret;
750
751 /* The reset pulse has to be longer than 20uS due to deglitch */
752 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1);
753
754 ret = gpiod_direction_output(awi->reset_gpio, 1);
755 if (ret)
756 return ret;
757 done:
758 /* The HW needs at least 1uS to reliably recover after reset */
759 usleep_range(AW9523_HW_RESET_RECOVERY_US,
760 AW9523_HW_RESET_RECOVERY_US + 1);
761
762 /* Check the ChipID */
763 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id);
764 if (ret) {
765 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret);
766 return ret;
767 }
768 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) {
769 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n",
770 chip_id, AW9523_VAL_EXPECTED_CHIPID);
771 return -EINVAL;
772 }
773
774 return 0;
775 }
776
777 static int aw9523_hw_reset(struct aw9523 *awi)
778 {
779 int ret, max_retries = 2;
780
781 /* Sometimes the chip needs more than one reset cycle */
782 do {
783 ret = aw9523_drive_reset_gpio(awi);
784 if (ret == 0)
785 break;
786 max_retries--;
787 } while (max_retries);
788
789 return ret;
790 }
791
792 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins)
793 {
794 struct device *dev = awi->dev;
795 struct gpio_chip *gpiochip = &awi->gpio;
796
797 gpiochip->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
798 if (!gpiochip->label)
799 return -ENOMEM;
800
801 gpiochip->base = -1;
802 gpiochip->ngpio = npins;
803 gpiochip->get_direction = aw9523_gpio_get_direction;
804 gpiochip->direction_input = aw9523_direction_input;
805 gpiochip->direction_output = aw9523_direction_output;
806 gpiochip->get = aw9523_gpio_get;
807 gpiochip->get_multiple = aw9523_gpio_get_multiple;
808 gpiochip->set = aw9523_gpio_set;
809 gpiochip->set_multiple = aw9523_gpio_set_multiple;
810 gpiochip->set_config = gpiochip_generic_config;
811 gpiochip->parent = dev;
812 gpiochip->fwnode = dev->fwnode;
813 gpiochip->owner = THIS_MODULE;
814 gpiochip->can_sleep = true;
815
816 return 0;
817 }
818
819 static int aw9523_init_irq(struct aw9523 *awi, int irq)
820 {
821 struct device *dev = awi->dev;
822 struct gpio_irq_chip *gpioirq;
823 struct irq_chip *irqchip;
824 int ret;
825
826 if (!device_property_read_bool(dev, "interrupt-controller"))
827 return 0;
828
829 irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
830 if (!irqchip)
831 return -ENOMEM;
832
833 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL);
834 if (!awi->irq)
835 return -ENOMEM;
836
837 irqchip->name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
838 if (!irqchip->name)
839 return -ENOMEM;
840
841 irqchip->irq_mask = aw9523_irq_mask;
842 irqchip->irq_unmask = aw9523_irq_unmask;
843 irqchip->irq_bus_lock = aw9523_irq_bus_lock;
844 irqchip->irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock;
845 irqchip->irq_set_type = aw9523_gpio_irq_type;
846 awi->irq->irqchip = irqchip;
847 mutex_init(&awi->irq->lock);
848
849 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func,
850 IRQF_ONESHOT, dev_name(dev), awi);
851 if (ret) {
852 dev_err(dev, "Failed to request irq %d\n", irq);
853 return ret;
854 }
855
856 gpioirq = &awi->gpio.irq;
857 gpioirq->chip = irqchip;
858 gpioirq->parent_handler = NULL;
859 gpioirq->num_parents = 0;
860 gpioirq->parents = NULL;
861 gpioirq->default_type = IRQ_TYPE_LEVEL_MASK;
862 gpioirq->handler = handle_simple_irq;
863 gpioirq->threaded = true;
864 gpioirq->first = 0;
865
866 return 0;
867 }
868
869 static bool aw9523_is_reg_hole(unsigned int reg)
870 {
871 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) &&
872 reg < AW9523_REG_SOFT_RESET) ||
873 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) &&
874 reg < AW9523_REG_CHIPID);
875 }
876
877 static bool aw9523_readable_reg(struct device *dev, unsigned int reg)
878 {
879 /* All available registers (minus holes) can be read */
880 return !aw9523_is_reg_hole(reg);
881 }
882
883 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg)
884 {
885 return aw9523_is_reg_hole(reg) ||
886 reg == AW9523_REG_IN_STATE(0) ||
887 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) ||
888 reg == AW9523_REG_CHIPID ||
889 reg == AW9523_REG_SOFT_RESET;
890 }
891
892 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg)
893 {
894 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID;
895 }
896
897 static bool aw9523_precious_reg(struct device *dev, unsigned int reg)
898 {
899 /* Reading AW9523_REG_IN_STATE clears interrupt status */
900 return aw9523_is_reg_hole(reg) ||
901 reg == AW9523_REG_IN_STATE(0) ||
902 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT);
903 }
904
905 static const struct regmap_config aw9523_regmap = {
906 .reg_bits = 8,
907 .val_bits = 8,
908 .reg_stride = 1,
909
910 .precious_reg = aw9523_precious_reg,
911 .readable_reg = aw9523_readable_reg,
912 .volatile_reg = aw9523_volatile_reg,
913 .writeable_reg = aw9523_writeable_reg,
914
915 .cache_type = REGCACHE_FLAT,
916 .disable_locking = true,
917
918 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET,
919 };
920
921 static int aw9523_hw_init(struct aw9523 *awi)
922 {
923 u8 p1_pin = AW9523_PINS_PER_PORT;
924 unsigned int val;
925 int ret;
926
927 /* No register caching during initialization */
928 regcache_cache_bypass(awi->regmap, true);
929
930 /* Bring up the chip */
931 ret = aw9523_hw_reset(awi);
932 if (ret) {
933 dev_err(awi->dev, "HW Reset failed: %d\n", ret);
934 return ret;
935 }
936
937 /*
938 * This is the expected chip and it is running: it's time to
939 * set a safe default configuration in case the user doesn't
940 * configure (all of the available) pins in this chip.
941 * P.S.: The writes order doesn't matter.
942 */
943
944 /* Set all pins as GPIO */
945 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX);
946 if (ret)
947 return ret;
948 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX);
949 if (ret)
950 return ret;
951
952 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */
953 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0);
954 if (ret)
955 return ret;
956
957 /* Set all pins as inputs */
958 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX);
959 if (ret)
960 return ret;
961 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX);
962 if (ret)
963 return ret;
964
965 /* Disable all interrupts to avoid unreasoned wakeups */
966 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX);
967 if (ret)
968 return ret;
969 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX);
970 if (ret)
971 return ret;
972
973 /* Clear setup-generated interrupts by performing a port state read */
974 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val);
975 if (ret)
976 return ret;
977 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val);
978 if (ret)
979 return ret;
980
981 /* Everything went fine: activate and reinitialize register cache */
982 regcache_cache_bypass(awi->regmap, false);
983 return regmap_reinit_cache(awi->regmap, &aw9523_regmap);
984 }
985
986 static int aw9523_probe(struct i2c_client *client)
987 {
988 struct device *dev = &client->dev;
989 struct pinctrl_desc *pdesc;
990 struct aw9523 *awi;
991 int ret;
992
993 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL);
994 if (!awi)
995 return -ENOMEM;
996
997 i2c_set_clientdata(client, awi);
998
999 awi->dev = dev;
1000 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1001 if (IS_ERR(awi->reset_gpio))
1002 return PTR_ERR(awi->reset_gpio);
1003 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset");
1004
1005 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap);
1006 if (IS_ERR(awi->regmap))
1007 return PTR_ERR(awi->regmap);
1008
1009 awi->vio_vreg = devm_regulator_get_optional(dev, "vio");
1010 if (IS_ERR(awi->vio_vreg)) {
1011 if (PTR_ERR(awi->vio_vreg) == -EPROBE_DEFER)
1012 return -EPROBE_DEFER;
1013 awi->vio_vreg = NULL;
1014 } else {
1015 ret = regulator_enable(awi->vio_vreg);
1016 if (ret)
1017 return ret;
1018 }
1019
1020 mutex_init(&awi->i2c_lock);
1021 lockdep_set_subclass(&awi->i2c_lock,
1022 i2c_adapter_depth(client->adapter));
1023
1024 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL);
1025 if (!pdesc)
1026 return -ENOMEM;
1027
1028 ret = aw9523_hw_init(awi);
1029 if (ret)
1030 goto err_disable_vregs;
1031
1032 pdesc->name = dev_name(dev);
1033 pdesc->owner = THIS_MODULE;
1034 pdesc->pctlops = &aw9523_pinctrl_ops;
1035 pdesc->pmxops = &aw9523_pinmux_ops;
1036 pdesc->confops = &aw9523_pinconf_ops;
1037 pdesc->pins = aw9523_pins;
1038 pdesc->npins = ARRAY_SIZE(aw9523_pins);
1039
1040 ret = aw9523_init_gpiochip(awi, pdesc->npins);
1041 if (ret)
1042 goto err_disable_vregs;
1043
1044 if (client->irq) {
1045 ret = aw9523_init_irq(awi, client->irq);
1046 if (ret)
1047 goto err_disable_vregs;
1048 }
1049
1050 awi->pctl = devm_pinctrl_register(dev, pdesc, awi);
1051 if (IS_ERR(awi->pctl)) {
1052 ret = PTR_ERR(awi->pctl);
1053 dev_err(dev, "Cannot register pinctrl: %d", ret);
1054 goto err_disable_vregs;
1055 }
1056
1057 ret = devm_gpiochip_add_data(dev, &awi->gpio, awi);
1058 if (ret)
1059 goto err_disable_vregs;
1060
1061 return ret;
1062
1063 err_disable_vregs:
1064 if (awi->vio_vreg)
1065 regulator_disable(awi->vio_vreg);
1066 mutex_destroy(&awi->i2c_lock);
1067 return ret;
1068 }
1069
1070 static int aw9523_remove(struct i2c_client *client)
1071 {
1072 struct aw9523 *awi = i2c_get_clientdata(client);
1073 int ret;
1074
1075 if (!awi)
1076 return 0;
1077
1078 /*
1079 * If the chip VIO is connected to a regulator that we can turn
1080 * off, life is easy... otherwise, reinitialize the chip and
1081 * set the pins to hardware defaults before removing the driver
1082 * to leave it in a clean, safe and predictable state.
1083 */
1084 if (awi->vio_vreg) {
1085 regulator_disable(awi->vio_vreg);
1086 } else {
1087 mutex_lock(&awi->i2c_lock);
1088 ret = aw9523_hw_init(awi);
1089 mutex_unlock(&awi->i2c_lock);
1090 if (ret)
1091 return ret;
1092 }
1093
1094 mutex_destroy(&awi->i2c_lock);
1095 return 0;
1096 }
1097
1098 static void aw9523_remove_void(struct i2c_client *client)
1099 {
1100 aw9523_remove(client);
1101 }
1102
1103 static const struct i2c_device_id aw9523_i2c_id_table[] = {
1104 { "aw9523_i2c", 0 },
1105 { }
1106 };
1107 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table);
1108
1109 static const struct of_device_id of_aw9523_i2c_match[] = {
1110 { .compatible = "awinic,aw9523-pinctrl", },
1111 };
1112 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match);
1113
1114 static struct i2c_driver aw9523_driver = {
1115 .driver = {
1116 .name = "aw9523-pinctrl",
1117 .of_match_table = of_aw9523_i2c_match,
1118 },
1119 .probe = aw9523_probe,
1120 .remove = aw9523_remove_void,
1121 .id_table = aw9523_i2c_id_table,
1122 };
1123 module_i2c_driver(aw9523_driver);
1124
1125 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver");
1126 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>");
1127 MODULE_LICENSE("GPL v2");
1128 MODULE_ALIAS("platform:aw9523");