mediatek: update NVMEM bindings for Buffalo WSR-2533DHP2
[openwrt/openwrt.git] / target / linux / mediatek / dts / mt7622-buffalo-wsr-2533dhp2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6
7 #include "mt7622.dtsi"
8 #include "mt6380.dtsi"
9
10 / {
11 model = "Buffalo WSR-2533DHP2";
12 compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
13
14 aliases {
15 serial0 = &uart0;
16 led-boot = &power_green;
17 led-failsafe = &power_amber;
18 led-running = &power_green;
19 led-upgrade = &power_green;
20 };
21
22 chosen {
23 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
24 };
25
26 memory {
27 reg = <0 0x40000000 0 0x0F000000>;
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led-0 {
34 label = "amber:wireless";
35 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
36 color = <LED_COLOR_ID_AMBER>;
37 function = LED_FUNCTION_WLAN;
38 };
39
40 power_amber: led-1 {
41 label = "amber:power";
42 gpios = <&pio 3 GPIO_ACTIVE_LOW>;
43 color = <LED_COLOR_ID_AMBER>;
44 function = LED_FUNCTION_POWER;
45 };
46
47 power_green: led-2 {
48 label = "green:power";
49 gpios = <&pio 4 GPIO_ACTIVE_LOW>;
50 color = <LED_COLOR_ID_GREEN>;
51 function = LED_FUNCTION_POWER;
52 };
53
54 led-3 {
55 label = "green:wireless";
56 gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
57 color = <LED_COLOR_ID_GREEN>;
58 function = LED_FUNCTION_WLAN;
59 };
60
61 led-4 {
62 label = "green:internet";
63 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
64 color = <LED_COLOR_ID_GREEN>;
65 function = LED_FUNCTION_WAN;
66 };
67
68 led-5 {
69 label = "green:router";
70 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
71 color = <LED_COLOR_ID_GREEN>;
72 function = LED_FUNCTION_INDICATOR;
73 };
74 };
75
76 keys {
77 compatible = "gpio-keys";
78
79 key-reset {
80 label = "reset";
81 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_RESTART>;
83 };
84
85 /* GPIO 1 and 16 are a tri-state switch button with
86 * ROUTER / AP / WB.
87 */
88 key-router {
89 label = "router";
90 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
91 linux,code = <BTN_0>;
92 linux,input-type = <EV_SW>;
93 };
94
95 key-bridge {
96 label = "wb";
97 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
98 linux,code = <BTN_1>;
99 linux,input-type = <EV_SW>;
100 };
101
102 /* GPIO 18 is a switch button with AUTO / MANUAL. */
103 key-manual {
104 label = "manual";
105 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
106 linux,code = <BTN_2>;
107 linux,input-type = <EV_SW>;
108 };
109
110 key-wps {
111 label = "wps";
112 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
113 linux,code = <KEY_WPS_BUTTON>;
114 };
115 };
116
117 rtkgsw: rtkgsw@0 {
118 compatible = "mediatek,rtk-gsw";
119 mediatek,ethsys = <&ethsys>;
120 mediatek,mdio = <&mdio>;
121 mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
122 };
123 };
124
125 &cpu0 {
126 proc-supply = <&mt6380_vcpu_reg>;
127 sram-supply = <&mt6380_vm_reg>;
128 };
129
130 &cpu1 {
131 proc-supply = <&mt6380_vcpu_reg>;
132 sram-supply = <&mt6380_vm_reg>;
133 };
134
135 &pcie0 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&pcie0_pins>;
138 status = "okay";
139 };
140
141 &slot0 {
142 status = "okay";
143
144 wifi@0,0 {
145 compatible = "mediatek,mt76";
146 reg = <0x0000 0 0 0 0>;
147 mediatek,mtd-eeprom = <&factory 0x5000>;
148 ieee80211-freq-limit = <5000000 6000000>;
149 };
150 };
151
152 &pio {
153 eth_pins: eth-pins {
154 mux {
155 function = "eth";
156 groups = "mdc_mdio", "rgmii_via_gmac2";
157 };
158 };
159
160 /* Parallel nand is shared pin with eMMC */
161 parallel_nand_pins: parallel-nand-pins {
162 mux {
163 function = "flash";
164 groups = "par_nand";
165 };
166
167 conf-cmd-dat {
168 pins = "NCEB", "NWEB", "NREB",
169 "NDL4", "NDL5", "NDL6",
170 "NDL7", "NRB", "NCLE",
171 "NALE", "NDL0", "NDL1",
172 "NDL2", "NDL3";
173 input-enable;
174 drive-strength = <8>;
175 bias-pull-up;
176 };
177 };
178
179 pcie0_pins: pcie0-pins {
180 mux {
181 function = "pcie";
182 groups = "pcie0_pad_perst",
183 "pcie0_1_waken",
184 "pcie0_1_clkreq";
185 };
186 };
187
188 pmic_bus_pins: pmic-bus-pins {
189 mux {
190 function = "pmic";
191 groups = "pmic_bus";
192 };
193 };
194
195 pwm7_pins: pwm1-2-pins {
196 mux {
197 function = "pwm";
198 groups = "pwm_ch7_2";
199 };
200 };
201
202 uart0_pins: uart0-pins {
203 mux {
204 function = "uart";
205 groups = "uart0_0_tx_rx" ;
206 };
207 };
208
209 watchdog_pins: watchdog-pins {
210 mux {
211 function = "watchdog";
212 groups = "watchdog";
213 };
214 };
215 };
216
217 &bch {
218 status = "okay";
219 };
220
221 &eth {
222 pinctrl-names = "default";
223 pinctrl-0 = <&eth_pins>;
224 status = "okay";
225
226 gmac0: mac@0 {
227 compatible = "mediatek,eth-mac";
228 reg = <0>;
229
230 phy-connection-type = "2500base-x";
231
232 nvmem-cells = <&macaddr_factory_4 (-1)>;
233 nvmem-cell-names = "mac-address";
234
235 fixed-link {
236 speed = <2500>;
237 full-duplex;
238 pause;
239 };
240 };
241
242 mdio: mdio-bus {
243 #address-cells = <1>;
244 #size-cells = <0>;
245 };
246 };
247
248 &nandc {
249 pinctrl-names = "default";
250 pinctrl-0 = <&parallel_nand_pins>;
251 status = "okay";
252
253 nand@0 {
254 reg = <0>;
255 nand-ecc-mode = "hw";
256
257 partitions {
258 compatible = "fixed-partitions";
259 #address-cells = <1>;
260 #size-cells = <1>;
261
262 partition@0 {
263 label = "Preloader";
264 reg = <0x0 0x80000>;
265 read-only;
266 };
267
268 partition@80000 {
269 label = "ATF";
270 reg = <0x80000 0x40000>;
271 read-only;
272 };
273
274 partition@c0000 {
275 label = "Bootloader";
276 reg = <0xc0000 0x80000>;
277 read-only;
278 };
279
280 partition@140000 {
281 label = "Config";
282 reg = <0x140000 0x80000>;
283 };
284
285 factory: partition@1c0000 {
286 compatible = "nvmem-cells";
287 label = "factory";
288 reg = <0x1c0000 0x40000>;
289 read-only;
290
291 nvmem-layout {
292 compatible = "fixed-layout";
293 #address-cells = <1>;
294 #size-cells = <1>;
295
296 macaddr_factory_4: macaddr@4 {
297 compatible = "mac-base";
298 reg = <0x4 0x6>;
299 #nvmem-cell-cells = <1>;
300 };
301 };
302 };
303
304 partition@200000 {
305 compatible = "brcm,trx";
306 brcm,trx-magic = <0x32504844>;
307 label = "firmware";
308 reg = <0x200000 0x3a00000>;
309 };
310
311 partition@3C00000 {
312 label = "Kernel2";
313 reg = <0x3c00000 0x3a00000>;
314 };
315
316 partition@7600000 {
317 label = "glbcfg";
318 reg = <0x7600000 0x200000>;
319 read-only;
320 };
321
322 partition@7800000 {
323 label = "board_data";
324 reg = <0x7800000 0x200000>;
325 read-only;
326 };
327 };
328 };
329 };
330
331 &pwm {
332 pinctrl-names = "default";
333 pinctrl-0 = <&pwm7_pins>;
334 status = "okay";
335 };
336
337 &pwrap {
338 pinctrl-names = "default";
339 pinctrl-0 = <&pmic_bus_pins>;
340 status = "okay";
341 };
342
343 &uart0 {
344 pinctrl-names = "default";
345 pinctrl-0 = <&uart0_pins>;
346 status = "okay";
347 };
348
349 &watchdog {
350 pinctrl-names = "default";
351 pinctrl-0 = <&watchdog_pins>;
352 status = "okay";
353 };
354
355 &wmac {
356 status = "okay";
357
358 mediatek,mtd-eeprom = <&factory 0x0>;
359 };
360
361 &rtc {
362 status = "disabled";
363 };