lantiq: convert to new LED color/function format where possible
[openwrt/openwrt.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_tplink_tdw89x0.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
6
7 / {
8 compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
9
10 chosen {
11 bootargs = "console=ttyLTQ0,115200";
12 };
13
14 aliases {
15 /* the power led can't be controlled, use the wps led instead */
16 led-boot = &led_wps;
17 led-failsafe = &led_wps;
18
19 led-dsl = &led_dsl;
20 led-internet = &led_internet;
21 led-wifi = &led_wifi;
22 };
23
24 memory@0 {
25 device_type = "memory";
26 reg = <0x0 0x4000000>;
27 };
28
29 keys {
30 compatible = "gpio-keys-polled";
31 poll-interval = <100>;
32 reset {
33 label = "reset";
34 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_RESTART>;
36 };
37
38 wifi {
39 label = "wifi";
40 gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
41 linux,code = <KEY_RFKILL>;
42 linux,input-type = <EV_SW>;
43 };
44
45 wps {
46 label = "wps";
47 gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_WPS_BUTTON>;
49 };
50 };
51
52 leds: leds {
53 compatible = "gpio-leds";
54
55 /*
56 power is not controllable via gpio
57 */
58
59 led_dsl: dsl {
60 label = "green:dsl";
61 gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
62 };
63
64 led_internet: internet {
65 label = "green:internet";
66 gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
67 };
68
69 usb0 {
70 function = LED_FUNCTION_USB;
71 color = <LED_COLOR_ID_GREEN>;
72 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
73 trigger-sources = <&ehci_port1>;
74 linux,default-trigger = "usbport";
75 };
76
77 usb2 {
78 label = "green:usb2";
79 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
80 trigger-sources = <&ehci_port2>;
81 linux,default-trigger = "usbport";
82 };
83
84 led_wps: wps {
85 function = LED_FUNCTION_WPS;
86 color = <LED_COLOR_ID_GREEN>;
87 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
88 };
89 };
90
91 ath9k-leds {
92 compatible = "gpio-leds";
93
94 led_wifi: wifi {
95 label = "green:wifi";
96 gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
97 linux,default-trigger = "phy0tpt";
98 };
99 };
100
101
102 usb_vbus: regulator-usb-vbus {
103 compatible = "regulator-fixed";
104
105 regulator-name = "USB_VBUS";
106
107 regulator-min-microvolt = <5000000>;
108 regulator-max-microvolt = <5000000>;
109
110 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
111 enable-active-high;
112 };
113 };
114
115 &eth0 {
116 nvmem-cells = <&macaddr_ath9k_cal_f100 0>;
117 nvmem-cell-names = "mac-address";
118 };
119
120 &gphy0 {
121 lantiq,gphy-mode = <GPHY_MODE_GE>;
122 };
123
124 &gphy1 {
125 lantiq,gphy-mode = <GPHY_MODE_GE>;
126 };
127
128 &gpio {
129 pinctrl-names = "default";
130 pinctrl-0 = <&state_default>;
131
132 state_default: pinmux {
133 phy-rst {
134 lantiq,pins = "io42";
135 lantiq,pull = <0>;
136 lantiq,open-drain = <0>;
137 lantiq,output = <1>;
138 };
139 pcie-rst {
140 lantiq,pins = "io38";
141 lantiq,pull = <0>;
142 lantiq,output = <1>;
143 };
144 };
145 };
146
147 &gswip {
148 pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
149 pinctrl-names = "default";
150 };
151
152 &gswip_mdio {
153 phy0: ethernet-phy@0 {
154 reg = <0x0>;
155 // reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
156 };
157 phy5: ethernet-phy@5 {
158 reg = <0x5>;
159 };
160 phy11: ethernet-phy@11 {
161 reg = <0x11>;
162 };
163 phy13: ethernet-phy@13 {
164 reg = <0x13>;
165 };
166 };
167
168 &gswip_ports {
169 port@0 {
170 reg = <0>;
171 label = "lan2";
172 phy-mode = "rgmii";
173 phy-handle = <&phy0>;
174 };
175 port@2 {
176 reg = <2>;
177 label = "lan3";
178 phy-mode = "internal";
179 phy-handle = <&phy11>;
180 };
181 port@4 {
182 reg = <4>;
183 label = "lan4";
184 phy-mode = "internal";
185 phy-handle = <&phy13>;
186 };
187 port@5 {
188 reg = <5>;
189 label = "lan1";
190 phy-mode = "rgmii";
191 phy-handle = <&phy5>;
192 };
193 };
194
195 &pcie0 {
196 pcie@0 {
197 reg = <0 0 0 0 0>;
198 #interrupt-cells = <1>;
199 #size-cells = <2>;
200 #address-cells = <3>;
201 device_type = "pci";
202
203 ath9k: wifi@168c,002e {
204 compatible = "pci168c,002e";
205 reg = <0 0 0 0 0>;
206 #gpio-cells = <2>;
207 gpio-controller;
208 qca,no-eeprom;
209 ieee80211-freq-limit = <2402000 2482000>;
210 nvmem-cells = <&macaddr_ath9k_cal_f100 2>;
211 nvmem-cell-names = "mac-address";
212 };
213 };
214 };
215
216 &spi {
217 status = "okay";
218
219 flash@4 {
220 compatible = "jedec,spi-nor";
221 reg = <4>;
222 spi-max-frequency = <33250000>;
223 m25p,fast-read;
224
225 partitions {
226 compatible = "fixed-partitions";
227 #address-cells = <1>;
228 #size-cells = <1>;
229
230 partition@0 {
231 reg = <0x0 0x20000>;
232 label = "u-boot";
233 read-only;
234 };
235
236 partition@20000 {
237 reg = <0x20000 0x7a0000>;
238 label = "firmware";
239 };
240
241 partition@7c0000 {
242 reg = <0x7c0000 0x10000>;
243 label = "config";
244 read-only;
245 };
246
247 ath9k_cal: partition@7d0000 {
248 reg = <0x7d0000 0x30000>;
249 label = "boardconfig";
250 read-only;
251
252 nvmem-layout {
253 compatible = "fixed-layout";
254 #address-cells = <1>;
255 #size-cells = <1>;
256
257 macaddr_ath9k_cal_f100: macaddr@f100 {
258 compatible = "mac-base";
259 reg = <0xf100 0x6>;
260 #nvmem-cell-cells = <1>;
261 };
262 };
263 };
264 };
265 };
266 };
267
268 &usb_phy0 {
269 status = "okay";
270 };
271
272 &usb_phy1 {
273 status = "okay";
274 };
275
276 &usb0 {
277 status = "okay";
278 vbus-supply = <&usb_vbus>;
279 };
280
281 &usb1 {
282 status = "okay";
283 vbus-supply = <&usb_vbus>;
284 };