generic: 6.1, 6.6: replace Airoha EN8811H PHY driver with upstream
[openwrt/openwrt.git] / target / linux / gemini / patches-6.1 / 0022-fotg210-udc-Introduce-and-use-a-fotg210_ack_int-func.patch
1 From f011d1eab23f4c063c5441c0d5a22898adf9145c Mon Sep 17 00:00:00 2001
2 From: Fabian Vogt <fabian@ritter-vogt.de>
3 Date: Mon, 23 Jan 2023 08:35:07 +0100
4 Subject: [PATCH 22/29] fotg210-udc: Introduce and use a fotg210_ack_int
5 function
6
7 This is in preparation of support for devices where interrupts are acked
8 differently.
9
10 Signed-off-by: Fabian Vogt <fabian@ritter-vogt.de>
11 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
12 Link: https://lore.kernel.org/r/20230123073508.2350402-3-linus.walleij@linaro.org
13 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 ---
15 --- a/drivers/usb/fotg210/fotg210-udc.c
16 +++ b/drivers/usb/fotg210/fotg210-udc.c
17 @@ -28,6 +28,14 @@ static const char udc_name[] = "fotg210_
18 static const char * const fotg210_ep_name[] = {
19 "ep0", "ep1", "ep2", "ep3", "ep4"};
20
21 +static void fotg210_ack_int(struct fotg210_udc *fotg210, u32 offset, u32 mask)
22 +{
23 + u32 value = ioread32(fotg210->reg + offset);
24 +
25 + value &= ~mask;
26 + iowrite32(value, fotg210->reg + offset);
27 +}
28 +
29 static void fotg210_disable_fifo_int(struct fotg210_ep *ep)
30 {
31 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
32 @@ -303,8 +311,7 @@ static void fotg210_wait_dma_done(struct
33 goto dma_reset;
34 } while (!(value & DISGR2_DMA_CMPLT));
35
36 - value &= ~DISGR2_DMA_CMPLT;
37 - iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2);
38 + fotg210_ack_int(ep->fotg210, FOTG210_DISGR2, DISGR2_DMA_CMPLT);
39 return;
40
41 dma_reset:
42 @@ -844,14 +851,6 @@ static void fotg210_ep0in(struct fotg210
43 }
44 }
45
46 -static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210)
47 -{
48 - u32 value = ioread32(fotg210->reg + FOTG210_DISGR0);
49 -
50 - value &= ~DISGR0_CX_COMABT_INT;
51 - iowrite32(value, fotg210->reg + FOTG210_DISGR0);
52 -}
53 -
54 static void fotg210_in_fifo_handler(struct fotg210_ep *ep)
55 {
56 struct fotg210_request *req = list_entry(ep->queue.next,
57 @@ -893,60 +892,43 @@ static irqreturn_t fotg210_irq(int irq,
58 void __iomem *reg = fotg210->reg + FOTG210_DISGR2;
59 u32 int_grp2 = ioread32(reg);
60 u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2);
61 - u32 value;
62
63 int_grp2 &= ~int_msk2;
64
65 if (int_grp2 & DISGR2_USBRST_INT) {
66 usb_gadget_udc_reset(&fotg210->gadget,
67 fotg210->driver);
68 - value = ioread32(reg);
69 - value &= ~DISGR2_USBRST_INT;
70 - iowrite32(value, reg);
71 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_USBRST_INT);
72 pr_info("fotg210 udc reset\n");
73 }
74 if (int_grp2 & DISGR2_SUSP_INT) {
75 - value = ioread32(reg);
76 - value &= ~DISGR2_SUSP_INT;
77 - iowrite32(value, reg);
78 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_SUSP_INT);
79 pr_info("fotg210 udc suspend\n");
80 }
81 if (int_grp2 & DISGR2_RESM_INT) {
82 - value = ioread32(reg);
83 - value &= ~DISGR2_RESM_INT;
84 - iowrite32(value, reg);
85 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_RESM_INT);
86 pr_info("fotg210 udc resume\n");
87 }
88 if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) {
89 - value = ioread32(reg);
90 - value &= ~DISGR2_ISO_SEQ_ERR_INT;
91 - iowrite32(value, reg);
92 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_ISO_SEQ_ERR_INT);
93 pr_info("fotg210 iso sequence error\n");
94 }
95 if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) {
96 - value = ioread32(reg);
97 - value &= ~DISGR2_ISO_SEQ_ABORT_INT;
98 - iowrite32(value, reg);
99 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_ISO_SEQ_ABORT_INT);
100 pr_info("fotg210 iso sequence abort\n");
101 }
102 if (int_grp2 & DISGR2_TX0BYTE_INT) {
103 fotg210_clear_tx0byte(fotg210);
104 - value = ioread32(reg);
105 - value &= ~DISGR2_TX0BYTE_INT;
106 - iowrite32(value, reg);
107 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_TX0BYTE_INT);
108 pr_info("fotg210 transferred 0 byte\n");
109 }
110 if (int_grp2 & DISGR2_RX0BYTE_INT) {
111 fotg210_clear_rx0byte(fotg210);
112 - value = ioread32(reg);
113 - value &= ~DISGR2_RX0BYTE_INT;
114 - iowrite32(value, reg);
115 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_RX0BYTE_INT);
116 pr_info("fotg210 received 0 byte\n");
117 }
118 if (int_grp2 & DISGR2_DMA_ERROR) {
119 - value = ioread32(reg);
120 - value &= ~DISGR2_DMA_ERROR;
121 - iowrite32(value, reg);
122 + fotg210_ack_int(fotg210, FOTG210_DISGR2, DISGR2_DMA_ERROR);
123 }
124 }
125
126 @@ -960,7 +942,7 @@ static irqreturn_t fotg210_irq(int irq,
127
128 /* the highest priority in this source register */
129 if (int_grp0 & DISGR0_CX_COMABT_INT) {
130 - fotg210_clear_comabt_int(fotg210);
131 + fotg210_ack_int(fotg210, FOTG210_DISGR0, DISGR0_CX_COMABT_INT);
132 pr_info("fotg210 CX command abort\n");
133 }
134