target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         model = "Linksys WHW03 V2 (Velop)";
  11         compatible = "linksys,whw03v2", "qcom,ipq4019";
  12
  13         aliases {
  14                 led-boot = &led_blue;
  15                 led-failsafe = &led_red;
  16                 led-running = &led_blue;
  17                 led-upgrade = &led_red;
  18         };
  19
  20         // Default bootargs include rootfstype=ext4 and need to be overriden.
  21         chosen {
  22                 bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
  23                 stdout-path = &blsp1_uart1;
  24         };
  25
  26         soc {
  27                 ess-tcsr@1953000 {
  28                         compatible = "qcom,tcsr";
  29                         reg = <0x1953000 0x1000>;
  30                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  31                 };
  32
  33
  34                 tcsr@1949000 {
  35                         compatible = "qcom,tcsr";
  36                         reg = <0x1949000 0x100>;
  37                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  38                 };
  39
  40                 tcsr@194b000 {
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x194b000 0x100>;
  43                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  44                 };
  45
  46                 tcsr@1957000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1957000 0x100>;
  49                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  50                 };
  51         };
  52
  53
  54         keys {
  55                 compatible = "gpio-keys";
  56
  57                 reset {
  58                         label = "reset";
  59                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  60                         linux,code = <KEY_RESTART>;
  61                 };
  62         };
  63 };
  64
  65
  66 &tlmm {
  67         mdio_pins: mdio-pinmux {
  68                 mux-1 {
  69                         pins = "gpio6";
  70                         function = "mdio";
  71                         bias-pull-up;
  72                 };
  73
  74                 mux-2 {
  75                         pins = "gpio7";
  76                         function = "mdc";
  77                         bias-pull-up;
  78                 };
  79         };
  80
  81         i2c_0_pins: i2c-0-pinmux {
  82                 pins = "gpio20", "gpio21";
  83                 function = "blsp_i2c0";
  84                 bias-disable;
  85         };
  86
  87         serial_0_pins: serial0-pinmux {
  88                 pins = "gpio16", "gpio17";
  89                 function = "blsp_uart0";
  90                 bias-disable;
  91         };
  92
  93         serial_1_pins: serial1-pinmux {
  94                 pins = "gpio8", "gpio9", "gpio10", "gpio11";
  95                 function = "blsp_uart1";
  96                 bias-disable;
  97         };
  98
  99         spi_0_pins: spi-0-pinmux {
 100                 mux {
 101                         pins = "gpio13", "gpio14", "gpio15";
 102                         function = "blsp_spi0";
 103                         drive-strength = <12>;
 104                         bias-disable;
 105                 };
 106
 107                 mux-cs {
 108                         pins = "gpio12";
 109                         drive-strength = <2>;
 110                         bias-disable;
 111                         output-high;
 112                 };
 113         };
 114
 115         spi_1_pins: spi-1-pinmux {
 116                 mux-1 {
 117                         pins = "gpio44", "gpio46", "gpio47";
 118                         function = "blsp_spi1";
 119                         bias-disable;
 120                 };
 121
 122                 mux-2 {
 123                         pins = "gpio31", "gpio45", "gpio49";
 124                         function = "gpio";
 125                         bias-pull-up;
 126                         output-high;
 127                 };
 128
 129                 host-interrupt {
 130                         pins = "gpio42";
 131                         function = "gpio";
 132                         input;
 133                 };
 134         };
 135
 136         wifi_0_pins: wifi0-pinmux {
 137                 pins = "gpio52";
 138                 function = "gpio";
 139                 drive-strength = <6>;
 140                 bias-pull-up;
 141                 output-high;
 142         };
 143
 144         zigbee-0 {
 145                 gpio-hog;
 146                 gpios = <29 GPIO_ACTIVE_HIGH>;
 147                 bias-disable;
 148                 output-low;
 149         };
 150
 151         zigbee-1 {
 152                 gpio-hog;
 153                 gpios = <50 GPIO_ACTIVE_HIGH>;
 154                 bias-disable;
 155                 input;
 156         };
 157
 158         bluetooth-enable {
 159                 gpio-hog;
 160                 gpios = <32 GPIO_ACTIVE_HIGH>;
 161                 output-high;
 162         };
 163 };
 164
 165 &mdio {
 166         status = "okay";
 167         pinctrl-0 = <&mdio_pins>;
 168         pinctrl-names = "default";
 169         phy-reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
 170 };
 171
 172 &ethphy0 {
 173         status = "disabled";
 174 };
 175
 176 &ethphy1 {
 177         status = "disabled";
 178 };
 179
 180 &ethphy2 {
 181         status = "disabled";
 182 };
 183
 184 &ethphy3 {
 185         reg = <0x1b>;
 186 };
 187
 188 &ethphy4 {
 189         reg = <0x1c>;
 190 };
 191
 192 &psgmiiphy {
 193         reg = <0x1d>;
 194 };
 195
 196 &watchdog {
 197         status = "okay";
 198 };
 199
 200 &prng {
 201         status = "okay";
 202 };
 203
 204 &blsp_dma {
 205         status = "okay";
 206 };
 207
 208 &cryptobam {
 209         num-channels = <4>;
 210         qcom,num-ees = <2>;
 211
 212         status = "okay";
 213 };
 214
 215 &crypto {
 216         status = "okay";
 217 };
 218
 219 &blsp1_uart1 {
 220         status = "okay";
 221         pinctrl-0 = <&serial_0_pins>;
 222         pinctrl-names = "default";
 223 };
 224
 225 &blsp1_uart2 {
 226         status = "okay";
 227         pinctrl-0 = <&serial_1_pins>;
 228         pinctrl-names = "default";
 229
 230         bluetooth {
 231                 compatible = "csr,8811";
 232
 233                 enable-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
 234         };
 235 };
 236
 237 &blsp1_spi2 {
 238         pinctrl-0 = <&spi_1_pins>;
 239         pinctrl-names = "default";
 240         status = "okay";
 241
 242         cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
 243
 244         zigbee@0 {
 245                 #address-cells = <1>;
 246                 #size-cells = <0>;
 247
 248                 compatible = "silabs,em3581";
 249                 reg = <0>;
 250                 spi-max-frequency = <12000000>;
 251         };
 252 };
 253
 254 &blsp1_i2c3 {
 255         pinctrl-0 = <&i2c_0_pins>;
 256         pinctrl-names = "default";
 257
 258         status = "okay";
 259
 260         // RGB LEDs
 261         pca9633: led-controller@62 {
 262                 compatible = "nxp,pca9633";
 263                 nxp,hw-blink;
 264                 reg = <0x62>;
 265                 #address-cells = <1>;
 266                 #size-cells = <0>;
 267
 268                 led_red: red@0 {
 269                         color = <LED_COLOR_ID_RED>;
 270                         function = LED_FUNCTION_INDICATOR;
 271                         reg = <0>;
 272                 };
 273
 274                 led_green: green@1 {
 275                         color = <LED_COLOR_ID_GREEN>;
 276                         function = LED_FUNCTION_INDICATOR;
 277                         reg = <1>;
 278                 };
 279
 280                 led_blue: blue@2 {
 281                         color = <LED_COLOR_ID_BLUE>;
 282                         function = LED_FUNCTION_INDICATOR;
 283                         reg = <2>;
 284                 };
 285         };
 286 };
 287
 288 &usb3_ss_phy {
 289         status = "okay";
 290 };
 291
 292 &usb3_hs_phy {
 293         status = "okay";
 294 };
 295
 296 &usb2_hs_phy {
 297         status = "okay";
 298 };
 299
 300 &nand {
 301         status = "okay";
 302
 303         nand@0 {
 304                 partitions {
 305                         compatible = "fixed-partitions";
 306                         #address-cells = <1>;
 307                         #size-cells = <1>;
 308
 309                         partition@0 {
 310                                 label = "SBL1";
 311                                 reg = <0x0 0x100000>;
 312                                 read-only;
 313                         };
 314
 315                         partition@100000 {
 316                                 label = "MIBIB";
 317                                 reg = <0x100000 0x100000>;
 318                                 read-only;
 319                         };
 320
 321                         partition@200000 {
 322                                 label = "QSEE";
 323                                 reg = <0x200000 0x100000>;
 324                                 read-only;
 325                         };
 326
 327                         partition@300000 {
 328                                 label = "CDT";
 329                                 reg = <0x300000 0x80000>;
 330                                 read-only;
 331                         };
 332
 333                         partition@380000 {
 334                                 label = "APPSBL";
 335                                 reg = <0x380000 0x200000>;
 336                                 read-only;
 337                         };
 338
 339                         partition@580000 {
 340                                 label = "ART";
 341                                 reg = <0x580000 0x80000>;
 342                                 read-only;
 343
 344                                 nvmem-layout {
 345                                         compatible = "fixed-layout";
 346                                         #address-cells = <1>;
 347                                         #size-cells = <1>;
 348
 349                                         macaddr_gmac0: macaddr@0 {
 350                                                 compatible = "mac-base";
 351                                                 reg = <0x0 0x6>;
 352                                                 #nvmem-cell-cells = <1>;
 353                                         };
 354
 355                                         macaddr_gmac1: macaddr@6 {
 356                                                 reg = <0x6 0x6>;
 357                                         };
 358
 359                                         precal_art_1000: precal@1000 {
 360                                                 reg = <0x1000 0x2f20>;
 361                                         };
 362
 363                                         precal_art_5000: precal@5000 {
 364                                                 reg = <0x5000 0x2f20>;
 365                                         };
 366
 367                                         precal_art_9000: precal@9000 {
 368                                                 reg = <0x9000 0x2f20>;
 369                                         };
 370                                 };
 371                         };
 372
 373                         partition@600000 {
 374                                 label = "u_env";
 375                                 reg = <0x600000 0x80000>;
 376                         };
 377
 378                         partition@680000 {
 379                                 label = "s_env";
 380                                 reg = <0x680000 0x40000>;
 381                         };
 382
 383                         partition@6c0000 {
 384                                 label = "devinfo";
 385                                 reg = <0x6c0000 0x40000>;
 386                                 read-only;
 387                         };
 388
 389                         partition@700000 {
 390                                 label = "kernel";
 391                                 reg = <0x700000 0xa100000>;
 392                         };
 393
 394                         partition@d00000 {
 395                                 label = "rootfs";
 396                                 reg = <0xd00000 0x9b00000>;
 397                         };
 398
 399                         partition@a800000 {
 400                                 label = "alt_kernel";
 401                                 reg = <0xa800000 0xa100000>;
 402                         };
 403
 404                         partition@ae00000 {
 405                                 label = "alt_rootfs";
 406                                 reg = <0xae00000 0x9b00000>;
 407                         };
 408
 409                         partition@14900000 {
 410                                 label = "sysdiag";
 411                                 reg = <0x14900000 0x200000>;
 412                                 read-only;
 413                         };
 414
 415                         partition@14b00000 {
 416                                 label = "syscfg";
 417                                 reg = <0x14b00000 0xb500000>;
 418                                 read-only;
 419                         };
 420                 };
 421         };
 422 };
 423
 424 &pcie0 {
 425         status = "okay";
 426
 427         perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
 428         wake-gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
 429         clkreq-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
 430
 431         bridge@0,0 {
 432                 reg = <0x00000000 0 0 0 0>;
 433                 #address-cells = <3>;
 434                 #size-cells = <2>;
 435                 ranges;
 436
 437                 wifi2: wifi@1,0 {
 438                         compatible = "qcom,ath10k";
 439                         reg = <0x00010000 0 0 0 0>;
 440                 };
 441         };
 442 };
 443
 444 &qpic_bam {
 445         status = "okay";
 446 };
 447
 448 &gmac {
 449         status = "okay";
 450 };
 451
 452 &switch {
 453         status = "okay";
 454 };
 455
 456 &swport4 {
 457         status = "okay";
 458         label = "lan";
 459
 460         nvmem-cell-names = "mac-address";
 461         nvmem-cells = <&macaddr_gmac1>;
 462 };
 463
 464 &swport5 {
 465         status = "okay";
 466         label = "wan";
 467
 468         nvmem-cell-names = "mac-address";
 469         nvmem-cells = <&macaddr_gmac0 0>;
 470 };
 471
 472 &wifi0 {
 473         pinctrl-0 = <&wifi_0_pins>;
 474         pinctrl-names = "default";
 475
 476         status = "okay";
 477
 478         qcom,coexist-support = <1>;
 479         qcom,coexist-gpio-pin = <52>;
 480
 481         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 482
 483         nvmem-cell-names = "pre-calibration", "mac-address";
 484         nvmem-cells = <&precal_art_1000>, <&macaddr_gmac0 1>;
 485 };
 486
 487 &wifi1 {
 488         status = "okay";
 489
 490         ieee80211-freq-limit = <5170000 5330000>;
 491         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 492
 493         nvmem-cell-names = "pre-calibration", "mac-address";
 494         nvmem-cells = <&precal_art_5000>, <&macaddr_gmac0 2>;
 495 };
 496
 497 &wifi2 {
 498         status = "okay";
 499
 500         ieee80211-freq-limit = <5490000 5835000>;
 501         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 502
 503         nvmem-cell-names = "pre-calibration", "mac-address";
 504         nvmem-cells = <&precal_art_9000>, <&macaddr_gmac0 3>;
 505 };